1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mce.h> 20 #include <asm/mmu.h> 21 #include <asm/setup.h> 22 23 static struct cpu_spec the_cpu_spec __read_mostly; 24 25 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 #include <asm/cpu_setup_power.h> 64 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 66 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_pa6t(void); 68 extern void __restore_cpu_ppc970(void); 69 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 70 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 71 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 72 #endif /* CONFIG_PPC64 */ 73 #if defined(CONFIG_E500) 74 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 75 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 76 extern void __restore_cpu_e5500(void); 77 extern void __restore_cpu_e6500(void); 78 #endif /* CONFIG_E500 */ 79 80 /* This table only contains "desktop" CPUs, it need to be filled with embedded 81 * ones as well... 82 */ 83 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 84 PPC_FEATURE_HAS_MMU) 85 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 86 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 87 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 88 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 89 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 91 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 93 PPC_FEATURE_TRUE_LE | \ 94 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 95 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 97 PPC_FEATURE_TRUE_LE | \ 98 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 99 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 100 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 101 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 102 PPC_FEATURE_TRUE_LE | \ 103 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 104 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 105 PPC_FEATURE2_HTM_COMP | \ 106 PPC_FEATURE2_HTM_NOSC_COMP | \ 107 PPC_FEATURE2_DSCR | \ 108 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 109 PPC_FEATURE2_VEC_CRYPTO) 110 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 111 PPC_FEATURE_TRUE_LE | \ 112 PPC_FEATURE_HAS_ALTIVEC_COMP) 113 #define COMMON_USER_POWER9 COMMON_USER_POWER8 114 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 115 PPC_FEATURE2_ARCH_3_00 | \ 116 PPC_FEATURE2_HAS_IEEE128 | \ 117 PPC_FEATURE2_DARN | \ 118 PPC_FEATURE2_SCV) 119 #define COMMON_USER_POWER10 COMMON_USER_POWER9 120 #define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 121 PPC_FEATURE2_MMA | \ 122 PPC_FEATURE2_ARCH_3_00 | \ 123 PPC_FEATURE2_HAS_IEEE128 | \ 124 PPC_FEATURE2_DARN | \ 125 PPC_FEATURE2_SCV | \ 126 PPC_FEATURE2_ARCH_2_07 | \ 127 PPC_FEATURE2_DSCR | \ 128 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 129 PPC_FEATURE2_VEC_CRYPTO) 130 131 #ifdef CONFIG_PPC_BOOK3E_64 132 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 133 #else 134 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 135 PPC_FEATURE_BOOKE) 136 #endif 137 138 static struct cpu_spec __initdata cpu_specs[] = { 139 #ifdef CONFIG_PPC_BOOK3S_64 140 { /* PPC970 */ 141 .pvr_mask = 0xffff0000, 142 .pvr_value = 0x00390000, 143 .cpu_name = "PPC970", 144 .cpu_features = CPU_FTRS_PPC970, 145 .cpu_user_features = COMMON_USER_POWER4 | 146 PPC_FEATURE_HAS_ALTIVEC_COMP, 147 .mmu_features = MMU_FTRS_PPC970, 148 .icache_bsize = 128, 149 .dcache_bsize = 128, 150 .num_pmcs = 8, 151 .pmc_type = PPC_PMC_IBM, 152 .cpu_setup = __setup_cpu_ppc970, 153 .cpu_restore = __restore_cpu_ppc970, 154 .oprofile_cpu_type = "ppc64/970", 155 .oprofile_type = PPC_OPROFILE_POWER4, 156 .platform = "ppc970", 157 }, 158 { /* PPC970FX */ 159 .pvr_mask = 0xffff0000, 160 .pvr_value = 0x003c0000, 161 .cpu_name = "PPC970FX", 162 .cpu_features = CPU_FTRS_PPC970, 163 .cpu_user_features = COMMON_USER_POWER4 | 164 PPC_FEATURE_HAS_ALTIVEC_COMP, 165 .mmu_features = MMU_FTRS_PPC970, 166 .icache_bsize = 128, 167 .dcache_bsize = 128, 168 .num_pmcs = 8, 169 .pmc_type = PPC_PMC_IBM, 170 .cpu_setup = __setup_cpu_ppc970, 171 .cpu_restore = __restore_cpu_ppc970, 172 .oprofile_cpu_type = "ppc64/970", 173 .oprofile_type = PPC_OPROFILE_POWER4, 174 .platform = "ppc970", 175 }, 176 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 177 .pvr_mask = 0xffffffff, 178 .pvr_value = 0x00440100, 179 .cpu_name = "PPC970MP", 180 .cpu_features = CPU_FTRS_PPC970, 181 .cpu_user_features = COMMON_USER_POWER4 | 182 PPC_FEATURE_HAS_ALTIVEC_COMP, 183 .mmu_features = MMU_FTRS_PPC970, 184 .icache_bsize = 128, 185 .dcache_bsize = 128, 186 .num_pmcs = 8, 187 .pmc_type = PPC_PMC_IBM, 188 .cpu_setup = __setup_cpu_ppc970, 189 .cpu_restore = __restore_cpu_ppc970, 190 .oprofile_cpu_type = "ppc64/970MP", 191 .oprofile_type = PPC_OPROFILE_POWER4, 192 .platform = "ppc970", 193 }, 194 { /* PPC970MP */ 195 .pvr_mask = 0xffff0000, 196 .pvr_value = 0x00440000, 197 .cpu_name = "PPC970MP", 198 .cpu_features = CPU_FTRS_PPC970, 199 .cpu_user_features = COMMON_USER_POWER4 | 200 PPC_FEATURE_HAS_ALTIVEC_COMP, 201 .mmu_features = MMU_FTRS_PPC970, 202 .icache_bsize = 128, 203 .dcache_bsize = 128, 204 .num_pmcs = 8, 205 .pmc_type = PPC_PMC_IBM, 206 .cpu_setup = __setup_cpu_ppc970MP, 207 .cpu_restore = __restore_cpu_ppc970, 208 .oprofile_cpu_type = "ppc64/970MP", 209 .oprofile_type = PPC_OPROFILE_POWER4, 210 .platform = "ppc970", 211 }, 212 { /* PPC970GX */ 213 .pvr_mask = 0xffff0000, 214 .pvr_value = 0x00450000, 215 .cpu_name = "PPC970GX", 216 .cpu_features = CPU_FTRS_PPC970, 217 .cpu_user_features = COMMON_USER_POWER4 | 218 PPC_FEATURE_HAS_ALTIVEC_COMP, 219 .mmu_features = MMU_FTRS_PPC970, 220 .icache_bsize = 128, 221 .dcache_bsize = 128, 222 .num_pmcs = 8, 223 .pmc_type = PPC_PMC_IBM, 224 .cpu_setup = __setup_cpu_ppc970, 225 .oprofile_cpu_type = "ppc64/970", 226 .oprofile_type = PPC_OPROFILE_POWER4, 227 .platform = "ppc970", 228 }, 229 { /* Power5 GR */ 230 .pvr_mask = 0xffff0000, 231 .pvr_value = 0x003a0000, 232 .cpu_name = "POWER5 (gr)", 233 .cpu_features = CPU_FTRS_POWER5, 234 .cpu_user_features = COMMON_USER_POWER5, 235 .mmu_features = MMU_FTRS_POWER5, 236 .icache_bsize = 128, 237 .dcache_bsize = 128, 238 .num_pmcs = 6, 239 .pmc_type = PPC_PMC_IBM, 240 .oprofile_cpu_type = "ppc64/power5", 241 .oprofile_type = PPC_OPROFILE_POWER4, 242 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 243 * and above but only works on POWER5 and above 244 */ 245 .oprofile_mmcra_sihv = MMCRA_SIHV, 246 .oprofile_mmcra_sipr = MMCRA_SIPR, 247 .platform = "power5", 248 }, 249 { /* Power5++ */ 250 .pvr_mask = 0xffffff00, 251 .pvr_value = 0x003b0300, 252 .cpu_name = "POWER5+ (gs)", 253 .cpu_features = CPU_FTRS_POWER5, 254 .cpu_user_features = COMMON_USER_POWER5_PLUS, 255 .mmu_features = MMU_FTRS_POWER5, 256 .icache_bsize = 128, 257 .dcache_bsize = 128, 258 .num_pmcs = 6, 259 .oprofile_cpu_type = "ppc64/power5++", 260 .oprofile_type = PPC_OPROFILE_POWER4, 261 .oprofile_mmcra_sihv = MMCRA_SIHV, 262 .oprofile_mmcra_sipr = MMCRA_SIPR, 263 .platform = "power5+", 264 }, 265 { /* Power5 GS */ 266 .pvr_mask = 0xffff0000, 267 .pvr_value = 0x003b0000, 268 .cpu_name = "POWER5+ (gs)", 269 .cpu_features = CPU_FTRS_POWER5, 270 .cpu_user_features = COMMON_USER_POWER5_PLUS, 271 .mmu_features = MMU_FTRS_POWER5, 272 .icache_bsize = 128, 273 .dcache_bsize = 128, 274 .num_pmcs = 6, 275 .pmc_type = PPC_PMC_IBM, 276 .oprofile_cpu_type = "ppc64/power5+", 277 .oprofile_type = PPC_OPROFILE_POWER4, 278 .oprofile_mmcra_sihv = MMCRA_SIHV, 279 .oprofile_mmcra_sipr = MMCRA_SIPR, 280 .platform = "power5+", 281 }, 282 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 283 .pvr_mask = 0xffffffff, 284 .pvr_value = 0x0f000001, 285 .cpu_name = "POWER5+", 286 .cpu_features = CPU_FTRS_POWER5, 287 .cpu_user_features = COMMON_USER_POWER5_PLUS, 288 .mmu_features = MMU_FTRS_POWER5, 289 .icache_bsize = 128, 290 .dcache_bsize = 128, 291 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 292 .oprofile_type = PPC_OPROFILE_POWER4, 293 .platform = "power5+", 294 }, 295 { /* Power6 */ 296 .pvr_mask = 0xffff0000, 297 .pvr_value = 0x003e0000, 298 .cpu_name = "POWER6 (raw)", 299 .cpu_features = CPU_FTRS_POWER6, 300 .cpu_user_features = COMMON_USER_POWER6 | 301 PPC_FEATURE_POWER6_EXT, 302 .mmu_features = MMU_FTRS_POWER6, 303 .icache_bsize = 128, 304 .dcache_bsize = 128, 305 .num_pmcs = 6, 306 .pmc_type = PPC_PMC_IBM, 307 .oprofile_cpu_type = "ppc64/power6", 308 .oprofile_type = PPC_OPROFILE_POWER4, 309 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 310 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 311 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 312 POWER6_MMCRA_OTHER, 313 .platform = "power6x", 314 }, 315 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 316 .pvr_mask = 0xffffffff, 317 .pvr_value = 0x0f000002, 318 .cpu_name = "POWER6 (architected)", 319 .cpu_features = CPU_FTRS_POWER6, 320 .cpu_user_features = COMMON_USER_POWER6, 321 .mmu_features = MMU_FTRS_POWER6, 322 .icache_bsize = 128, 323 .dcache_bsize = 128, 324 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 325 .oprofile_type = PPC_OPROFILE_POWER4, 326 .platform = "power6", 327 }, 328 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 329 .pvr_mask = 0xffffffff, 330 .pvr_value = 0x0f000003, 331 .cpu_name = "POWER7 (architected)", 332 .cpu_features = CPU_FTRS_POWER7, 333 .cpu_user_features = COMMON_USER_POWER7, 334 .cpu_user_features2 = COMMON_USER2_POWER7, 335 .mmu_features = MMU_FTRS_POWER7, 336 .icache_bsize = 128, 337 .dcache_bsize = 128, 338 .oprofile_type = PPC_OPROFILE_POWER4, 339 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 340 .cpu_setup = __setup_cpu_power7, 341 .cpu_restore = __restore_cpu_power7, 342 .machine_check_early = __machine_check_early_realmode_p7, 343 .platform = "power7", 344 }, 345 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 346 .pvr_mask = 0xffffffff, 347 .pvr_value = 0x0f000004, 348 .cpu_name = "POWER8 (architected)", 349 .cpu_features = CPU_FTRS_POWER8, 350 .cpu_user_features = COMMON_USER_POWER8, 351 .cpu_user_features2 = COMMON_USER2_POWER8, 352 .mmu_features = MMU_FTRS_POWER8, 353 .icache_bsize = 128, 354 .dcache_bsize = 128, 355 .oprofile_type = PPC_OPROFILE_INVALID, 356 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 357 .cpu_setup = __setup_cpu_power8, 358 .cpu_restore = __restore_cpu_power8, 359 .machine_check_early = __machine_check_early_realmode_p8, 360 .platform = "power8", 361 }, 362 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 363 .pvr_mask = 0xffffffff, 364 .pvr_value = 0x0f000005, 365 .cpu_name = "POWER9 (architected)", 366 .cpu_features = CPU_FTRS_POWER9, 367 .cpu_user_features = COMMON_USER_POWER9, 368 .cpu_user_features2 = COMMON_USER2_POWER9, 369 .mmu_features = MMU_FTRS_POWER9, 370 .icache_bsize = 128, 371 .dcache_bsize = 128, 372 .oprofile_type = PPC_OPROFILE_INVALID, 373 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 374 .cpu_setup = __setup_cpu_power9, 375 .cpu_restore = __restore_cpu_power9, 376 .platform = "power9", 377 }, 378 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 379 .pvr_mask = 0xffffffff, 380 .pvr_value = 0x0f000006, 381 .cpu_name = "POWER10 (architected)", 382 .cpu_features = CPU_FTRS_POWER10, 383 .cpu_user_features = COMMON_USER_POWER10, 384 .cpu_user_features2 = COMMON_USER2_POWER10, 385 .mmu_features = MMU_FTRS_POWER10, 386 .icache_bsize = 128, 387 .dcache_bsize = 128, 388 .oprofile_type = PPC_OPROFILE_INVALID, 389 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 390 .cpu_setup = __setup_cpu_power10, 391 .cpu_restore = __restore_cpu_power10, 392 .platform = "power10", 393 }, 394 { /* Power7 */ 395 .pvr_mask = 0xffff0000, 396 .pvr_value = 0x003f0000, 397 .cpu_name = "POWER7 (raw)", 398 .cpu_features = CPU_FTRS_POWER7, 399 .cpu_user_features = COMMON_USER_POWER7, 400 .cpu_user_features2 = COMMON_USER2_POWER7, 401 .mmu_features = MMU_FTRS_POWER7, 402 .icache_bsize = 128, 403 .dcache_bsize = 128, 404 .num_pmcs = 6, 405 .pmc_type = PPC_PMC_IBM, 406 .oprofile_cpu_type = "ppc64/power7", 407 .oprofile_type = PPC_OPROFILE_POWER4, 408 .cpu_setup = __setup_cpu_power7, 409 .cpu_restore = __restore_cpu_power7, 410 .machine_check_early = __machine_check_early_realmode_p7, 411 .platform = "power7", 412 }, 413 { /* Power7+ */ 414 .pvr_mask = 0xffff0000, 415 .pvr_value = 0x004A0000, 416 .cpu_name = "POWER7+ (raw)", 417 .cpu_features = CPU_FTRS_POWER7, 418 .cpu_user_features = COMMON_USER_POWER7, 419 .cpu_user_features2 = COMMON_USER2_POWER7, 420 .mmu_features = MMU_FTRS_POWER7, 421 .icache_bsize = 128, 422 .dcache_bsize = 128, 423 .num_pmcs = 6, 424 .pmc_type = PPC_PMC_IBM, 425 .oprofile_cpu_type = "ppc64/power7", 426 .oprofile_type = PPC_OPROFILE_POWER4, 427 .cpu_setup = __setup_cpu_power7, 428 .cpu_restore = __restore_cpu_power7, 429 .machine_check_early = __machine_check_early_realmode_p7, 430 .platform = "power7+", 431 }, 432 { /* Power8E */ 433 .pvr_mask = 0xffff0000, 434 .pvr_value = 0x004b0000, 435 .cpu_name = "POWER8E (raw)", 436 .cpu_features = CPU_FTRS_POWER8E, 437 .cpu_user_features = COMMON_USER_POWER8, 438 .cpu_user_features2 = COMMON_USER2_POWER8, 439 .mmu_features = MMU_FTRS_POWER8, 440 .icache_bsize = 128, 441 .dcache_bsize = 128, 442 .num_pmcs = 6, 443 .pmc_type = PPC_PMC_IBM, 444 .oprofile_cpu_type = "ppc64/power8", 445 .oprofile_type = PPC_OPROFILE_INVALID, 446 .cpu_setup = __setup_cpu_power8, 447 .cpu_restore = __restore_cpu_power8, 448 .machine_check_early = __machine_check_early_realmode_p8, 449 .platform = "power8", 450 }, 451 { /* Power8NVL */ 452 .pvr_mask = 0xffff0000, 453 .pvr_value = 0x004c0000, 454 .cpu_name = "POWER8NVL (raw)", 455 .cpu_features = CPU_FTRS_POWER8, 456 .cpu_user_features = COMMON_USER_POWER8, 457 .cpu_user_features2 = COMMON_USER2_POWER8, 458 .mmu_features = MMU_FTRS_POWER8, 459 .icache_bsize = 128, 460 .dcache_bsize = 128, 461 .num_pmcs = 6, 462 .pmc_type = PPC_PMC_IBM, 463 .oprofile_cpu_type = "ppc64/power8", 464 .oprofile_type = PPC_OPROFILE_INVALID, 465 .cpu_setup = __setup_cpu_power8, 466 .cpu_restore = __restore_cpu_power8, 467 .machine_check_early = __machine_check_early_realmode_p8, 468 .platform = "power8", 469 }, 470 { /* Power8 */ 471 .pvr_mask = 0xffff0000, 472 .pvr_value = 0x004d0000, 473 .cpu_name = "POWER8 (raw)", 474 .cpu_features = CPU_FTRS_POWER8, 475 .cpu_user_features = COMMON_USER_POWER8, 476 .cpu_user_features2 = COMMON_USER2_POWER8, 477 .mmu_features = MMU_FTRS_POWER8, 478 .icache_bsize = 128, 479 .dcache_bsize = 128, 480 .num_pmcs = 6, 481 .pmc_type = PPC_PMC_IBM, 482 .oprofile_cpu_type = "ppc64/power8", 483 .oprofile_type = PPC_OPROFILE_INVALID, 484 .cpu_setup = __setup_cpu_power8, 485 .cpu_restore = __restore_cpu_power8, 486 .machine_check_early = __machine_check_early_realmode_p8, 487 .platform = "power8", 488 }, 489 { /* Power9 DD2.0 */ 490 .pvr_mask = 0xffffefff, 491 .pvr_value = 0x004e0200, 492 .cpu_name = "POWER9 (raw)", 493 .cpu_features = CPU_FTRS_POWER9_DD2_0, 494 .cpu_user_features = COMMON_USER_POWER9, 495 .cpu_user_features2 = COMMON_USER2_POWER9, 496 .mmu_features = MMU_FTRS_POWER9, 497 .icache_bsize = 128, 498 .dcache_bsize = 128, 499 .num_pmcs = 6, 500 .pmc_type = PPC_PMC_IBM, 501 .oprofile_cpu_type = "ppc64/power9", 502 .oprofile_type = PPC_OPROFILE_INVALID, 503 .cpu_setup = __setup_cpu_power9, 504 .cpu_restore = __restore_cpu_power9, 505 .machine_check_early = __machine_check_early_realmode_p9, 506 .platform = "power9", 507 }, 508 { /* Power9 DD 2.1 */ 509 .pvr_mask = 0xffffefff, 510 .pvr_value = 0x004e0201, 511 .cpu_name = "POWER9 (raw)", 512 .cpu_features = CPU_FTRS_POWER9_DD2_1, 513 .cpu_user_features = COMMON_USER_POWER9, 514 .cpu_user_features2 = COMMON_USER2_POWER9, 515 .mmu_features = MMU_FTRS_POWER9, 516 .icache_bsize = 128, 517 .dcache_bsize = 128, 518 .num_pmcs = 6, 519 .pmc_type = PPC_PMC_IBM, 520 .oprofile_cpu_type = "ppc64/power9", 521 .oprofile_type = PPC_OPROFILE_INVALID, 522 .cpu_setup = __setup_cpu_power9, 523 .cpu_restore = __restore_cpu_power9, 524 .machine_check_early = __machine_check_early_realmode_p9, 525 .platform = "power9", 526 }, 527 { /* Power9 DD2.2 or later */ 528 .pvr_mask = 0xffff0000, 529 .pvr_value = 0x004e0000, 530 .cpu_name = "POWER9 (raw)", 531 .cpu_features = CPU_FTRS_POWER9_DD2_2, 532 .cpu_user_features = COMMON_USER_POWER9, 533 .cpu_user_features2 = COMMON_USER2_POWER9, 534 .mmu_features = MMU_FTRS_POWER9, 535 .icache_bsize = 128, 536 .dcache_bsize = 128, 537 .num_pmcs = 6, 538 .pmc_type = PPC_PMC_IBM, 539 .oprofile_cpu_type = "ppc64/power9", 540 .oprofile_type = PPC_OPROFILE_INVALID, 541 .cpu_setup = __setup_cpu_power9, 542 .cpu_restore = __restore_cpu_power9, 543 .machine_check_early = __machine_check_early_realmode_p9, 544 .platform = "power9", 545 }, 546 { /* Power10 */ 547 .pvr_mask = 0xffff0000, 548 .pvr_value = 0x00800000, 549 .cpu_name = "POWER10 (raw)", 550 .cpu_features = CPU_FTRS_POWER10, 551 .cpu_user_features = COMMON_USER_POWER10, 552 .cpu_user_features2 = COMMON_USER2_POWER10, 553 .mmu_features = MMU_FTRS_POWER10, 554 .icache_bsize = 128, 555 .dcache_bsize = 128, 556 .num_pmcs = 6, 557 .pmc_type = PPC_PMC_IBM, 558 .oprofile_cpu_type = "ppc64/power10", 559 .oprofile_type = PPC_OPROFILE_INVALID, 560 .cpu_setup = __setup_cpu_power10, 561 .cpu_restore = __restore_cpu_power10, 562 .machine_check_early = __machine_check_early_realmode_p10, 563 .platform = "power10", 564 }, 565 { /* Cell Broadband Engine */ 566 .pvr_mask = 0xffff0000, 567 .pvr_value = 0x00700000, 568 .cpu_name = "Cell Broadband Engine", 569 .cpu_features = CPU_FTRS_CELL, 570 .cpu_user_features = COMMON_USER_PPC64 | 571 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 572 PPC_FEATURE_SMT, 573 .mmu_features = MMU_FTRS_CELL, 574 .icache_bsize = 128, 575 .dcache_bsize = 128, 576 .num_pmcs = 4, 577 .pmc_type = PPC_PMC_IBM, 578 .oprofile_cpu_type = "ppc64/cell-be", 579 .oprofile_type = PPC_OPROFILE_CELL, 580 .platform = "ppc-cell-be", 581 }, 582 { /* PA Semi PA6T */ 583 .pvr_mask = 0x7fff0000, 584 .pvr_value = 0x00900000, 585 .cpu_name = "PA6T", 586 .cpu_features = CPU_FTRS_PA6T, 587 .cpu_user_features = COMMON_USER_PA6T, 588 .mmu_features = MMU_FTRS_PA6T, 589 .icache_bsize = 64, 590 .dcache_bsize = 64, 591 .num_pmcs = 6, 592 .pmc_type = PPC_PMC_PA6T, 593 .cpu_setup = __setup_cpu_pa6t, 594 .cpu_restore = __restore_cpu_pa6t, 595 .oprofile_cpu_type = "ppc64/pa6t", 596 .oprofile_type = PPC_OPROFILE_PA6T, 597 .platform = "pa6t", 598 }, 599 { /* default match */ 600 .pvr_mask = 0x00000000, 601 .pvr_value = 0x00000000, 602 .cpu_name = "POWER5 (compatible)", 603 .cpu_features = CPU_FTRS_COMPATIBLE, 604 .cpu_user_features = COMMON_USER_PPC64, 605 .mmu_features = MMU_FTRS_POWER, 606 .icache_bsize = 128, 607 .dcache_bsize = 128, 608 .num_pmcs = 6, 609 .pmc_type = PPC_PMC_IBM, 610 .platform = "power5", 611 } 612 #endif /* CONFIG_PPC_BOOK3S_64 */ 613 614 #ifdef CONFIG_PPC32 615 #ifdef CONFIG_PPC_BOOK3S_6xx 616 { /* 603 */ 617 .pvr_mask = 0xffff0000, 618 .pvr_value = 0x00030000, 619 .cpu_name = "603", 620 .cpu_features = CPU_FTRS_603, 621 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 622 .mmu_features = 0, 623 .icache_bsize = 32, 624 .dcache_bsize = 32, 625 .cpu_setup = __setup_cpu_603, 626 .machine_check = machine_check_generic, 627 .platform = "ppc603", 628 }, 629 { /* 603e */ 630 .pvr_mask = 0xffff0000, 631 .pvr_value = 0x00060000, 632 .cpu_name = "603e", 633 .cpu_features = CPU_FTRS_603, 634 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 635 .mmu_features = 0, 636 .icache_bsize = 32, 637 .dcache_bsize = 32, 638 .cpu_setup = __setup_cpu_603, 639 .machine_check = machine_check_generic, 640 .platform = "ppc603", 641 }, 642 { /* 603ev */ 643 .pvr_mask = 0xffff0000, 644 .pvr_value = 0x00070000, 645 .cpu_name = "603ev", 646 .cpu_features = CPU_FTRS_603, 647 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 648 .mmu_features = 0, 649 .icache_bsize = 32, 650 .dcache_bsize = 32, 651 .cpu_setup = __setup_cpu_603, 652 .machine_check = machine_check_generic, 653 .platform = "ppc603", 654 }, 655 { /* 604 */ 656 .pvr_mask = 0xffff0000, 657 .pvr_value = 0x00040000, 658 .cpu_name = "604", 659 .cpu_features = CPU_FTRS_604, 660 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 661 .mmu_features = MMU_FTR_HPTE_TABLE, 662 .icache_bsize = 32, 663 .dcache_bsize = 32, 664 .num_pmcs = 2, 665 .cpu_setup = __setup_cpu_604, 666 .machine_check = machine_check_generic, 667 .platform = "ppc604", 668 }, 669 { /* 604e */ 670 .pvr_mask = 0xfffff000, 671 .pvr_value = 0x00090000, 672 .cpu_name = "604e", 673 .cpu_features = CPU_FTRS_604, 674 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 675 .mmu_features = MMU_FTR_HPTE_TABLE, 676 .icache_bsize = 32, 677 .dcache_bsize = 32, 678 .num_pmcs = 4, 679 .cpu_setup = __setup_cpu_604, 680 .machine_check = machine_check_generic, 681 .platform = "ppc604", 682 }, 683 { /* 604r */ 684 .pvr_mask = 0xffff0000, 685 .pvr_value = 0x00090000, 686 .cpu_name = "604r", 687 .cpu_features = CPU_FTRS_604, 688 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 689 .mmu_features = MMU_FTR_HPTE_TABLE, 690 .icache_bsize = 32, 691 .dcache_bsize = 32, 692 .num_pmcs = 4, 693 .cpu_setup = __setup_cpu_604, 694 .machine_check = machine_check_generic, 695 .platform = "ppc604", 696 }, 697 { /* 604ev */ 698 .pvr_mask = 0xffff0000, 699 .pvr_value = 0x000a0000, 700 .cpu_name = "604ev", 701 .cpu_features = CPU_FTRS_604, 702 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 703 .mmu_features = MMU_FTR_HPTE_TABLE, 704 .icache_bsize = 32, 705 .dcache_bsize = 32, 706 .num_pmcs = 4, 707 .cpu_setup = __setup_cpu_604, 708 .machine_check = machine_check_generic, 709 .platform = "ppc604", 710 }, 711 { /* 740/750 (0x4202, don't support TAU ?) */ 712 .pvr_mask = 0xffffffff, 713 .pvr_value = 0x00084202, 714 .cpu_name = "740/750", 715 .cpu_features = CPU_FTRS_740_NOTAU, 716 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 717 .mmu_features = MMU_FTR_HPTE_TABLE, 718 .icache_bsize = 32, 719 .dcache_bsize = 32, 720 .num_pmcs = 4, 721 .cpu_setup = __setup_cpu_750, 722 .machine_check = machine_check_generic, 723 .platform = "ppc750", 724 }, 725 { /* 750CX (80100 and 8010x?) */ 726 .pvr_mask = 0xfffffff0, 727 .pvr_value = 0x00080100, 728 .cpu_name = "750CX", 729 .cpu_features = CPU_FTRS_750, 730 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 731 .mmu_features = MMU_FTR_HPTE_TABLE, 732 .icache_bsize = 32, 733 .dcache_bsize = 32, 734 .num_pmcs = 4, 735 .cpu_setup = __setup_cpu_750cx, 736 .machine_check = machine_check_generic, 737 .platform = "ppc750", 738 }, 739 { /* 750CX (82201 and 82202) */ 740 .pvr_mask = 0xfffffff0, 741 .pvr_value = 0x00082200, 742 .cpu_name = "750CX", 743 .cpu_features = CPU_FTRS_750, 744 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 745 .mmu_features = MMU_FTR_HPTE_TABLE, 746 .icache_bsize = 32, 747 .dcache_bsize = 32, 748 .num_pmcs = 4, 749 .pmc_type = PPC_PMC_IBM, 750 .cpu_setup = __setup_cpu_750cx, 751 .machine_check = machine_check_generic, 752 .platform = "ppc750", 753 }, 754 { /* 750CXe (82214) */ 755 .pvr_mask = 0xfffffff0, 756 .pvr_value = 0x00082210, 757 .cpu_name = "750CXe", 758 .cpu_features = CPU_FTRS_750, 759 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 760 .mmu_features = MMU_FTR_HPTE_TABLE, 761 .icache_bsize = 32, 762 .dcache_bsize = 32, 763 .num_pmcs = 4, 764 .pmc_type = PPC_PMC_IBM, 765 .cpu_setup = __setup_cpu_750cx, 766 .machine_check = machine_check_generic, 767 .platform = "ppc750", 768 }, 769 { /* 750CXe "Gekko" (83214) */ 770 .pvr_mask = 0xffffffff, 771 .pvr_value = 0x00083214, 772 .cpu_name = "750CXe", 773 .cpu_features = CPU_FTRS_750, 774 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 775 .mmu_features = MMU_FTR_HPTE_TABLE, 776 .icache_bsize = 32, 777 .dcache_bsize = 32, 778 .num_pmcs = 4, 779 .pmc_type = PPC_PMC_IBM, 780 .cpu_setup = __setup_cpu_750cx, 781 .machine_check = machine_check_generic, 782 .platform = "ppc750", 783 }, 784 { /* 750CL (and "Broadway") */ 785 .pvr_mask = 0xfffff0e0, 786 .pvr_value = 0x00087000, 787 .cpu_name = "750CL", 788 .cpu_features = CPU_FTRS_750CL, 789 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 790 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 791 .icache_bsize = 32, 792 .dcache_bsize = 32, 793 .num_pmcs = 4, 794 .pmc_type = PPC_PMC_IBM, 795 .cpu_setup = __setup_cpu_750, 796 .machine_check = machine_check_generic, 797 .platform = "ppc750", 798 .oprofile_cpu_type = "ppc/750", 799 .oprofile_type = PPC_OPROFILE_G4, 800 }, 801 { /* 745/755 */ 802 .pvr_mask = 0xfffff000, 803 .pvr_value = 0x00083000, 804 .cpu_name = "745/755", 805 .cpu_features = CPU_FTRS_750, 806 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 807 .mmu_features = MMU_FTR_HPTE_TABLE, 808 .icache_bsize = 32, 809 .dcache_bsize = 32, 810 .num_pmcs = 4, 811 .pmc_type = PPC_PMC_IBM, 812 .cpu_setup = __setup_cpu_750, 813 .machine_check = machine_check_generic, 814 .platform = "ppc750", 815 }, 816 { /* 750FX rev 1.x */ 817 .pvr_mask = 0xffffff00, 818 .pvr_value = 0x70000100, 819 .cpu_name = "750FX", 820 .cpu_features = CPU_FTRS_750FX1, 821 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 822 .mmu_features = MMU_FTR_HPTE_TABLE, 823 .icache_bsize = 32, 824 .dcache_bsize = 32, 825 .num_pmcs = 4, 826 .pmc_type = PPC_PMC_IBM, 827 .cpu_setup = __setup_cpu_750, 828 .machine_check = machine_check_generic, 829 .platform = "ppc750", 830 .oprofile_cpu_type = "ppc/750", 831 .oprofile_type = PPC_OPROFILE_G4, 832 }, 833 { /* 750FX rev 2.0 must disable HID0[DPM] */ 834 .pvr_mask = 0xffffffff, 835 .pvr_value = 0x70000200, 836 .cpu_name = "750FX", 837 .cpu_features = CPU_FTRS_750FX2, 838 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 839 .mmu_features = MMU_FTR_HPTE_TABLE, 840 .icache_bsize = 32, 841 .dcache_bsize = 32, 842 .num_pmcs = 4, 843 .pmc_type = PPC_PMC_IBM, 844 .cpu_setup = __setup_cpu_750, 845 .machine_check = machine_check_generic, 846 .platform = "ppc750", 847 .oprofile_cpu_type = "ppc/750", 848 .oprofile_type = PPC_OPROFILE_G4, 849 }, 850 { /* 750FX (All revs except 2.0) */ 851 .pvr_mask = 0xffff0000, 852 .pvr_value = 0x70000000, 853 .cpu_name = "750FX", 854 .cpu_features = CPU_FTRS_750FX, 855 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 856 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 857 .icache_bsize = 32, 858 .dcache_bsize = 32, 859 .num_pmcs = 4, 860 .pmc_type = PPC_PMC_IBM, 861 .cpu_setup = __setup_cpu_750fx, 862 .machine_check = machine_check_generic, 863 .platform = "ppc750", 864 .oprofile_cpu_type = "ppc/750", 865 .oprofile_type = PPC_OPROFILE_G4, 866 }, 867 { /* 750GX */ 868 .pvr_mask = 0xffff0000, 869 .pvr_value = 0x70020000, 870 .cpu_name = "750GX", 871 .cpu_features = CPU_FTRS_750GX, 872 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 873 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 874 .icache_bsize = 32, 875 .dcache_bsize = 32, 876 .num_pmcs = 4, 877 .pmc_type = PPC_PMC_IBM, 878 .cpu_setup = __setup_cpu_750fx, 879 .machine_check = machine_check_generic, 880 .platform = "ppc750", 881 .oprofile_cpu_type = "ppc/750", 882 .oprofile_type = PPC_OPROFILE_G4, 883 }, 884 { /* 740/750 (L2CR bit need fixup for 740) */ 885 .pvr_mask = 0xffff0000, 886 .pvr_value = 0x00080000, 887 .cpu_name = "740/750", 888 .cpu_features = CPU_FTRS_740, 889 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 890 .mmu_features = MMU_FTR_HPTE_TABLE, 891 .icache_bsize = 32, 892 .dcache_bsize = 32, 893 .num_pmcs = 4, 894 .pmc_type = PPC_PMC_IBM, 895 .cpu_setup = __setup_cpu_750, 896 .machine_check = machine_check_generic, 897 .platform = "ppc750", 898 }, 899 { /* 7400 rev 1.1 ? (no TAU) */ 900 .pvr_mask = 0xffffffff, 901 .pvr_value = 0x000c1101, 902 .cpu_name = "7400 (1.1)", 903 .cpu_features = CPU_FTRS_7400_NOTAU, 904 .cpu_user_features = COMMON_USER | 905 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 906 .mmu_features = MMU_FTR_HPTE_TABLE, 907 .icache_bsize = 32, 908 .dcache_bsize = 32, 909 .num_pmcs = 4, 910 .pmc_type = PPC_PMC_G4, 911 .cpu_setup = __setup_cpu_7400, 912 .machine_check = machine_check_generic, 913 .platform = "ppc7400", 914 }, 915 { /* 7400 */ 916 .pvr_mask = 0xffff0000, 917 .pvr_value = 0x000c0000, 918 .cpu_name = "7400", 919 .cpu_features = CPU_FTRS_7400, 920 .cpu_user_features = COMMON_USER | 921 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 922 .mmu_features = MMU_FTR_HPTE_TABLE, 923 .icache_bsize = 32, 924 .dcache_bsize = 32, 925 .num_pmcs = 4, 926 .pmc_type = PPC_PMC_G4, 927 .cpu_setup = __setup_cpu_7400, 928 .machine_check = machine_check_generic, 929 .platform = "ppc7400", 930 }, 931 { /* 7410 */ 932 .pvr_mask = 0xffff0000, 933 .pvr_value = 0x800c0000, 934 .cpu_name = "7410", 935 .cpu_features = CPU_FTRS_7400, 936 .cpu_user_features = COMMON_USER | 937 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 938 .mmu_features = MMU_FTR_HPTE_TABLE, 939 .icache_bsize = 32, 940 .dcache_bsize = 32, 941 .num_pmcs = 4, 942 .pmc_type = PPC_PMC_G4, 943 .cpu_setup = __setup_cpu_7410, 944 .machine_check = machine_check_generic, 945 .platform = "ppc7400", 946 }, 947 { /* 7450 2.0 - no doze/nap */ 948 .pvr_mask = 0xffffffff, 949 .pvr_value = 0x80000200, 950 .cpu_name = "7450", 951 .cpu_features = CPU_FTRS_7450_20, 952 .cpu_user_features = COMMON_USER | 953 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 954 .mmu_features = MMU_FTR_HPTE_TABLE, 955 .icache_bsize = 32, 956 .dcache_bsize = 32, 957 .num_pmcs = 6, 958 .pmc_type = PPC_PMC_G4, 959 .cpu_setup = __setup_cpu_745x, 960 .oprofile_cpu_type = "ppc/7450", 961 .oprofile_type = PPC_OPROFILE_G4, 962 .machine_check = machine_check_generic, 963 .platform = "ppc7450", 964 }, 965 { /* 7450 2.1 */ 966 .pvr_mask = 0xffffffff, 967 .pvr_value = 0x80000201, 968 .cpu_name = "7450", 969 .cpu_features = CPU_FTRS_7450_21, 970 .cpu_user_features = COMMON_USER | 971 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 972 .mmu_features = MMU_FTR_HPTE_TABLE, 973 .icache_bsize = 32, 974 .dcache_bsize = 32, 975 .num_pmcs = 6, 976 .pmc_type = PPC_PMC_G4, 977 .cpu_setup = __setup_cpu_745x, 978 .oprofile_cpu_type = "ppc/7450", 979 .oprofile_type = PPC_OPROFILE_G4, 980 .machine_check = machine_check_generic, 981 .platform = "ppc7450", 982 }, 983 { /* 7450 2.3 and newer */ 984 .pvr_mask = 0xffff0000, 985 .pvr_value = 0x80000000, 986 .cpu_name = "7450", 987 .cpu_features = CPU_FTRS_7450_23, 988 .cpu_user_features = COMMON_USER | 989 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 990 .mmu_features = MMU_FTR_HPTE_TABLE, 991 .icache_bsize = 32, 992 .dcache_bsize = 32, 993 .num_pmcs = 6, 994 .pmc_type = PPC_PMC_G4, 995 .cpu_setup = __setup_cpu_745x, 996 .oprofile_cpu_type = "ppc/7450", 997 .oprofile_type = PPC_OPROFILE_G4, 998 .machine_check = machine_check_generic, 999 .platform = "ppc7450", 1000 }, 1001 { /* 7455 rev 1.x */ 1002 .pvr_mask = 0xffffff00, 1003 .pvr_value = 0x80010100, 1004 .cpu_name = "7455", 1005 .cpu_features = CPU_FTRS_7455_1, 1006 .cpu_user_features = COMMON_USER | 1007 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1008 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1009 .icache_bsize = 32, 1010 .dcache_bsize = 32, 1011 .num_pmcs = 6, 1012 .pmc_type = PPC_PMC_G4, 1013 .cpu_setup = __setup_cpu_745x, 1014 .oprofile_cpu_type = "ppc/7450", 1015 .oprofile_type = PPC_OPROFILE_G4, 1016 .machine_check = machine_check_generic, 1017 .platform = "ppc7450", 1018 }, 1019 { /* 7455 rev 2.0 */ 1020 .pvr_mask = 0xffffffff, 1021 .pvr_value = 0x80010200, 1022 .cpu_name = "7455", 1023 .cpu_features = CPU_FTRS_7455_20, 1024 .cpu_user_features = COMMON_USER | 1025 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1026 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1027 .icache_bsize = 32, 1028 .dcache_bsize = 32, 1029 .num_pmcs = 6, 1030 .pmc_type = PPC_PMC_G4, 1031 .cpu_setup = __setup_cpu_745x, 1032 .oprofile_cpu_type = "ppc/7450", 1033 .oprofile_type = PPC_OPROFILE_G4, 1034 .machine_check = machine_check_generic, 1035 .platform = "ppc7450", 1036 }, 1037 { /* 7455 others */ 1038 .pvr_mask = 0xffff0000, 1039 .pvr_value = 0x80010000, 1040 .cpu_name = "7455", 1041 .cpu_features = CPU_FTRS_7455, 1042 .cpu_user_features = COMMON_USER | 1043 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1044 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1045 .icache_bsize = 32, 1046 .dcache_bsize = 32, 1047 .num_pmcs = 6, 1048 .pmc_type = PPC_PMC_G4, 1049 .cpu_setup = __setup_cpu_745x, 1050 .oprofile_cpu_type = "ppc/7450", 1051 .oprofile_type = PPC_OPROFILE_G4, 1052 .machine_check = machine_check_generic, 1053 .platform = "ppc7450", 1054 }, 1055 { /* 7447/7457 Rev 1.0 */ 1056 .pvr_mask = 0xffffffff, 1057 .pvr_value = 0x80020100, 1058 .cpu_name = "7447/7457", 1059 .cpu_features = CPU_FTRS_7447_10, 1060 .cpu_user_features = COMMON_USER | 1061 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1062 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1063 .icache_bsize = 32, 1064 .dcache_bsize = 32, 1065 .num_pmcs = 6, 1066 .pmc_type = PPC_PMC_G4, 1067 .cpu_setup = __setup_cpu_745x, 1068 .oprofile_cpu_type = "ppc/7450", 1069 .oprofile_type = PPC_OPROFILE_G4, 1070 .machine_check = machine_check_generic, 1071 .platform = "ppc7450", 1072 }, 1073 { /* 7447/7457 Rev 1.1 */ 1074 .pvr_mask = 0xffffffff, 1075 .pvr_value = 0x80020101, 1076 .cpu_name = "7447/7457", 1077 .cpu_features = CPU_FTRS_7447_10, 1078 .cpu_user_features = COMMON_USER | 1079 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1080 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1081 .icache_bsize = 32, 1082 .dcache_bsize = 32, 1083 .num_pmcs = 6, 1084 .pmc_type = PPC_PMC_G4, 1085 .cpu_setup = __setup_cpu_745x, 1086 .oprofile_cpu_type = "ppc/7450", 1087 .oprofile_type = PPC_OPROFILE_G4, 1088 .machine_check = machine_check_generic, 1089 .platform = "ppc7450", 1090 }, 1091 { /* 7447/7457 Rev 1.2 and later */ 1092 .pvr_mask = 0xffff0000, 1093 .pvr_value = 0x80020000, 1094 .cpu_name = "7447/7457", 1095 .cpu_features = CPU_FTRS_7447, 1096 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1097 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1098 .icache_bsize = 32, 1099 .dcache_bsize = 32, 1100 .num_pmcs = 6, 1101 .pmc_type = PPC_PMC_G4, 1102 .cpu_setup = __setup_cpu_745x, 1103 .oprofile_cpu_type = "ppc/7450", 1104 .oprofile_type = PPC_OPROFILE_G4, 1105 .machine_check = machine_check_generic, 1106 .platform = "ppc7450", 1107 }, 1108 { /* 7447A */ 1109 .pvr_mask = 0xffff0000, 1110 .pvr_value = 0x80030000, 1111 .cpu_name = "7447A", 1112 .cpu_features = CPU_FTRS_7447A, 1113 .cpu_user_features = COMMON_USER | 1114 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1115 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1116 .icache_bsize = 32, 1117 .dcache_bsize = 32, 1118 .num_pmcs = 6, 1119 .pmc_type = PPC_PMC_G4, 1120 .cpu_setup = __setup_cpu_745x, 1121 .oprofile_cpu_type = "ppc/7450", 1122 .oprofile_type = PPC_OPROFILE_G4, 1123 .machine_check = machine_check_generic, 1124 .platform = "ppc7450", 1125 }, 1126 { /* 7448 */ 1127 .pvr_mask = 0xffff0000, 1128 .pvr_value = 0x80040000, 1129 .cpu_name = "7448", 1130 .cpu_features = CPU_FTRS_7448, 1131 .cpu_user_features = COMMON_USER | 1132 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1133 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1134 .icache_bsize = 32, 1135 .dcache_bsize = 32, 1136 .num_pmcs = 6, 1137 .pmc_type = PPC_PMC_G4, 1138 .cpu_setup = __setup_cpu_745x, 1139 .oprofile_cpu_type = "ppc/7450", 1140 .oprofile_type = PPC_OPROFILE_G4, 1141 .machine_check = machine_check_generic, 1142 .platform = "ppc7450", 1143 }, 1144 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1145 .pvr_mask = 0x7fff0000, 1146 .pvr_value = 0x00810000, 1147 .cpu_name = "82xx", 1148 .cpu_features = CPU_FTRS_82XX, 1149 .cpu_user_features = COMMON_USER, 1150 .mmu_features = 0, 1151 .icache_bsize = 32, 1152 .dcache_bsize = 32, 1153 .cpu_setup = __setup_cpu_603, 1154 .machine_check = machine_check_generic, 1155 .platform = "ppc603", 1156 }, 1157 { /* All G2_LE (603e core, plus some) have the same pvr */ 1158 .pvr_mask = 0x7fff0000, 1159 .pvr_value = 0x00820000, 1160 .cpu_name = "G2_LE", 1161 .cpu_features = CPU_FTRS_G2_LE, 1162 .cpu_user_features = COMMON_USER, 1163 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1164 .icache_bsize = 32, 1165 .dcache_bsize = 32, 1166 .cpu_setup = __setup_cpu_603, 1167 .machine_check = machine_check_generic, 1168 .platform = "ppc603", 1169 }, 1170 #ifdef CONFIG_PPC_83xx 1171 { /* e300c1 (a 603e core, plus some) on 83xx */ 1172 .pvr_mask = 0x7fff0000, 1173 .pvr_value = 0x00830000, 1174 .cpu_name = "e300c1", 1175 .cpu_features = CPU_FTRS_E300, 1176 .cpu_user_features = COMMON_USER, 1177 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1178 .icache_bsize = 32, 1179 .dcache_bsize = 32, 1180 .cpu_setup = __setup_cpu_603, 1181 .machine_check = machine_check_83xx, 1182 .platform = "ppc603", 1183 }, 1184 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1185 .pvr_mask = 0x7fff0000, 1186 .pvr_value = 0x00840000, 1187 .cpu_name = "e300c2", 1188 .cpu_features = CPU_FTRS_E300C2, 1189 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1190 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1191 MMU_FTR_NEED_DTLB_SW_LRU, 1192 .icache_bsize = 32, 1193 .dcache_bsize = 32, 1194 .cpu_setup = __setup_cpu_603, 1195 .machine_check = machine_check_83xx, 1196 .platform = "ppc603", 1197 }, 1198 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1199 .pvr_mask = 0x7fff0000, 1200 .pvr_value = 0x00850000, 1201 .cpu_name = "e300c3", 1202 .cpu_features = CPU_FTRS_E300, 1203 .cpu_user_features = COMMON_USER, 1204 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1205 MMU_FTR_NEED_DTLB_SW_LRU, 1206 .icache_bsize = 32, 1207 .dcache_bsize = 32, 1208 .cpu_setup = __setup_cpu_603, 1209 .machine_check = machine_check_83xx, 1210 .num_pmcs = 4, 1211 .oprofile_cpu_type = "ppc/e300", 1212 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1213 .platform = "ppc603", 1214 }, 1215 { /* e300c4 (e300c1, plus one IU) */ 1216 .pvr_mask = 0x7fff0000, 1217 .pvr_value = 0x00860000, 1218 .cpu_name = "e300c4", 1219 .cpu_features = CPU_FTRS_E300, 1220 .cpu_user_features = COMMON_USER, 1221 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1222 MMU_FTR_NEED_DTLB_SW_LRU, 1223 .icache_bsize = 32, 1224 .dcache_bsize = 32, 1225 .cpu_setup = __setup_cpu_603, 1226 .machine_check = machine_check_83xx, 1227 .num_pmcs = 4, 1228 .oprofile_cpu_type = "ppc/e300", 1229 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1230 .platform = "ppc603", 1231 }, 1232 #endif 1233 { /* default match, we assume split I/D cache & TB (non-601)... */ 1234 .pvr_mask = 0x00000000, 1235 .pvr_value = 0x00000000, 1236 .cpu_name = "(generic PPC)", 1237 .cpu_features = CPU_FTRS_CLASSIC32, 1238 .cpu_user_features = COMMON_USER, 1239 .mmu_features = MMU_FTR_HPTE_TABLE, 1240 .icache_bsize = 32, 1241 .dcache_bsize = 32, 1242 .machine_check = machine_check_generic, 1243 .platform = "ppc603", 1244 }, 1245 #endif /* CONFIG_PPC_BOOK3S_6xx */ 1246 #ifdef CONFIG_PPC_8xx 1247 { /* 8xx */ 1248 .pvr_mask = 0xffff0000, 1249 .pvr_value = PVR_8xx, 1250 .cpu_name = "8xx", 1251 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1252 * if the 8xx code is there.... */ 1253 .cpu_features = CPU_FTRS_8XX, 1254 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1255 .mmu_features = MMU_FTR_TYPE_8xx, 1256 .icache_bsize = 16, 1257 .dcache_bsize = 16, 1258 .machine_check = machine_check_8xx, 1259 .platform = "ppc823", 1260 }, 1261 #endif /* CONFIG_PPC_8xx */ 1262 #ifdef CONFIG_40x 1263 { /* STB 04xxx */ 1264 .pvr_mask = 0xffff0000, 1265 .pvr_value = 0x41810000, 1266 .cpu_name = "STB04xxx", 1267 .cpu_features = CPU_FTRS_40X, 1268 .cpu_user_features = PPC_FEATURE_32 | 1269 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1270 .mmu_features = MMU_FTR_TYPE_40x, 1271 .icache_bsize = 32, 1272 .dcache_bsize = 32, 1273 .machine_check = machine_check_4xx, 1274 .platform = "ppc405", 1275 }, 1276 { /* NP405L */ 1277 .pvr_mask = 0xffff0000, 1278 .pvr_value = 0x41610000, 1279 .cpu_name = "NP405L", 1280 .cpu_features = CPU_FTRS_40X, 1281 .cpu_user_features = PPC_FEATURE_32 | 1282 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1283 .mmu_features = MMU_FTR_TYPE_40x, 1284 .icache_bsize = 32, 1285 .dcache_bsize = 32, 1286 .machine_check = machine_check_4xx, 1287 .platform = "ppc405", 1288 }, 1289 { /* NP4GS3 */ 1290 .pvr_mask = 0xffff0000, 1291 .pvr_value = 0x40B10000, 1292 .cpu_name = "NP4GS3", 1293 .cpu_features = CPU_FTRS_40X, 1294 .cpu_user_features = PPC_FEATURE_32 | 1295 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1296 .mmu_features = MMU_FTR_TYPE_40x, 1297 .icache_bsize = 32, 1298 .dcache_bsize = 32, 1299 .machine_check = machine_check_4xx, 1300 .platform = "ppc405", 1301 }, 1302 { /* NP405H */ 1303 .pvr_mask = 0xffff0000, 1304 .pvr_value = 0x41410000, 1305 .cpu_name = "NP405H", 1306 .cpu_features = CPU_FTRS_40X, 1307 .cpu_user_features = PPC_FEATURE_32 | 1308 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1309 .mmu_features = MMU_FTR_TYPE_40x, 1310 .icache_bsize = 32, 1311 .dcache_bsize = 32, 1312 .machine_check = machine_check_4xx, 1313 .platform = "ppc405", 1314 }, 1315 { /* 405GPr */ 1316 .pvr_mask = 0xffff0000, 1317 .pvr_value = 0x50910000, 1318 .cpu_name = "405GPr", 1319 .cpu_features = CPU_FTRS_40X, 1320 .cpu_user_features = PPC_FEATURE_32 | 1321 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1322 .mmu_features = MMU_FTR_TYPE_40x, 1323 .icache_bsize = 32, 1324 .dcache_bsize = 32, 1325 .machine_check = machine_check_4xx, 1326 .platform = "ppc405", 1327 }, 1328 { /* STBx25xx */ 1329 .pvr_mask = 0xffff0000, 1330 .pvr_value = 0x51510000, 1331 .cpu_name = "STBx25xx", 1332 .cpu_features = CPU_FTRS_40X, 1333 .cpu_user_features = PPC_FEATURE_32 | 1334 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1335 .mmu_features = MMU_FTR_TYPE_40x, 1336 .icache_bsize = 32, 1337 .dcache_bsize = 32, 1338 .machine_check = machine_check_4xx, 1339 .platform = "ppc405", 1340 }, 1341 { /* 405LP */ 1342 .pvr_mask = 0xffff0000, 1343 .pvr_value = 0x41F10000, 1344 .cpu_name = "405LP", 1345 .cpu_features = CPU_FTRS_40X, 1346 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1347 .mmu_features = MMU_FTR_TYPE_40x, 1348 .icache_bsize = 32, 1349 .dcache_bsize = 32, 1350 .machine_check = machine_check_4xx, 1351 .platform = "ppc405", 1352 }, 1353 { /* 405EP */ 1354 .pvr_mask = 0xffff0000, 1355 .pvr_value = 0x51210000, 1356 .cpu_name = "405EP", 1357 .cpu_features = CPU_FTRS_40X, 1358 .cpu_user_features = PPC_FEATURE_32 | 1359 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1360 .mmu_features = MMU_FTR_TYPE_40x, 1361 .icache_bsize = 32, 1362 .dcache_bsize = 32, 1363 .machine_check = machine_check_4xx, 1364 .platform = "ppc405", 1365 }, 1366 { /* 405EX Rev. A/B with Security */ 1367 .pvr_mask = 0xffff000f, 1368 .pvr_value = 0x12910007, 1369 .cpu_name = "405EX Rev. A/B", 1370 .cpu_features = CPU_FTRS_40X, 1371 .cpu_user_features = PPC_FEATURE_32 | 1372 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1373 .mmu_features = MMU_FTR_TYPE_40x, 1374 .icache_bsize = 32, 1375 .dcache_bsize = 32, 1376 .machine_check = machine_check_4xx, 1377 .platform = "ppc405", 1378 }, 1379 { /* 405EX Rev. C without Security */ 1380 .pvr_mask = 0xffff000f, 1381 .pvr_value = 0x1291000d, 1382 .cpu_name = "405EX Rev. C", 1383 .cpu_features = CPU_FTRS_40X, 1384 .cpu_user_features = PPC_FEATURE_32 | 1385 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1386 .mmu_features = MMU_FTR_TYPE_40x, 1387 .icache_bsize = 32, 1388 .dcache_bsize = 32, 1389 .machine_check = machine_check_4xx, 1390 .platform = "ppc405", 1391 }, 1392 { /* 405EX Rev. C with Security */ 1393 .pvr_mask = 0xffff000f, 1394 .pvr_value = 0x1291000f, 1395 .cpu_name = "405EX Rev. C", 1396 .cpu_features = CPU_FTRS_40X, 1397 .cpu_user_features = PPC_FEATURE_32 | 1398 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1399 .mmu_features = MMU_FTR_TYPE_40x, 1400 .icache_bsize = 32, 1401 .dcache_bsize = 32, 1402 .machine_check = machine_check_4xx, 1403 .platform = "ppc405", 1404 }, 1405 { /* 405EX Rev. D without Security */ 1406 .pvr_mask = 0xffff000f, 1407 .pvr_value = 0x12910003, 1408 .cpu_name = "405EX Rev. D", 1409 .cpu_features = CPU_FTRS_40X, 1410 .cpu_user_features = PPC_FEATURE_32 | 1411 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1412 .mmu_features = MMU_FTR_TYPE_40x, 1413 .icache_bsize = 32, 1414 .dcache_bsize = 32, 1415 .machine_check = machine_check_4xx, 1416 .platform = "ppc405", 1417 }, 1418 { /* 405EX Rev. D with Security */ 1419 .pvr_mask = 0xffff000f, 1420 .pvr_value = 0x12910005, 1421 .cpu_name = "405EX Rev. D", 1422 .cpu_features = CPU_FTRS_40X, 1423 .cpu_user_features = PPC_FEATURE_32 | 1424 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1425 .mmu_features = MMU_FTR_TYPE_40x, 1426 .icache_bsize = 32, 1427 .dcache_bsize = 32, 1428 .machine_check = machine_check_4xx, 1429 .platform = "ppc405", 1430 }, 1431 { /* 405EXr Rev. A/B without Security */ 1432 .pvr_mask = 0xffff000f, 1433 .pvr_value = 0x12910001, 1434 .cpu_name = "405EXr Rev. A/B", 1435 .cpu_features = CPU_FTRS_40X, 1436 .cpu_user_features = PPC_FEATURE_32 | 1437 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1438 .mmu_features = MMU_FTR_TYPE_40x, 1439 .icache_bsize = 32, 1440 .dcache_bsize = 32, 1441 .machine_check = machine_check_4xx, 1442 .platform = "ppc405", 1443 }, 1444 { /* 405EXr Rev. C without Security */ 1445 .pvr_mask = 0xffff000f, 1446 .pvr_value = 0x12910009, 1447 .cpu_name = "405EXr Rev. C", 1448 .cpu_features = CPU_FTRS_40X, 1449 .cpu_user_features = PPC_FEATURE_32 | 1450 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1451 .mmu_features = MMU_FTR_TYPE_40x, 1452 .icache_bsize = 32, 1453 .dcache_bsize = 32, 1454 .machine_check = machine_check_4xx, 1455 .platform = "ppc405", 1456 }, 1457 { /* 405EXr Rev. C with Security */ 1458 .pvr_mask = 0xffff000f, 1459 .pvr_value = 0x1291000b, 1460 .cpu_name = "405EXr Rev. C", 1461 .cpu_features = CPU_FTRS_40X, 1462 .cpu_user_features = PPC_FEATURE_32 | 1463 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1464 .mmu_features = MMU_FTR_TYPE_40x, 1465 .icache_bsize = 32, 1466 .dcache_bsize = 32, 1467 .machine_check = machine_check_4xx, 1468 .platform = "ppc405", 1469 }, 1470 { /* 405EXr Rev. D without Security */ 1471 .pvr_mask = 0xffff000f, 1472 .pvr_value = 0x12910000, 1473 .cpu_name = "405EXr Rev. D", 1474 .cpu_features = CPU_FTRS_40X, 1475 .cpu_user_features = PPC_FEATURE_32 | 1476 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1477 .mmu_features = MMU_FTR_TYPE_40x, 1478 .icache_bsize = 32, 1479 .dcache_bsize = 32, 1480 .machine_check = machine_check_4xx, 1481 .platform = "ppc405", 1482 }, 1483 { /* 405EXr Rev. D with Security */ 1484 .pvr_mask = 0xffff000f, 1485 .pvr_value = 0x12910002, 1486 .cpu_name = "405EXr Rev. D", 1487 .cpu_features = CPU_FTRS_40X, 1488 .cpu_user_features = PPC_FEATURE_32 | 1489 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1490 .mmu_features = MMU_FTR_TYPE_40x, 1491 .icache_bsize = 32, 1492 .dcache_bsize = 32, 1493 .machine_check = machine_check_4xx, 1494 .platform = "ppc405", 1495 }, 1496 { 1497 /* 405EZ */ 1498 .pvr_mask = 0xffff0000, 1499 .pvr_value = 0x41510000, 1500 .cpu_name = "405EZ", 1501 .cpu_features = CPU_FTRS_40X, 1502 .cpu_user_features = PPC_FEATURE_32 | 1503 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1504 .mmu_features = MMU_FTR_TYPE_40x, 1505 .icache_bsize = 32, 1506 .dcache_bsize = 32, 1507 .machine_check = machine_check_4xx, 1508 .platform = "ppc405", 1509 }, 1510 { /* APM8018X */ 1511 .pvr_mask = 0xffff0000, 1512 .pvr_value = 0x7ff11432, 1513 .cpu_name = "APM8018X", 1514 .cpu_features = CPU_FTRS_40X, 1515 .cpu_user_features = PPC_FEATURE_32 | 1516 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1517 .mmu_features = MMU_FTR_TYPE_40x, 1518 .icache_bsize = 32, 1519 .dcache_bsize = 32, 1520 .machine_check = machine_check_4xx, 1521 .platform = "ppc405", 1522 }, 1523 { /* default match */ 1524 .pvr_mask = 0x00000000, 1525 .pvr_value = 0x00000000, 1526 .cpu_name = "(generic 40x PPC)", 1527 .cpu_features = CPU_FTRS_40X, 1528 .cpu_user_features = PPC_FEATURE_32 | 1529 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1530 .mmu_features = MMU_FTR_TYPE_40x, 1531 .icache_bsize = 32, 1532 .dcache_bsize = 32, 1533 .machine_check = machine_check_4xx, 1534 .platform = "ppc405", 1535 } 1536 1537 #endif /* CONFIG_40x */ 1538 #ifdef CONFIG_44x 1539 { 1540 .pvr_mask = 0xf0000fff, 1541 .pvr_value = 0x40000850, 1542 .cpu_name = "440GR Rev. A", 1543 .cpu_features = CPU_FTRS_44X, 1544 .cpu_user_features = COMMON_USER_BOOKE, 1545 .mmu_features = MMU_FTR_TYPE_44x, 1546 .icache_bsize = 32, 1547 .dcache_bsize = 32, 1548 .machine_check = machine_check_4xx, 1549 .platform = "ppc440", 1550 }, 1551 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1552 .pvr_mask = 0xf0000fff, 1553 .pvr_value = 0x40000858, 1554 .cpu_name = "440EP Rev. A", 1555 .cpu_features = CPU_FTRS_44X, 1556 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1557 .mmu_features = MMU_FTR_TYPE_44x, 1558 .icache_bsize = 32, 1559 .dcache_bsize = 32, 1560 .cpu_setup = __setup_cpu_440ep, 1561 .machine_check = machine_check_4xx, 1562 .platform = "ppc440", 1563 }, 1564 { 1565 .pvr_mask = 0xf0000fff, 1566 .pvr_value = 0x400008d3, 1567 .cpu_name = "440GR Rev. B", 1568 .cpu_features = CPU_FTRS_44X, 1569 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1570 .mmu_features = MMU_FTR_TYPE_44x, 1571 .icache_bsize = 32, 1572 .dcache_bsize = 32, 1573 .machine_check = machine_check_4xx, 1574 .platform = "ppc440", 1575 }, 1576 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1577 .pvr_mask = 0xf0000ff7, 1578 .pvr_value = 0x400008d4, 1579 .cpu_name = "440EP Rev. C", 1580 .cpu_features = CPU_FTRS_44X, 1581 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1582 .mmu_features = MMU_FTR_TYPE_44x, 1583 .icache_bsize = 32, 1584 .dcache_bsize = 32, 1585 .cpu_setup = __setup_cpu_440ep, 1586 .machine_check = machine_check_4xx, 1587 .platform = "ppc440", 1588 }, 1589 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1590 .pvr_mask = 0xf0000fff, 1591 .pvr_value = 0x400008db, 1592 .cpu_name = "440EP Rev. B", 1593 .cpu_features = CPU_FTRS_44X, 1594 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1595 .mmu_features = MMU_FTR_TYPE_44x, 1596 .icache_bsize = 32, 1597 .dcache_bsize = 32, 1598 .cpu_setup = __setup_cpu_440ep, 1599 .machine_check = machine_check_4xx, 1600 .platform = "ppc440", 1601 }, 1602 { /* 440GRX */ 1603 .pvr_mask = 0xf0000ffb, 1604 .pvr_value = 0x200008D0, 1605 .cpu_name = "440GRX", 1606 .cpu_features = CPU_FTRS_44X, 1607 .cpu_user_features = COMMON_USER_BOOKE, 1608 .mmu_features = MMU_FTR_TYPE_44x, 1609 .icache_bsize = 32, 1610 .dcache_bsize = 32, 1611 .cpu_setup = __setup_cpu_440grx, 1612 .machine_check = machine_check_440A, 1613 .platform = "ppc440", 1614 }, 1615 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1616 .pvr_mask = 0xf0000ffb, 1617 .pvr_value = 0x200008D8, 1618 .cpu_name = "440EPX", 1619 .cpu_features = CPU_FTRS_44X, 1620 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1621 .mmu_features = MMU_FTR_TYPE_44x, 1622 .icache_bsize = 32, 1623 .dcache_bsize = 32, 1624 .cpu_setup = __setup_cpu_440epx, 1625 .machine_check = machine_check_440A, 1626 .platform = "ppc440", 1627 }, 1628 { /* 440GP Rev. B */ 1629 .pvr_mask = 0xf0000fff, 1630 .pvr_value = 0x40000440, 1631 .cpu_name = "440GP Rev. B", 1632 .cpu_features = CPU_FTRS_44X, 1633 .cpu_user_features = COMMON_USER_BOOKE, 1634 .mmu_features = MMU_FTR_TYPE_44x, 1635 .icache_bsize = 32, 1636 .dcache_bsize = 32, 1637 .machine_check = machine_check_4xx, 1638 .platform = "ppc440gp", 1639 }, 1640 { /* 440GP Rev. C */ 1641 .pvr_mask = 0xf0000fff, 1642 .pvr_value = 0x40000481, 1643 .cpu_name = "440GP Rev. C", 1644 .cpu_features = CPU_FTRS_44X, 1645 .cpu_user_features = COMMON_USER_BOOKE, 1646 .mmu_features = MMU_FTR_TYPE_44x, 1647 .icache_bsize = 32, 1648 .dcache_bsize = 32, 1649 .machine_check = machine_check_4xx, 1650 .platform = "ppc440gp", 1651 }, 1652 { /* 440GX Rev. A */ 1653 .pvr_mask = 0xf0000fff, 1654 .pvr_value = 0x50000850, 1655 .cpu_name = "440GX Rev. A", 1656 .cpu_features = CPU_FTRS_44X, 1657 .cpu_user_features = COMMON_USER_BOOKE, 1658 .mmu_features = MMU_FTR_TYPE_44x, 1659 .icache_bsize = 32, 1660 .dcache_bsize = 32, 1661 .cpu_setup = __setup_cpu_440gx, 1662 .machine_check = machine_check_440A, 1663 .platform = "ppc440", 1664 }, 1665 { /* 440GX Rev. B */ 1666 .pvr_mask = 0xf0000fff, 1667 .pvr_value = 0x50000851, 1668 .cpu_name = "440GX Rev. B", 1669 .cpu_features = CPU_FTRS_44X, 1670 .cpu_user_features = COMMON_USER_BOOKE, 1671 .mmu_features = MMU_FTR_TYPE_44x, 1672 .icache_bsize = 32, 1673 .dcache_bsize = 32, 1674 .cpu_setup = __setup_cpu_440gx, 1675 .machine_check = machine_check_440A, 1676 .platform = "ppc440", 1677 }, 1678 { /* 440GX Rev. C */ 1679 .pvr_mask = 0xf0000fff, 1680 .pvr_value = 0x50000892, 1681 .cpu_name = "440GX Rev. C", 1682 .cpu_features = CPU_FTRS_44X, 1683 .cpu_user_features = COMMON_USER_BOOKE, 1684 .mmu_features = MMU_FTR_TYPE_44x, 1685 .icache_bsize = 32, 1686 .dcache_bsize = 32, 1687 .cpu_setup = __setup_cpu_440gx, 1688 .machine_check = machine_check_440A, 1689 .platform = "ppc440", 1690 }, 1691 { /* 440GX Rev. F */ 1692 .pvr_mask = 0xf0000fff, 1693 .pvr_value = 0x50000894, 1694 .cpu_name = "440GX Rev. F", 1695 .cpu_features = CPU_FTRS_44X, 1696 .cpu_user_features = COMMON_USER_BOOKE, 1697 .mmu_features = MMU_FTR_TYPE_44x, 1698 .icache_bsize = 32, 1699 .dcache_bsize = 32, 1700 .cpu_setup = __setup_cpu_440gx, 1701 .machine_check = machine_check_440A, 1702 .platform = "ppc440", 1703 }, 1704 { /* 440SP Rev. A */ 1705 .pvr_mask = 0xfff00fff, 1706 .pvr_value = 0x53200891, 1707 .cpu_name = "440SP Rev. A", 1708 .cpu_features = CPU_FTRS_44X, 1709 .cpu_user_features = COMMON_USER_BOOKE, 1710 .mmu_features = MMU_FTR_TYPE_44x, 1711 .icache_bsize = 32, 1712 .dcache_bsize = 32, 1713 .machine_check = machine_check_4xx, 1714 .platform = "ppc440", 1715 }, 1716 { /* 440SPe Rev. A */ 1717 .pvr_mask = 0xfff00fff, 1718 .pvr_value = 0x53400890, 1719 .cpu_name = "440SPe Rev. A", 1720 .cpu_features = CPU_FTRS_44X, 1721 .cpu_user_features = COMMON_USER_BOOKE, 1722 .mmu_features = MMU_FTR_TYPE_44x, 1723 .icache_bsize = 32, 1724 .dcache_bsize = 32, 1725 .cpu_setup = __setup_cpu_440spe, 1726 .machine_check = machine_check_440A, 1727 .platform = "ppc440", 1728 }, 1729 { /* 440SPe Rev. B */ 1730 .pvr_mask = 0xfff00fff, 1731 .pvr_value = 0x53400891, 1732 .cpu_name = "440SPe Rev. B", 1733 .cpu_features = CPU_FTRS_44X, 1734 .cpu_user_features = COMMON_USER_BOOKE, 1735 .mmu_features = MMU_FTR_TYPE_44x, 1736 .icache_bsize = 32, 1737 .dcache_bsize = 32, 1738 .cpu_setup = __setup_cpu_440spe, 1739 .machine_check = machine_check_440A, 1740 .platform = "ppc440", 1741 }, 1742 { /* 460EX */ 1743 .pvr_mask = 0xffff0006, 1744 .pvr_value = 0x13020002, 1745 .cpu_name = "460EX", 1746 .cpu_features = CPU_FTRS_440x6, 1747 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1748 .mmu_features = MMU_FTR_TYPE_44x, 1749 .icache_bsize = 32, 1750 .dcache_bsize = 32, 1751 .cpu_setup = __setup_cpu_460ex, 1752 .machine_check = machine_check_440A, 1753 .platform = "ppc440", 1754 }, 1755 { /* 460EX Rev B */ 1756 .pvr_mask = 0xffff0007, 1757 .pvr_value = 0x13020004, 1758 .cpu_name = "460EX Rev. B", 1759 .cpu_features = CPU_FTRS_440x6, 1760 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1761 .mmu_features = MMU_FTR_TYPE_44x, 1762 .icache_bsize = 32, 1763 .dcache_bsize = 32, 1764 .cpu_setup = __setup_cpu_460ex, 1765 .machine_check = machine_check_440A, 1766 .platform = "ppc440", 1767 }, 1768 { /* 460GT */ 1769 .pvr_mask = 0xffff0006, 1770 .pvr_value = 0x13020000, 1771 .cpu_name = "460GT", 1772 .cpu_features = CPU_FTRS_440x6, 1773 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1774 .mmu_features = MMU_FTR_TYPE_44x, 1775 .icache_bsize = 32, 1776 .dcache_bsize = 32, 1777 .cpu_setup = __setup_cpu_460gt, 1778 .machine_check = machine_check_440A, 1779 .platform = "ppc440", 1780 }, 1781 { /* 460GT Rev B */ 1782 .pvr_mask = 0xffff0007, 1783 .pvr_value = 0x13020005, 1784 .cpu_name = "460GT Rev. B", 1785 .cpu_features = CPU_FTRS_440x6, 1786 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1787 .mmu_features = MMU_FTR_TYPE_44x, 1788 .icache_bsize = 32, 1789 .dcache_bsize = 32, 1790 .cpu_setup = __setup_cpu_460gt, 1791 .machine_check = machine_check_440A, 1792 .platform = "ppc440", 1793 }, 1794 { /* 460SX */ 1795 .pvr_mask = 0xffffff00, 1796 .pvr_value = 0x13541800, 1797 .cpu_name = "460SX", 1798 .cpu_features = CPU_FTRS_44X, 1799 .cpu_user_features = COMMON_USER_BOOKE, 1800 .mmu_features = MMU_FTR_TYPE_44x, 1801 .icache_bsize = 32, 1802 .dcache_bsize = 32, 1803 .cpu_setup = __setup_cpu_460sx, 1804 .machine_check = machine_check_440A, 1805 .platform = "ppc440", 1806 }, 1807 { /* 464 in APM821xx */ 1808 .pvr_mask = 0xfffffff0, 1809 .pvr_value = 0x12C41C80, 1810 .cpu_name = "APM821XX", 1811 .cpu_features = CPU_FTRS_44X, 1812 .cpu_user_features = COMMON_USER_BOOKE | 1813 PPC_FEATURE_HAS_FPU, 1814 .mmu_features = MMU_FTR_TYPE_44x, 1815 .icache_bsize = 32, 1816 .dcache_bsize = 32, 1817 .cpu_setup = __setup_cpu_apm821xx, 1818 .machine_check = machine_check_440A, 1819 .platform = "ppc440", 1820 }, 1821 #ifdef CONFIG_PPC_47x 1822 { /* 476 DD2 core */ 1823 .pvr_mask = 0xffffffff, 1824 .pvr_value = 0x11a52080, 1825 .cpu_name = "476", 1826 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1827 .cpu_user_features = COMMON_USER_BOOKE | 1828 PPC_FEATURE_HAS_FPU, 1829 .mmu_features = MMU_FTR_TYPE_47x | 1830 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1831 .icache_bsize = 32, 1832 .dcache_bsize = 128, 1833 .machine_check = machine_check_47x, 1834 .platform = "ppc470", 1835 }, 1836 { /* 476fpe */ 1837 .pvr_mask = 0xffff0000, 1838 .pvr_value = 0x7ff50000, 1839 .cpu_name = "476fpe", 1840 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1841 .cpu_user_features = COMMON_USER_BOOKE | 1842 PPC_FEATURE_HAS_FPU, 1843 .mmu_features = MMU_FTR_TYPE_47x | 1844 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1845 .icache_bsize = 32, 1846 .dcache_bsize = 128, 1847 .machine_check = machine_check_47x, 1848 .platform = "ppc470", 1849 }, 1850 { /* 476 iss */ 1851 .pvr_mask = 0xffff0000, 1852 .pvr_value = 0x00050000, 1853 .cpu_name = "476", 1854 .cpu_features = CPU_FTRS_47X, 1855 .cpu_user_features = COMMON_USER_BOOKE | 1856 PPC_FEATURE_HAS_FPU, 1857 .mmu_features = MMU_FTR_TYPE_47x | 1858 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1859 .icache_bsize = 32, 1860 .dcache_bsize = 128, 1861 .machine_check = machine_check_47x, 1862 .platform = "ppc470", 1863 }, 1864 { /* 476 others */ 1865 .pvr_mask = 0xffff0000, 1866 .pvr_value = 0x11a50000, 1867 .cpu_name = "476", 1868 .cpu_features = CPU_FTRS_47X, 1869 .cpu_user_features = COMMON_USER_BOOKE | 1870 PPC_FEATURE_HAS_FPU, 1871 .mmu_features = MMU_FTR_TYPE_47x | 1872 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1873 .icache_bsize = 32, 1874 .dcache_bsize = 128, 1875 .machine_check = machine_check_47x, 1876 .platform = "ppc470", 1877 }, 1878 #endif /* CONFIG_PPC_47x */ 1879 { /* default match */ 1880 .pvr_mask = 0x00000000, 1881 .pvr_value = 0x00000000, 1882 .cpu_name = "(generic 44x PPC)", 1883 .cpu_features = CPU_FTRS_44X, 1884 .cpu_user_features = COMMON_USER_BOOKE, 1885 .mmu_features = MMU_FTR_TYPE_44x, 1886 .icache_bsize = 32, 1887 .dcache_bsize = 32, 1888 .machine_check = machine_check_4xx, 1889 .platform = "ppc440", 1890 } 1891 #endif /* CONFIG_44x */ 1892 #ifdef CONFIG_E200 1893 { /* e200z5 */ 1894 .pvr_mask = 0xfff00000, 1895 .pvr_value = 0x81000000, 1896 .cpu_name = "e200z5", 1897 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1898 .cpu_features = CPU_FTRS_E200, 1899 .cpu_user_features = COMMON_USER_BOOKE | 1900 PPC_FEATURE_HAS_EFP_SINGLE | 1901 PPC_FEATURE_UNIFIED_CACHE, 1902 .mmu_features = MMU_FTR_TYPE_FSL_E, 1903 .dcache_bsize = 32, 1904 .machine_check = machine_check_e200, 1905 .platform = "ppc5554", 1906 }, 1907 { /* e200z6 */ 1908 .pvr_mask = 0xfff00000, 1909 .pvr_value = 0x81100000, 1910 .cpu_name = "e200z6", 1911 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1912 .cpu_features = CPU_FTRS_E200, 1913 .cpu_user_features = COMMON_USER_BOOKE | 1914 PPC_FEATURE_HAS_SPE_COMP | 1915 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1916 PPC_FEATURE_UNIFIED_CACHE, 1917 .mmu_features = MMU_FTR_TYPE_FSL_E, 1918 .dcache_bsize = 32, 1919 .machine_check = machine_check_e200, 1920 .platform = "ppc5554", 1921 }, 1922 { /* default match */ 1923 .pvr_mask = 0x00000000, 1924 .pvr_value = 0x00000000, 1925 .cpu_name = "(generic E200 PPC)", 1926 .cpu_features = CPU_FTRS_E200, 1927 .cpu_user_features = COMMON_USER_BOOKE | 1928 PPC_FEATURE_HAS_EFP_SINGLE | 1929 PPC_FEATURE_UNIFIED_CACHE, 1930 .mmu_features = MMU_FTR_TYPE_FSL_E, 1931 .dcache_bsize = 32, 1932 .cpu_setup = __setup_cpu_e200, 1933 .machine_check = machine_check_e200, 1934 .platform = "ppc5554", 1935 } 1936 #endif /* CONFIG_E200 */ 1937 #endif /* CONFIG_PPC32 */ 1938 #ifdef CONFIG_E500 1939 #ifdef CONFIG_PPC32 1940 #ifndef CONFIG_PPC_E500MC 1941 { /* e500 */ 1942 .pvr_mask = 0xffff0000, 1943 .pvr_value = 0x80200000, 1944 .cpu_name = "e500", 1945 .cpu_features = CPU_FTRS_E500, 1946 .cpu_user_features = COMMON_USER_BOOKE | 1947 PPC_FEATURE_HAS_SPE_COMP | 1948 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1949 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1950 .mmu_features = MMU_FTR_TYPE_FSL_E, 1951 .icache_bsize = 32, 1952 .dcache_bsize = 32, 1953 .num_pmcs = 4, 1954 .oprofile_cpu_type = "ppc/e500", 1955 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1956 .cpu_setup = __setup_cpu_e500v1, 1957 .machine_check = machine_check_e500, 1958 .platform = "ppc8540", 1959 }, 1960 { /* e500v2 */ 1961 .pvr_mask = 0xffff0000, 1962 .pvr_value = 0x80210000, 1963 .cpu_name = "e500v2", 1964 .cpu_features = CPU_FTRS_E500_2, 1965 .cpu_user_features = COMMON_USER_BOOKE | 1966 PPC_FEATURE_HAS_SPE_COMP | 1967 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1968 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1969 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1970 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1971 .icache_bsize = 32, 1972 .dcache_bsize = 32, 1973 .num_pmcs = 4, 1974 .oprofile_cpu_type = "ppc/e500", 1975 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1976 .cpu_setup = __setup_cpu_e500v2, 1977 .machine_check = machine_check_e500, 1978 .platform = "ppc8548", 1979 .cpu_down_flush = cpu_down_flush_e500v2, 1980 }, 1981 #else 1982 { /* e500mc */ 1983 .pvr_mask = 0xffff0000, 1984 .pvr_value = 0x80230000, 1985 .cpu_name = "e500mc", 1986 .cpu_features = CPU_FTRS_E500MC, 1987 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1988 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1989 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1990 MMU_FTR_USE_TLBILX, 1991 .icache_bsize = 64, 1992 .dcache_bsize = 64, 1993 .num_pmcs = 4, 1994 .oprofile_cpu_type = "ppc/e500mc", 1995 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1996 .cpu_setup = __setup_cpu_e500mc, 1997 .machine_check = machine_check_e500mc, 1998 .platform = "ppce500mc", 1999 .cpu_down_flush = cpu_down_flush_e500mc, 2000 }, 2001 #endif /* CONFIG_PPC_E500MC */ 2002 #endif /* CONFIG_PPC32 */ 2003 #ifdef CONFIG_PPC_E500MC 2004 { /* e5500 */ 2005 .pvr_mask = 0xffff0000, 2006 .pvr_value = 0x80240000, 2007 .cpu_name = "e5500", 2008 .cpu_features = CPU_FTRS_E5500, 2009 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2010 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2011 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2012 MMU_FTR_USE_TLBILX, 2013 .icache_bsize = 64, 2014 .dcache_bsize = 64, 2015 .num_pmcs = 4, 2016 .oprofile_cpu_type = "ppc/e500mc", 2017 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2018 .cpu_setup = __setup_cpu_e5500, 2019 #ifndef CONFIG_PPC32 2020 .cpu_restore = __restore_cpu_e5500, 2021 #endif 2022 .machine_check = machine_check_e500mc, 2023 .platform = "ppce5500", 2024 .cpu_down_flush = cpu_down_flush_e5500, 2025 }, 2026 { /* e6500 */ 2027 .pvr_mask = 0xffff0000, 2028 .pvr_value = 0x80400000, 2029 .cpu_name = "e6500", 2030 .cpu_features = CPU_FTRS_E6500, 2031 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2032 PPC_FEATURE_HAS_ALTIVEC_COMP, 2033 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2034 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2035 MMU_FTR_USE_TLBILX, 2036 .icache_bsize = 64, 2037 .dcache_bsize = 64, 2038 .num_pmcs = 6, 2039 .oprofile_cpu_type = "ppc/e6500", 2040 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2041 .cpu_setup = __setup_cpu_e6500, 2042 #ifndef CONFIG_PPC32 2043 .cpu_restore = __restore_cpu_e6500, 2044 #endif 2045 .machine_check = machine_check_e500mc, 2046 .platform = "ppce6500", 2047 .cpu_down_flush = cpu_down_flush_e6500, 2048 }, 2049 #endif /* CONFIG_PPC_E500MC */ 2050 #ifdef CONFIG_PPC32 2051 { /* default match */ 2052 .pvr_mask = 0x00000000, 2053 .pvr_value = 0x00000000, 2054 .cpu_name = "(generic E500 PPC)", 2055 .cpu_features = CPU_FTRS_E500, 2056 .cpu_user_features = COMMON_USER_BOOKE | 2057 PPC_FEATURE_HAS_SPE_COMP | 2058 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2059 .mmu_features = MMU_FTR_TYPE_FSL_E, 2060 .icache_bsize = 32, 2061 .dcache_bsize = 32, 2062 .machine_check = machine_check_e500, 2063 .platform = "powerpc", 2064 } 2065 #endif /* CONFIG_PPC32 */ 2066 #endif /* CONFIG_E500 */ 2067 }; 2068 2069 void __init set_cur_cpu_spec(struct cpu_spec *s) 2070 { 2071 struct cpu_spec *t = &the_cpu_spec; 2072 2073 t = PTRRELOC(t); 2074 /* 2075 * use memcpy() instead of *t = *s so that GCC replaces it 2076 * by __memcpy() when KASAN is active 2077 */ 2078 memcpy(t, s, sizeof(*t)); 2079 2080 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2081 } 2082 2083 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2084 struct cpu_spec *s) 2085 { 2086 struct cpu_spec *t = &the_cpu_spec; 2087 struct cpu_spec old; 2088 2089 t = PTRRELOC(t); 2090 old = *t; 2091 2092 /* 2093 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2094 * so that GCC replaces it by __memcpy() when KASAN is active 2095 */ 2096 memcpy(t, s, sizeof(*t)); 2097 2098 /* 2099 * If we are overriding a previous value derived from the real 2100 * PVR with a new value obtained using a logical PVR value, 2101 * don't modify the performance monitor fields. 2102 */ 2103 if (old.num_pmcs && !s->num_pmcs) { 2104 t->num_pmcs = old.num_pmcs; 2105 t->pmc_type = old.pmc_type; 2106 t->oprofile_type = old.oprofile_type; 2107 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2108 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2109 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2110 2111 /* 2112 * If we have passed through this logic once before and 2113 * have pulled the default case because the real PVR was 2114 * not found inside cpu_specs[], then we are possibly 2115 * running in compatibility mode. In that case, let the 2116 * oprofiler know which set of compatibility counters to 2117 * pull from by making sure the oprofile_cpu_type string 2118 * is set to that of compatibility mode. If the 2119 * oprofile_cpu_type already has a value, then we are 2120 * possibly overriding a real PVR with a logical one, 2121 * and, in that case, keep the current value for 2122 * oprofile_cpu_type. Futhermore, let's ensure that the 2123 * fix for the PMAO bug is enabled on compatibility mode. 2124 */ 2125 if (old.oprofile_cpu_type != NULL) { 2126 t->oprofile_cpu_type = old.oprofile_cpu_type; 2127 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2128 } 2129 } 2130 2131 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2132 2133 /* 2134 * Set the base platform string once; assumes 2135 * we're called with real pvr first. 2136 */ 2137 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2138 *PTRRELOC(&powerpc_base_platform) = t->platform; 2139 2140 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2141 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2142 * that processor. I will consolidate that at a later time, for now, 2143 * just use #ifdef. We also don't need to PTRRELOC the function 2144 * pointer on ppc64 and booke as we are running at 0 in real mode 2145 * on ppc64 and reloc_offset is always 0 on booke. 2146 */ 2147 if (t->cpu_setup) { 2148 t->cpu_setup(offset, t); 2149 } 2150 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2151 2152 return t; 2153 } 2154 2155 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2156 { 2157 struct cpu_spec *s = cpu_specs; 2158 int i; 2159 2160 s = PTRRELOC(s); 2161 2162 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2163 if ((pvr & s->pvr_mask) == s->pvr_value) 2164 return setup_cpu_spec(offset, s); 2165 } 2166 2167 BUG(); 2168 2169 return NULL; 2170 } 2171 2172 /* 2173 * Used by cpufeatures to get the name for CPUs with a PVR table. 2174 * If they don't hae a PVR table, cpufeatures gets the name from 2175 * cpu device-tree node. 2176 */ 2177 void __init identify_cpu_name(unsigned int pvr) 2178 { 2179 struct cpu_spec *s = cpu_specs; 2180 struct cpu_spec *t = &the_cpu_spec; 2181 int i; 2182 2183 s = PTRRELOC(s); 2184 t = PTRRELOC(t); 2185 2186 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2187 if ((pvr & s->pvr_mask) == s->pvr_value) { 2188 t->cpu_name = s->cpu_name; 2189 return; 2190 } 2191 } 2192 } 2193 2194 2195 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2196 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2197 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2198 }; 2199 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2200 2201 void __init cpu_feature_keys_init(void) 2202 { 2203 int i; 2204 2205 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2206 unsigned long f = 1ul << i; 2207 2208 if (!(cur_cpu_spec->cpu_features & f)) 2209 static_branch_disable(&cpu_feature_keys[i]); 2210 } 2211 } 2212 2213 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2214 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2215 }; 2216 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2217 2218 void __init mmu_feature_keys_init(void) 2219 { 2220 int i; 2221 2222 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2223 unsigned long f = 1ul << i; 2224 2225 if (!(cur_cpu_spec->mmu_features & f)) 2226 static_branch_disable(&mmu_feature_keys[i]); 2227 } 2228 } 2229 #endif 2230