xref: /linux/arch/powerpc/kernel/cputable.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84)
1 /*
2  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3  *
4  *  Modifications for ppc64:
5  *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6  *
7  *  This program is free software; you can redistribute it and/or
8  *  modify it under the terms of the GNU General Public License
9  *  as published by the Free Software Foundation; either version
10  *  2 of the License, or (at your option) any later version.
11  */
12 
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/sched.h>
16 #include <linux/threads.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22 
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25 
26 /* NOTE:
27  * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28  * the responsibility of the appropriate CPU save/restore functions to
29  * eventually copy these settings over. Those save/restore aren't yet
30  * part of the cputable though. That has to be fixed for both ppc32
31  * and ppc64
32  */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
44 
45 /* This table only contains "desktop" CPUs, it need to be filled with embedded
46  * ones as well...
47  */
48 #define COMMON_USER		(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
49 				 PPC_FEATURE_HAS_MMU)
50 #define COMMON_USER_PPC64	(COMMON_USER | PPC_FEATURE_64)
51 #define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
52 #define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
53 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
54 #define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
55 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
56 #define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
57 				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
58 				 PPC_FEATURE_TRUE_LE)
59 #define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
60 				 PPC_FEATURE_BOOKE)
61 
62 /* We only set the spe features if the kernel was compiled with
63  * spe support
64  */
65 #ifdef CONFIG_SPE
66 #define PPC_FEATURE_SPE_COMP	PPC_FEATURE_HAS_SPE
67 #else
68 #define PPC_FEATURE_SPE_COMP	0
69 #endif
70 
71 struct cpu_spec	cpu_specs[] = {
72 #ifdef CONFIG_PPC64
73 	{	/* Power3 */
74 		.pvr_mask		= 0xffff0000,
75 		.pvr_value		= 0x00400000,
76 		.cpu_name		= "POWER3 (630)",
77 		.cpu_features		= CPU_FTRS_POWER3,
78 		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
79 		.icache_bsize		= 128,
80 		.dcache_bsize		= 128,
81 		.num_pmcs		= 8,
82 		.oprofile_cpu_type	= "ppc64/power3",
83 		.oprofile_type		= PPC_OPROFILE_RS64,
84 		.platform		= "power3",
85 	},
86 	{	/* Power3+ */
87 		.pvr_mask		= 0xffff0000,
88 		.pvr_value		= 0x00410000,
89 		.cpu_name		= "POWER3 (630+)",
90 		.cpu_features		= CPU_FTRS_POWER3,
91 		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
92 		.icache_bsize		= 128,
93 		.dcache_bsize		= 128,
94 		.num_pmcs		= 8,
95 		.oprofile_cpu_type	= "ppc64/power3",
96 		.oprofile_type		= PPC_OPROFILE_RS64,
97 		.platform		= "power3",
98 	},
99 	{	/* Northstar */
100 		.pvr_mask		= 0xffff0000,
101 		.pvr_value		= 0x00330000,
102 		.cpu_name		= "RS64-II (northstar)",
103 		.cpu_features		= CPU_FTRS_RS64,
104 		.cpu_user_features	= COMMON_USER_PPC64,
105 		.icache_bsize		= 128,
106 		.dcache_bsize		= 128,
107 		.num_pmcs		= 8,
108 		.oprofile_cpu_type	= "ppc64/rs64",
109 		.oprofile_type		= PPC_OPROFILE_RS64,
110 		.platform		= "rs64",
111 	},
112 	{	/* Pulsar */
113 		.pvr_mask		= 0xffff0000,
114 		.pvr_value		= 0x00340000,
115 		.cpu_name		= "RS64-III (pulsar)",
116 		.cpu_features		= CPU_FTRS_RS64,
117 		.cpu_user_features	= COMMON_USER_PPC64,
118 		.icache_bsize		= 128,
119 		.dcache_bsize		= 128,
120 		.num_pmcs		= 8,
121 		.oprofile_cpu_type	= "ppc64/rs64",
122 		.oprofile_type		= PPC_OPROFILE_RS64,
123 		.platform		= "rs64",
124 	},
125 	{	/* I-star */
126 		.pvr_mask		= 0xffff0000,
127 		.pvr_value		= 0x00360000,
128 		.cpu_name		= "RS64-III (icestar)",
129 		.cpu_features		= CPU_FTRS_RS64,
130 		.cpu_user_features	= COMMON_USER_PPC64,
131 		.icache_bsize		= 128,
132 		.dcache_bsize		= 128,
133 		.num_pmcs		= 8,
134 		.oprofile_cpu_type	= "ppc64/rs64",
135 		.oprofile_type		= PPC_OPROFILE_RS64,
136 		.platform		= "rs64",
137 	},
138 	{	/* S-star */
139 		.pvr_mask		= 0xffff0000,
140 		.pvr_value		= 0x00370000,
141 		.cpu_name		= "RS64-IV (sstar)",
142 		.cpu_features		= CPU_FTRS_RS64,
143 		.cpu_user_features	= COMMON_USER_PPC64,
144 		.icache_bsize		= 128,
145 		.dcache_bsize		= 128,
146 		.num_pmcs		= 8,
147 		.oprofile_cpu_type	= "ppc64/rs64",
148 		.oprofile_type		= PPC_OPROFILE_RS64,
149 		.platform		= "rs64",
150 	},
151 	{	/* Power4 */
152 		.pvr_mask		= 0xffff0000,
153 		.pvr_value		= 0x00350000,
154 		.cpu_name		= "POWER4 (gp)",
155 		.cpu_features		= CPU_FTRS_POWER4,
156 		.cpu_user_features	= COMMON_USER_POWER4,
157 		.icache_bsize		= 128,
158 		.dcache_bsize		= 128,
159 		.num_pmcs		= 8,
160 		.oprofile_cpu_type	= "ppc64/power4",
161 		.oprofile_type		= PPC_OPROFILE_POWER4,
162 		.platform		= "power4",
163 	},
164 	{	/* Power4+ */
165 		.pvr_mask		= 0xffff0000,
166 		.pvr_value		= 0x00380000,
167 		.cpu_name		= "POWER4+ (gq)",
168 		.cpu_features		= CPU_FTRS_POWER4,
169 		.cpu_user_features	= COMMON_USER_POWER4,
170 		.icache_bsize		= 128,
171 		.dcache_bsize		= 128,
172 		.num_pmcs		= 8,
173 		.oprofile_cpu_type	= "ppc64/power4",
174 		.oprofile_type		= PPC_OPROFILE_POWER4,
175 		.platform		= "power4",
176 	},
177 	{	/* PPC970 */
178 		.pvr_mask		= 0xffff0000,
179 		.pvr_value		= 0x00390000,
180 		.cpu_name		= "PPC970",
181 		.cpu_features		= CPU_FTRS_PPC970,
182 		.cpu_user_features	= COMMON_USER_POWER4 |
183 			PPC_FEATURE_HAS_ALTIVEC_COMP,
184 		.icache_bsize		= 128,
185 		.dcache_bsize		= 128,
186 		.num_pmcs		= 8,
187 		.cpu_setup		= __setup_cpu_ppc970,
188 		.oprofile_cpu_type	= "ppc64/970",
189 		.oprofile_type		= PPC_OPROFILE_POWER4,
190 		.platform		= "ppc970",
191 	},
192 	{	/* PPC970FX */
193 		.pvr_mask		= 0xffff0000,
194 		.pvr_value		= 0x003c0000,
195 		.cpu_name		= "PPC970FX",
196 		.cpu_features		= CPU_FTRS_PPC970,
197 		.cpu_user_features	= COMMON_USER_POWER4 |
198 			PPC_FEATURE_HAS_ALTIVEC_COMP,
199 		.icache_bsize		= 128,
200 		.dcache_bsize		= 128,
201 		.num_pmcs		= 8,
202 		.cpu_setup		= __setup_cpu_ppc970,
203 		.oprofile_cpu_type	= "ppc64/970",
204 		.oprofile_type		= PPC_OPROFILE_POWER4,
205 		.platform		= "ppc970",
206 	},
207 	{	/* PPC970MP */
208 		.pvr_mask		= 0xffff0000,
209 		.pvr_value		= 0x00440000,
210 		.cpu_name		= "PPC970MP",
211 		.cpu_features		= CPU_FTRS_PPC970,
212 		.cpu_user_features	= COMMON_USER_POWER4 |
213 			PPC_FEATURE_HAS_ALTIVEC_COMP,
214 		.icache_bsize		= 128,
215 		.dcache_bsize		= 128,
216 		.num_pmcs		= 8,
217 		.cpu_setup		= __setup_cpu_ppc970,
218 		.oprofile_cpu_type	= "ppc64/970",
219 		.oprofile_type		= PPC_OPROFILE_POWER4,
220 		.platform		= "ppc970",
221 	},
222 	{	/* Power5 GR */
223 		.pvr_mask		= 0xffff0000,
224 		.pvr_value		= 0x003a0000,
225 		.cpu_name		= "POWER5 (gr)",
226 		.cpu_features		= CPU_FTRS_POWER5,
227 		.cpu_user_features	= COMMON_USER_POWER5,
228 		.icache_bsize		= 128,
229 		.dcache_bsize		= 128,
230 		.num_pmcs		= 6,
231 		.oprofile_cpu_type	= "ppc64/power5",
232 		.oprofile_type		= PPC_OPROFILE_POWER4,
233 		/* SIHV / SIPR bits are implemented on POWER4+ (GQ)
234 		 * and above but only works on POWER5 and above
235 		 */
236 		.oprofile_mmcra_sihv	= MMCRA_SIHV,
237 		.oprofile_mmcra_sipr	= MMCRA_SIPR,
238 		.platform		= "power5",
239 	},
240 	{	/* Power5 GS */
241 		.pvr_mask		= 0xffff0000,
242 		.pvr_value		= 0x003b0000,
243 		.cpu_name		= "POWER5+ (gs)",
244 		.cpu_features		= CPU_FTRS_POWER5,
245 		.cpu_user_features	= COMMON_USER_POWER5_PLUS,
246 		.icache_bsize		= 128,
247 		.dcache_bsize		= 128,
248 		.num_pmcs		= 6,
249 		.oprofile_cpu_type	= "ppc64/power5+",
250 		.oprofile_type		= PPC_OPROFILE_POWER4,
251 		.oprofile_mmcra_sihv	= MMCRA_SIHV,
252 		.oprofile_mmcra_sipr	= MMCRA_SIPR,
253 		.platform		= "power5+",
254 	},
255 	{	/* Power6 */
256 		.pvr_mask		= 0xffff0000,
257 		.pvr_value		= 0x003e0000,
258 		.cpu_name		= "POWER6",
259 		.cpu_features		= CPU_FTRS_POWER6,
260 		.cpu_user_features	= COMMON_USER_POWER6,
261 		.icache_bsize		= 128,
262 		.dcache_bsize		= 128,
263 		.num_pmcs		= 8,
264 		.oprofile_cpu_type	= "ppc64/power6",
265 		.oprofile_type		= PPC_OPROFILE_POWER4,
266  		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,
267  		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,
268  		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |
269  			POWER6_MMCRA_OTHER,
270 		.platform		= "power6",
271 	},
272 	{	/* Cell Broadband Engine */
273 		.pvr_mask		= 0xffff0000,
274 		.pvr_value		= 0x00700000,
275 		.cpu_name		= "Cell Broadband Engine",
276 		.cpu_features		= CPU_FTRS_CELL,
277 		.cpu_user_features	= COMMON_USER_PPC64 |
278 			PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
279 			PPC_FEATURE_SMT,
280 		.icache_bsize		= 128,
281 		.dcache_bsize		= 128,
282 		.platform		= "ppc-cell-be",
283 	},
284 	{	/* default match */
285 		.pvr_mask		= 0x00000000,
286 		.pvr_value		= 0x00000000,
287 		.cpu_name		= "POWER4 (compatible)",
288 		.cpu_features		= CPU_FTRS_COMPATIBLE,
289 		.cpu_user_features	= COMMON_USER_PPC64,
290 		.icache_bsize		= 128,
291 		.dcache_bsize		= 128,
292 		.num_pmcs		= 6,
293 		.platform		= "power4",
294 	}
295 #endif	/* CONFIG_PPC64 */
296 #ifdef CONFIG_PPC32
297 #if CLASSIC_PPC
298 	{	/* 601 */
299 		.pvr_mask		= 0xffff0000,
300 		.pvr_value		= 0x00010000,
301 		.cpu_name		= "601",
302 		.cpu_features		= CPU_FTRS_PPC601,
303 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_601_INSTR |
304 			PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
305 		.icache_bsize		= 32,
306 		.dcache_bsize		= 32,
307 		.platform		= "ppc601",
308 	},
309 	{	/* 603 */
310 		.pvr_mask		= 0xffff0000,
311 		.pvr_value		= 0x00030000,
312 		.cpu_name		= "603",
313 		.cpu_features		= CPU_FTRS_603,
314 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
315 		.icache_bsize		= 32,
316 		.dcache_bsize		= 32,
317 		.cpu_setup		= __setup_cpu_603,
318 		.platform		= "ppc603",
319 	},
320 	{	/* 603e */
321 		.pvr_mask		= 0xffff0000,
322 		.pvr_value		= 0x00060000,
323 		.cpu_name		= "603e",
324 		.cpu_features		= CPU_FTRS_603,
325 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
326 		.icache_bsize		= 32,
327 		.dcache_bsize		= 32,
328 		.cpu_setup		= __setup_cpu_603,
329 		.platform		= "ppc603",
330 	},
331 	{	/* 603ev */
332 		.pvr_mask		= 0xffff0000,
333 		.pvr_value		= 0x00070000,
334 		.cpu_name		= "603ev",
335 		.cpu_features		= CPU_FTRS_603,
336 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
337 		.icache_bsize		= 32,
338 		.dcache_bsize		= 32,
339 		.cpu_setup		= __setup_cpu_603,
340 		.platform		= "ppc603",
341 	},
342 	{	/* 604 */
343 		.pvr_mask		= 0xffff0000,
344 		.pvr_value		= 0x00040000,
345 		.cpu_name		= "604",
346 		.cpu_features		= CPU_FTRS_604,
347 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
348 		.icache_bsize		= 32,
349 		.dcache_bsize		= 32,
350 		.num_pmcs		= 2,
351 		.cpu_setup		= __setup_cpu_604,
352 		.platform		= "ppc604",
353 	},
354 	{	/* 604e */
355 		.pvr_mask		= 0xfffff000,
356 		.pvr_value		= 0x00090000,
357 		.cpu_name		= "604e",
358 		.cpu_features		= CPU_FTRS_604,
359 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
360 		.icache_bsize		= 32,
361 		.dcache_bsize		= 32,
362 		.num_pmcs		= 4,
363 		.cpu_setup		= __setup_cpu_604,
364 		.platform		= "ppc604",
365 	},
366 	{	/* 604r */
367 		.pvr_mask		= 0xffff0000,
368 		.pvr_value		= 0x00090000,
369 		.cpu_name		= "604r",
370 		.cpu_features		= CPU_FTRS_604,
371 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
372 		.icache_bsize		= 32,
373 		.dcache_bsize		= 32,
374 		.num_pmcs		= 4,
375 		.cpu_setup		= __setup_cpu_604,
376 		.platform		= "ppc604",
377 	},
378 	{	/* 604ev */
379 		.pvr_mask		= 0xffff0000,
380 		.pvr_value		= 0x000a0000,
381 		.cpu_name		= "604ev",
382 		.cpu_features		= CPU_FTRS_604,
383 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
384 		.icache_bsize		= 32,
385 		.dcache_bsize		= 32,
386 		.num_pmcs		= 4,
387 		.cpu_setup		= __setup_cpu_604,
388 		.platform		= "ppc604",
389 	},
390 	{	/* 740/750 (0x4202, don't support TAU ?) */
391 		.pvr_mask		= 0xffffffff,
392 		.pvr_value		= 0x00084202,
393 		.cpu_name		= "740/750",
394 		.cpu_features		= CPU_FTRS_740_NOTAU,
395 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
396 		.icache_bsize		= 32,
397 		.dcache_bsize		= 32,
398 		.num_pmcs		= 4,
399 		.cpu_setup		= __setup_cpu_750,
400 		.platform		= "ppc750",
401 	},
402 	{	/* 750CX (80100 and 8010x?) */
403 		.pvr_mask		= 0xfffffff0,
404 		.pvr_value		= 0x00080100,
405 		.cpu_name		= "750CX",
406 		.cpu_features		= CPU_FTRS_750,
407 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
408 		.icache_bsize		= 32,
409 		.dcache_bsize		= 32,
410 		.num_pmcs		= 4,
411 		.cpu_setup		= __setup_cpu_750cx,
412 		.platform		= "ppc750",
413 	},
414 	{	/* 750CX (82201 and 82202) */
415 		.pvr_mask		= 0xfffffff0,
416 		.pvr_value		= 0x00082200,
417 		.cpu_name		= "750CX",
418 		.cpu_features		= CPU_FTRS_750,
419 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
420 		.icache_bsize		= 32,
421 		.dcache_bsize		= 32,
422 		.num_pmcs		= 4,
423 		.cpu_setup		= __setup_cpu_750cx,
424 		.platform		= "ppc750",
425 	},
426 	{	/* 750CXe (82214) */
427 		.pvr_mask		= 0xfffffff0,
428 		.pvr_value		= 0x00082210,
429 		.cpu_name		= "750CXe",
430 		.cpu_features		= CPU_FTRS_750,
431 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
432 		.icache_bsize		= 32,
433 		.dcache_bsize		= 32,
434 		.num_pmcs		= 4,
435 		.cpu_setup		= __setup_cpu_750cx,
436 		.platform		= "ppc750",
437 	},
438 	{	/* 750CXe "Gekko" (83214) */
439 		.pvr_mask		= 0xffffffff,
440 		.pvr_value		= 0x00083214,
441 		.cpu_name		= "750CXe",
442 		.cpu_features		= CPU_FTRS_750,
443 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
444 		.icache_bsize		= 32,
445 		.dcache_bsize		= 32,
446 		.num_pmcs		= 4,
447 		.cpu_setup		= __setup_cpu_750cx,
448 		.platform		= "ppc750",
449 	},
450 	{	/* 745/755 */
451 		.pvr_mask		= 0xfffff000,
452 		.pvr_value		= 0x00083000,
453 		.cpu_name		= "745/755",
454 		.cpu_features		= CPU_FTRS_750,
455 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
456 		.icache_bsize		= 32,
457 		.dcache_bsize		= 32,
458 		.num_pmcs		= 4,
459 		.cpu_setup		= __setup_cpu_750,
460 		.platform		= "ppc750",
461 	},
462 	{	/* 750FX rev 1.x */
463 		.pvr_mask		= 0xffffff00,
464 		.pvr_value		= 0x70000100,
465 		.cpu_name		= "750FX",
466 		.cpu_features		= CPU_FTRS_750FX1,
467 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
468 		.icache_bsize		= 32,
469 		.dcache_bsize		= 32,
470 		.num_pmcs		= 4,
471 		.cpu_setup		= __setup_cpu_750,
472 		.platform		= "ppc750",
473 	},
474 	{	/* 750FX rev 2.0 must disable HID0[DPM] */
475 		.pvr_mask		= 0xffffffff,
476 		.pvr_value		= 0x70000200,
477 		.cpu_name		= "750FX",
478 		.cpu_features		= CPU_FTRS_750FX2,
479 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
480 		.icache_bsize		= 32,
481 		.dcache_bsize		= 32,
482 		.num_pmcs		= 4,
483 		.cpu_setup		= __setup_cpu_750,
484 		.platform		= "ppc750",
485 	},
486 	{	/* 750FX (All revs except 2.0) */
487 		.pvr_mask		= 0xffff0000,
488 		.pvr_value		= 0x70000000,
489 		.cpu_name		= "750FX",
490 		.cpu_features		= CPU_FTRS_750FX,
491 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
492 		.icache_bsize		= 32,
493 		.dcache_bsize		= 32,
494 		.num_pmcs		= 4,
495 		.cpu_setup		= __setup_cpu_750fx,
496 		.platform		= "ppc750",
497 	},
498 	{	/* 750GX */
499 		.pvr_mask		= 0xffff0000,
500 		.pvr_value		= 0x70020000,
501 		.cpu_name		= "750GX",
502 		.cpu_features		= CPU_FTRS_750GX,
503 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
504 		.icache_bsize		= 32,
505 		.dcache_bsize		= 32,
506 		.num_pmcs		= 4,
507 		.cpu_setup		= __setup_cpu_750fx,
508 		.platform		= "ppc750",
509 	},
510 	{	/* 740/750 (L2CR bit need fixup for 740) */
511 		.pvr_mask		= 0xffff0000,
512 		.pvr_value		= 0x00080000,
513 		.cpu_name		= "740/750",
514 		.cpu_features		= CPU_FTRS_740,
515 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_PPC_LE,
516 		.icache_bsize		= 32,
517 		.dcache_bsize		= 32,
518 		.num_pmcs		= 4,
519 		.cpu_setup		= __setup_cpu_750,
520 		.platform		= "ppc750",
521 	},
522 	{	/* 7400 rev 1.1 ? (no TAU) */
523 		.pvr_mask		= 0xffffffff,
524 		.pvr_value		= 0x000c1101,
525 		.cpu_name		= "7400 (1.1)",
526 		.cpu_features		= CPU_FTRS_7400_NOTAU,
527 		.cpu_user_features	= COMMON_USER |
528 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
529 		.icache_bsize		= 32,
530 		.dcache_bsize		= 32,
531 		.num_pmcs		= 4,
532 		.cpu_setup		= __setup_cpu_7400,
533 		.platform		= "ppc7400",
534 	},
535 	{	/* 7400 */
536 		.pvr_mask		= 0xffff0000,
537 		.pvr_value		= 0x000c0000,
538 		.cpu_name		= "7400",
539 		.cpu_features		= CPU_FTRS_7400,
540 		.cpu_user_features	= COMMON_USER |
541 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
542 		.icache_bsize		= 32,
543 		.dcache_bsize		= 32,
544 		.num_pmcs		= 4,
545 		.cpu_setup		= __setup_cpu_7400,
546 		.platform		= "ppc7400",
547 	},
548 	{	/* 7410 */
549 		.pvr_mask		= 0xffff0000,
550 		.pvr_value		= 0x800c0000,
551 		.cpu_name		= "7410",
552 		.cpu_features		= CPU_FTRS_7400,
553 		.cpu_user_features	= COMMON_USER |
554 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
555 		.icache_bsize		= 32,
556 		.dcache_bsize		= 32,
557 		.num_pmcs		= 4,
558 		.cpu_setup		= __setup_cpu_7410,
559 		.platform		= "ppc7400",
560 	},
561 	{	/* 7450 2.0 - no doze/nap */
562 		.pvr_mask		= 0xffffffff,
563 		.pvr_value		= 0x80000200,
564 		.cpu_name		= "7450",
565 		.cpu_features		= CPU_FTRS_7450_20,
566 		.cpu_user_features	= COMMON_USER |
567 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
568 		.icache_bsize		= 32,
569 		.dcache_bsize		= 32,
570 		.num_pmcs		= 6,
571 		.cpu_setup		= __setup_cpu_745x,
572 		.oprofile_cpu_type      = "ppc/7450",
573 		.oprofile_type		= PPC_OPROFILE_G4,
574 		.platform		= "ppc7450",
575 	},
576 	{	/* 7450 2.1 */
577 		.pvr_mask		= 0xffffffff,
578 		.pvr_value		= 0x80000201,
579 		.cpu_name		= "7450",
580 		.cpu_features		= CPU_FTRS_7450_21,
581 		.cpu_user_features	= COMMON_USER |
582 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
583 		.icache_bsize		= 32,
584 		.dcache_bsize		= 32,
585 		.num_pmcs		= 6,
586 		.cpu_setup		= __setup_cpu_745x,
587 		.oprofile_cpu_type      = "ppc/7450",
588 		.oprofile_type		= PPC_OPROFILE_G4,
589 		.platform		= "ppc7450",
590 	},
591 	{	/* 7450 2.3 and newer */
592 		.pvr_mask		= 0xffff0000,
593 		.pvr_value		= 0x80000000,
594 		.cpu_name		= "7450",
595 		.cpu_features		= CPU_FTRS_7450_23,
596 		.cpu_user_features	= COMMON_USER |
597 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
598 		.icache_bsize		= 32,
599 		.dcache_bsize		= 32,
600 		.num_pmcs		= 6,
601 		.cpu_setup		= __setup_cpu_745x,
602 		.oprofile_cpu_type      = "ppc/7450",
603 		.oprofile_type		= PPC_OPROFILE_G4,
604 		.platform		= "ppc7450",
605 	},
606 	{	/* 7455 rev 1.x */
607 		.pvr_mask		= 0xffffff00,
608 		.pvr_value		= 0x80010100,
609 		.cpu_name		= "7455",
610 		.cpu_features		= CPU_FTRS_7455_1,
611 		.cpu_user_features	= COMMON_USER |
612 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
613 		.icache_bsize		= 32,
614 		.dcache_bsize		= 32,
615 		.num_pmcs		= 6,
616 		.cpu_setup		= __setup_cpu_745x,
617 		.oprofile_cpu_type      = "ppc/7450",
618 		.oprofile_type		= PPC_OPROFILE_G4,
619 		.platform		= "ppc7450",
620 	},
621 	{	/* 7455 rev 2.0 */
622 		.pvr_mask		= 0xffffffff,
623 		.pvr_value		= 0x80010200,
624 		.cpu_name		= "7455",
625 		.cpu_features		= CPU_FTRS_7455_20,
626 		.cpu_user_features	= COMMON_USER |
627 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
628 		.icache_bsize		= 32,
629 		.dcache_bsize		= 32,
630 		.num_pmcs		= 6,
631 		.cpu_setup		= __setup_cpu_745x,
632 		.oprofile_cpu_type      = "ppc/7450",
633 		.oprofile_type		= PPC_OPROFILE_G4,
634 		.platform		= "ppc7450",
635 	},
636 	{	/* 7455 others */
637 		.pvr_mask		= 0xffff0000,
638 		.pvr_value		= 0x80010000,
639 		.cpu_name		= "7455",
640 		.cpu_features		= CPU_FTRS_7455,
641 		.cpu_user_features	= COMMON_USER |
642 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
643 		.icache_bsize		= 32,
644 		.dcache_bsize		= 32,
645 		.num_pmcs		= 6,
646 		.cpu_setup		= __setup_cpu_745x,
647 		.oprofile_cpu_type      = "ppc/7450",
648 		.oprofile_type		= PPC_OPROFILE_G4,
649 		.platform		= "ppc7450",
650 	},
651 	{	/* 7447/7457 Rev 1.0 */
652 		.pvr_mask		= 0xffffffff,
653 		.pvr_value		= 0x80020100,
654 		.cpu_name		= "7447/7457",
655 		.cpu_features		= CPU_FTRS_7447_10,
656 		.cpu_user_features	= COMMON_USER |
657 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
658 		.icache_bsize		= 32,
659 		.dcache_bsize		= 32,
660 		.num_pmcs		= 6,
661 		.cpu_setup		= __setup_cpu_745x,
662 		.oprofile_cpu_type      = "ppc/7450",
663 		.oprofile_type		= PPC_OPROFILE_G4,
664 		.platform		= "ppc7450",
665 	},
666 	{	/* 7447/7457 Rev 1.1 */
667 		.pvr_mask		= 0xffffffff,
668 		.pvr_value		= 0x80020101,
669 		.cpu_name		= "7447/7457",
670 		.cpu_features		= CPU_FTRS_7447_10,
671 		.cpu_user_features	= COMMON_USER |
672 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
673 		.icache_bsize		= 32,
674 		.dcache_bsize		= 32,
675 		.num_pmcs		= 6,
676 		.cpu_setup		= __setup_cpu_745x,
677 		.oprofile_cpu_type      = "ppc/7450",
678 		.oprofile_type		= PPC_OPROFILE_G4,
679 		.platform		= "ppc7450",
680 	},
681 	{	/* 7447/7457 Rev 1.2 and later */
682 		.pvr_mask		= 0xffff0000,
683 		.pvr_value		= 0x80020000,
684 		.cpu_name		= "7447/7457",
685 		.cpu_features		= CPU_FTRS_7447,
686 		.cpu_user_features	= COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
687 		.icache_bsize		= 32,
688 		.dcache_bsize		= 32,
689 		.num_pmcs		= 6,
690 		.cpu_setup		= __setup_cpu_745x,
691 		.oprofile_cpu_type      = "ppc/7450",
692 		.oprofile_type		= PPC_OPROFILE_G4,
693 		.platform		= "ppc7450",
694 	},
695 	{	/* 7447A */
696 		.pvr_mask		= 0xffff0000,
697 		.pvr_value		= 0x80030000,
698 		.cpu_name		= "7447A",
699 		.cpu_features		= CPU_FTRS_7447A,
700 		.cpu_user_features	= COMMON_USER |
701 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
702 		.icache_bsize		= 32,
703 		.dcache_bsize		= 32,
704 		.num_pmcs		= 6,
705 		.cpu_setup		= __setup_cpu_745x,
706 		.oprofile_cpu_type      = "ppc/7450",
707 		.oprofile_type		= PPC_OPROFILE_G4,
708 		.platform		= "ppc7450",
709 	},
710 	{	/* 7448 */
711 		.pvr_mask		= 0xffff0000,
712 		.pvr_value		= 0x80040000,
713 		.cpu_name		= "7448",
714 		.cpu_features		= CPU_FTRS_7447A,
715 		.cpu_user_features	= COMMON_USER |
716 			PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
717 		.icache_bsize		= 32,
718 		.dcache_bsize		= 32,
719 		.num_pmcs		= 6,
720 		.cpu_setup		= __setup_cpu_745x,
721 		.oprofile_cpu_type      = "ppc/7450",
722 		.oprofile_type		= PPC_OPROFILE_G4,
723 		.platform		= "ppc7450",
724 	},
725 	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */
726 		.pvr_mask		= 0x7fff0000,
727 		.pvr_value		= 0x00810000,
728 		.cpu_name		= "82xx",
729 		.cpu_features		= CPU_FTRS_82XX,
730 		.cpu_user_features	= COMMON_USER,
731 		.icache_bsize		= 32,
732 		.dcache_bsize		= 32,
733 		.cpu_setup		= __setup_cpu_603,
734 		.platform		= "ppc603",
735 	},
736 	{	/* All G2_LE (603e core, plus some) have the same pvr */
737 		.pvr_mask		= 0x7fff0000,
738 		.pvr_value		= 0x00820000,
739 		.cpu_name		= "G2_LE",
740 		.cpu_features		= CPU_FTRS_G2_LE,
741 		.cpu_user_features	= COMMON_USER,
742 		.icache_bsize		= 32,
743 		.dcache_bsize		= 32,
744 		.cpu_setup		= __setup_cpu_603,
745 		.platform		= "ppc603",
746 	},
747 	{	/* e300 (a 603e core, plus some) on 83xx */
748 		.pvr_mask		= 0x7fff0000,
749 		.pvr_value		= 0x00830000,
750 		.cpu_name		= "e300",
751 		.cpu_features		= CPU_FTRS_E300,
752 		.cpu_user_features	= COMMON_USER,
753 		.icache_bsize		= 32,
754 		.dcache_bsize		= 32,
755 		.cpu_setup		= __setup_cpu_603,
756 		.platform		= "ppc603",
757 	},
758 	{	/* default match, we assume split I/D cache & TB (non-601)... */
759 		.pvr_mask		= 0x00000000,
760 		.pvr_value		= 0x00000000,
761 		.cpu_name		= "(generic PPC)",
762 		.cpu_features		= CPU_FTRS_CLASSIC32,
763 		.cpu_user_features	= COMMON_USER,
764 		.icache_bsize		= 32,
765 		.dcache_bsize		= 32,
766 		.platform		= "ppc603",
767 	},
768 #endif /* CLASSIC_PPC */
769 #ifdef CONFIG_8xx
770 	{	/* 8xx */
771 		.pvr_mask		= 0xffff0000,
772 		.pvr_value		= 0x00500000,
773 		.cpu_name		= "8xx",
774 		/* CPU_FTR_MAYBE_CAN_DOZE is possible,
775 		 * if the 8xx code is there.... */
776 		.cpu_features		= CPU_FTRS_8XX,
777 		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
778 		.icache_bsize		= 16,
779 		.dcache_bsize		= 16,
780 		.platform		= "ppc823",
781 	},
782 #endif /* CONFIG_8xx */
783 #ifdef CONFIG_40x
784 	{	/* 403GC */
785 		.pvr_mask		= 0xffffff00,
786 		.pvr_value		= 0x00200200,
787 		.cpu_name		= "403GC",
788 		.cpu_features		= CPU_FTRS_40X,
789 		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
790 		.icache_bsize		= 16,
791 		.dcache_bsize		= 16,
792 		.platform		= "ppc403",
793 	},
794 	{	/* 403GCX */
795 		.pvr_mask		= 0xffffff00,
796 		.pvr_value		= 0x00201400,
797 		.cpu_name		= "403GCX",
798 		.cpu_features		= CPU_FTRS_40X,
799 		.cpu_user_features	= PPC_FEATURE_32 |
800 		 	PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
801 		.icache_bsize		= 16,
802 		.dcache_bsize		= 16,
803 		.platform		= "ppc403",
804 	},
805 	{	/* 403G ?? */
806 		.pvr_mask		= 0xffff0000,
807 		.pvr_value		= 0x00200000,
808 		.cpu_name		= "403G ??",
809 		.cpu_features		= CPU_FTRS_40X,
810 		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
811 		.icache_bsize		= 16,
812 		.dcache_bsize		= 16,
813 		.platform		= "ppc403",
814 	},
815 	{	/* 405GP */
816 		.pvr_mask		= 0xffff0000,
817 		.pvr_value		= 0x40110000,
818 		.cpu_name		= "405GP",
819 		.cpu_features		= CPU_FTRS_40X,
820 		.cpu_user_features	= PPC_FEATURE_32 |
821 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
822 		.icache_bsize		= 32,
823 		.dcache_bsize		= 32,
824 		.platform		= "ppc405",
825 	},
826 	{	/* STB 03xxx */
827 		.pvr_mask		= 0xffff0000,
828 		.pvr_value		= 0x40130000,
829 		.cpu_name		= "STB03xxx",
830 		.cpu_features		= CPU_FTRS_40X,
831 		.cpu_user_features	= PPC_FEATURE_32 |
832 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
833 		.icache_bsize		= 32,
834 		.dcache_bsize		= 32,
835 		.platform		= "ppc405",
836 	},
837 	{	/* STB 04xxx */
838 		.pvr_mask		= 0xffff0000,
839 		.pvr_value		= 0x41810000,
840 		.cpu_name		= "STB04xxx",
841 		.cpu_features		= CPU_FTRS_40X,
842 		.cpu_user_features	= PPC_FEATURE_32 |
843 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
844 		.icache_bsize		= 32,
845 		.dcache_bsize		= 32,
846 		.platform		= "ppc405",
847 	},
848 	{	/* NP405L */
849 		.pvr_mask		= 0xffff0000,
850 		.pvr_value		= 0x41610000,
851 		.cpu_name		= "NP405L",
852 		.cpu_features		= CPU_FTRS_40X,
853 		.cpu_user_features	= PPC_FEATURE_32 |
854 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
855 		.icache_bsize		= 32,
856 		.dcache_bsize		= 32,
857 		.platform		= "ppc405",
858 	},
859 	{	/* NP4GS3 */
860 		.pvr_mask		= 0xffff0000,
861 		.pvr_value		= 0x40B10000,
862 		.cpu_name		= "NP4GS3",
863 		.cpu_features		= CPU_FTRS_40X,
864 		.cpu_user_features	= PPC_FEATURE_32 |
865 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
866 		.icache_bsize		= 32,
867 		.dcache_bsize		= 32,
868 		.platform		= "ppc405",
869 	},
870 	{   /* NP405H */
871 		.pvr_mask		= 0xffff0000,
872 		.pvr_value		= 0x41410000,
873 		.cpu_name		= "NP405H",
874 		.cpu_features		= CPU_FTRS_40X,
875 		.cpu_user_features	= PPC_FEATURE_32 |
876 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
877 		.icache_bsize		= 32,
878 		.dcache_bsize		= 32,
879 		.platform		= "ppc405",
880 	},
881 	{	/* 405GPr */
882 		.pvr_mask		= 0xffff0000,
883 		.pvr_value		= 0x50910000,
884 		.cpu_name		= "405GPr",
885 		.cpu_features		= CPU_FTRS_40X,
886 		.cpu_user_features	= PPC_FEATURE_32 |
887 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
888 		.icache_bsize		= 32,
889 		.dcache_bsize		= 32,
890 		.platform		= "ppc405",
891 	},
892 	{   /* STBx25xx */
893 		.pvr_mask		= 0xffff0000,
894 		.pvr_value		= 0x51510000,
895 		.cpu_name		= "STBx25xx",
896 		.cpu_features		= CPU_FTRS_40X,
897 		.cpu_user_features	= PPC_FEATURE_32 |
898 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
899 		.icache_bsize		= 32,
900 		.dcache_bsize		= 32,
901 		.platform		= "ppc405",
902 	},
903 	{	/* 405LP */
904 		.pvr_mask		= 0xffff0000,
905 		.pvr_value		= 0x41F10000,
906 		.cpu_name		= "405LP",
907 		.cpu_features		= CPU_FTRS_40X,
908 		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
909 		.icache_bsize		= 32,
910 		.dcache_bsize		= 32,
911 		.platform		= "ppc405",
912 	},
913 	{	/* Xilinx Virtex-II Pro  */
914 		.pvr_mask		= 0xfffff000,
915 		.pvr_value		= 0x20010000,
916 		.cpu_name		= "Virtex-II Pro",
917 		.cpu_features		= CPU_FTRS_40X,
918 		.cpu_user_features	= PPC_FEATURE_32 |
919 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
920 		.icache_bsize		= 32,
921 		.dcache_bsize		= 32,
922 		.platform		= "ppc405",
923 	},
924 	{	/* Xilinx Virtex-4 FX */
925 		.pvr_mask		= 0xfffff000,
926 		.pvr_value		= 0x20011000,
927 		.cpu_name		= "Virtex-4 FX",
928 		.cpu_features		= CPU_FTRS_40X,
929 		.cpu_user_features	= PPC_FEATURE_32 |
930 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
931 		.icache_bsize		= 32,
932 		.dcache_bsize		= 32,
933 	},
934 	{	/* 405EP */
935 		.pvr_mask		= 0xffff0000,
936 		.pvr_value		= 0x51210000,
937 		.cpu_name		= "405EP",
938 		.cpu_features		= CPU_FTRS_40X,
939 		.cpu_user_features	= PPC_FEATURE_32 |
940 			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
941 		.icache_bsize		= 32,
942 		.dcache_bsize		= 32,
943 		.platform		= "ppc405",
944 	},
945 
946 #endif /* CONFIG_40x */
947 #ifdef CONFIG_44x
948 	{
949 		.pvr_mask		= 0xf0000fff,
950 		.pvr_value		= 0x40000850,
951 		.cpu_name		= "440EP Rev. A",
952 		.cpu_features		= CPU_FTRS_44X,
953 		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
954 		.icache_bsize		= 32,
955 		.dcache_bsize		= 32,
956 		.platform		= "ppc440",
957 	},
958 	{
959 		.pvr_mask		= 0xf0000fff,
960 		.pvr_value		= 0x400008d3,
961 		.cpu_name		= "440EP Rev. B",
962 		.cpu_features		= CPU_FTRS_44X,
963 		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
964 		.icache_bsize		= 32,
965 		.dcache_bsize		= 32,
966 		.platform		= "ppc440",
967 	},
968 	{	/* 440GP Rev. B */
969 		.pvr_mask		= 0xf0000fff,
970 		.pvr_value		= 0x40000440,
971 		.cpu_name		= "440GP Rev. B",
972 		.cpu_features		= CPU_FTRS_44X,
973 		.cpu_user_features	= COMMON_USER_BOOKE,
974 		.icache_bsize		= 32,
975 		.dcache_bsize		= 32,
976 		.platform		= "ppc440gp",
977 	},
978 	{	/* 440GP Rev. C */
979 		.pvr_mask		= 0xf0000fff,
980 		.pvr_value		= 0x40000481,
981 		.cpu_name		= "440GP Rev. C",
982 		.cpu_features		= CPU_FTRS_44X,
983 		.cpu_user_features	= COMMON_USER_BOOKE,
984 		.icache_bsize		= 32,
985 		.dcache_bsize		= 32,
986 		.platform		= "ppc440gp",
987 	},
988 	{ /* 440GX Rev. A */
989 		.pvr_mask		= 0xf0000fff,
990 		.pvr_value		= 0x50000850,
991 		.cpu_name		= "440GX Rev. A",
992 		.cpu_features		= CPU_FTRS_44X,
993 		.cpu_user_features	= COMMON_USER_BOOKE,
994 		.icache_bsize		= 32,
995 		.dcache_bsize		= 32,
996 		.platform		= "ppc440",
997 	},
998 	{ /* 440GX Rev. B */
999 		.pvr_mask		= 0xf0000fff,
1000 		.pvr_value		= 0x50000851,
1001 		.cpu_name		= "440GX Rev. B",
1002 		.cpu_features		= CPU_FTRS_44X,
1003 		.cpu_user_features	= COMMON_USER_BOOKE,
1004 		.icache_bsize		= 32,
1005 		.dcache_bsize		= 32,
1006 		.platform		= "ppc440",
1007 	},
1008 	{ /* 440GX Rev. C */
1009 		.pvr_mask		= 0xf0000fff,
1010 		.pvr_value		= 0x50000892,
1011 		.cpu_name		= "440GX Rev. C",
1012 		.cpu_features		= CPU_FTRS_44X,
1013 		.cpu_user_features	= COMMON_USER_BOOKE,
1014 		.icache_bsize		= 32,
1015 		.dcache_bsize		= 32,
1016 		.platform		= "ppc440",
1017 	},
1018 	{ /* 440GX Rev. F */
1019 		.pvr_mask		= 0xf0000fff,
1020 		.pvr_value		= 0x50000894,
1021 		.cpu_name		= "440GX Rev. F",
1022 		.cpu_features		= CPU_FTRS_44X,
1023 		.cpu_user_features	= COMMON_USER_BOOKE,
1024 		.icache_bsize		= 32,
1025 		.dcache_bsize		= 32,
1026 		.platform		= "ppc440",
1027 	},
1028 	{ /* 440SP Rev. A */
1029 		.pvr_mask		= 0xff000fff,
1030 		.pvr_value		= 0x53000891,
1031 		.cpu_name		= "440SP Rev. A",
1032 		.cpu_features		= CPU_FTRS_44X,
1033 		.cpu_user_features	= COMMON_USER_BOOKE,
1034 		.icache_bsize		= 32,
1035 		.dcache_bsize		= 32,
1036 		.platform		= "ppc440",
1037 	},
1038 	{ /* 440SPe Rev. A */
1039 		.pvr_mask		= 0xff000fff,
1040 		.pvr_value		= 0x53000890,
1041 		.cpu_name		= "440SPe Rev. A",
1042 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
1043 			CPU_FTR_USE_TB,
1044 		.cpu_user_features	= COMMON_USER_BOOKE,
1045 		.icache_bsize		= 32,
1046 		.dcache_bsize		= 32,
1047 		.platform		= "ppc440",
1048 	},
1049 #endif /* CONFIG_44x */
1050 #ifdef CONFIG_FSL_BOOKE
1051 	{	/* e200z5 */
1052 		.pvr_mask		= 0xfff00000,
1053 		.pvr_value		= 0x81000000,
1054 		.cpu_name		= "e200z5",
1055 		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1056 		.cpu_features		= CPU_FTRS_E200,
1057 		.cpu_user_features	= COMMON_USER_BOOKE |
1058 			PPC_FEATURE_HAS_EFP_SINGLE |
1059 			PPC_FEATURE_UNIFIED_CACHE,
1060 		.dcache_bsize		= 32,
1061 		.platform		= "ppc5554",
1062 	},
1063 	{	/* e200z6 */
1064 		.pvr_mask		= 0xfff00000,
1065 		.pvr_value		= 0x81100000,
1066 		.cpu_name		= "e200z6",
1067 		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1068 		.cpu_features		= CPU_FTRS_E200,
1069 		.cpu_user_features	= COMMON_USER_BOOKE |
1070 			PPC_FEATURE_SPE_COMP |
1071 			PPC_FEATURE_HAS_EFP_SINGLE |
1072 			PPC_FEATURE_UNIFIED_CACHE,
1073 		.dcache_bsize		= 32,
1074 		.platform		= "ppc5554",
1075 	},
1076 	{	/* e500 */
1077 		.pvr_mask		= 0xffff0000,
1078 		.pvr_value		= 0x80200000,
1079 		.cpu_name		= "e500",
1080 		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1081 		.cpu_features		= CPU_FTRS_E500,
1082 		.cpu_user_features	= COMMON_USER_BOOKE |
1083 			PPC_FEATURE_SPE_COMP |
1084 			PPC_FEATURE_HAS_EFP_SINGLE,
1085 		.icache_bsize		= 32,
1086 		.dcache_bsize		= 32,
1087 		.num_pmcs		= 4,
1088 		.oprofile_cpu_type	= "ppc/e500",
1089 		.oprofile_type		= PPC_OPROFILE_BOOKE,
1090 		.platform		= "ppc8540",
1091 	},
1092 	{	/* e500v2 */
1093 		.pvr_mask		= 0xffff0000,
1094 		.pvr_value		= 0x80210000,
1095 		.cpu_name		= "e500v2",
1096 		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1097 		.cpu_features		= CPU_FTRS_E500_2,
1098 		.cpu_user_features	= COMMON_USER_BOOKE |
1099 			PPC_FEATURE_SPE_COMP |
1100 			PPC_FEATURE_HAS_EFP_SINGLE |
1101 			PPC_FEATURE_HAS_EFP_DOUBLE,
1102 		.icache_bsize		= 32,
1103 		.dcache_bsize		= 32,
1104 		.num_pmcs		= 4,
1105 		.oprofile_cpu_type	= "ppc/e500",
1106 		.oprofile_type		= PPC_OPROFILE_BOOKE,
1107 		.platform		= "ppc8548",
1108 	},
1109 #endif
1110 #if !CLASSIC_PPC
1111 	{	/* default match */
1112 		.pvr_mask		= 0x00000000,
1113 		.pvr_value		= 0x00000000,
1114 		.cpu_name		= "(generic PPC)",
1115 		.cpu_features		= CPU_FTRS_GENERIC_32,
1116 		.cpu_user_features	= PPC_FEATURE_32,
1117 		.icache_bsize		= 32,
1118 		.dcache_bsize		= 32,
1119 		.platform		= "powerpc",
1120 	}
1121 #endif /* !CLASSIC_PPC */
1122 #endif /* CONFIG_PPC32 */
1123 };
1124