1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 24 struct cpu_spec* cur_cpu_spec = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59 #endif /* CONFIG_PPC32 */ 60 #ifdef CONFIG_PPC64 61 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 64 extern void __restore_cpu_pa6t(void); 65 extern void __restore_cpu_ppc970(void); 66 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_power7(void); 68 #endif /* CONFIG_PPC64 */ 69 70 /* This table only contains "desktop" CPUs, it need to be filled with embedded 71 * ones as well... 72 */ 73 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 74 PPC_FEATURE_HAS_MMU) 75 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 76 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 77 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 78 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 79 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 80 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 81 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 83 PPC_FEATURE_TRUE_LE | \ 84 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 85 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 87 PPC_FEATURE_TRUE_LE | \ 88 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 89 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 90 PPC_FEATURE_TRUE_LE | \ 91 PPC_FEATURE_HAS_ALTIVEC_COMP) 92 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 93 PPC_FEATURE_BOOKE) 94 95 static struct cpu_spec __initdata cpu_specs[] = { 96 #ifdef CONFIG_PPC64 97 { /* Power3 */ 98 .pvr_mask = 0xffff0000, 99 .pvr_value = 0x00400000, 100 .cpu_name = "POWER3 (630)", 101 .cpu_features = CPU_FTRS_POWER3, 102 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 103 .mmu_features = MMU_FTR_HPTE_TABLE, 104 .icache_bsize = 128, 105 .dcache_bsize = 128, 106 .num_pmcs = 8, 107 .pmc_type = PPC_PMC_IBM, 108 .oprofile_cpu_type = "ppc64/power3", 109 .oprofile_type = PPC_OPROFILE_RS64, 110 .machine_check = machine_check_generic, 111 .platform = "power3", 112 }, 113 { /* Power3+ */ 114 .pvr_mask = 0xffff0000, 115 .pvr_value = 0x00410000, 116 .cpu_name = "POWER3 (630+)", 117 .cpu_features = CPU_FTRS_POWER3, 118 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 119 .mmu_features = MMU_FTR_HPTE_TABLE, 120 .icache_bsize = 128, 121 .dcache_bsize = 128, 122 .num_pmcs = 8, 123 .pmc_type = PPC_PMC_IBM, 124 .oprofile_cpu_type = "ppc64/power3", 125 .oprofile_type = PPC_OPROFILE_RS64, 126 .machine_check = machine_check_generic, 127 .platform = "power3", 128 }, 129 { /* Northstar */ 130 .pvr_mask = 0xffff0000, 131 .pvr_value = 0x00330000, 132 .cpu_name = "RS64-II (northstar)", 133 .cpu_features = CPU_FTRS_RS64, 134 .cpu_user_features = COMMON_USER_PPC64, 135 .mmu_features = MMU_FTR_HPTE_TABLE, 136 .icache_bsize = 128, 137 .dcache_bsize = 128, 138 .num_pmcs = 8, 139 .pmc_type = PPC_PMC_IBM, 140 .oprofile_cpu_type = "ppc64/rs64", 141 .oprofile_type = PPC_OPROFILE_RS64, 142 .machine_check = machine_check_generic, 143 .platform = "rs64", 144 }, 145 { /* Pulsar */ 146 .pvr_mask = 0xffff0000, 147 .pvr_value = 0x00340000, 148 .cpu_name = "RS64-III (pulsar)", 149 .cpu_features = CPU_FTRS_RS64, 150 .cpu_user_features = COMMON_USER_PPC64, 151 .mmu_features = MMU_FTR_HPTE_TABLE, 152 .icache_bsize = 128, 153 .dcache_bsize = 128, 154 .num_pmcs = 8, 155 .pmc_type = PPC_PMC_IBM, 156 .oprofile_cpu_type = "ppc64/rs64", 157 .oprofile_type = PPC_OPROFILE_RS64, 158 .machine_check = machine_check_generic, 159 .platform = "rs64", 160 }, 161 { /* I-star */ 162 .pvr_mask = 0xffff0000, 163 .pvr_value = 0x00360000, 164 .cpu_name = "RS64-III (icestar)", 165 .cpu_features = CPU_FTRS_RS64, 166 .cpu_user_features = COMMON_USER_PPC64, 167 .mmu_features = MMU_FTR_HPTE_TABLE, 168 .icache_bsize = 128, 169 .dcache_bsize = 128, 170 .num_pmcs = 8, 171 .pmc_type = PPC_PMC_IBM, 172 .oprofile_cpu_type = "ppc64/rs64", 173 .oprofile_type = PPC_OPROFILE_RS64, 174 .machine_check = machine_check_generic, 175 .platform = "rs64", 176 }, 177 { /* S-star */ 178 .pvr_mask = 0xffff0000, 179 .pvr_value = 0x00370000, 180 .cpu_name = "RS64-IV (sstar)", 181 .cpu_features = CPU_FTRS_RS64, 182 .cpu_user_features = COMMON_USER_PPC64, 183 .mmu_features = MMU_FTR_HPTE_TABLE, 184 .icache_bsize = 128, 185 .dcache_bsize = 128, 186 .num_pmcs = 8, 187 .pmc_type = PPC_PMC_IBM, 188 .oprofile_cpu_type = "ppc64/rs64", 189 .oprofile_type = PPC_OPROFILE_RS64, 190 .machine_check = machine_check_generic, 191 .platform = "rs64", 192 }, 193 { /* Power4 */ 194 .pvr_mask = 0xffff0000, 195 .pvr_value = 0x00350000, 196 .cpu_name = "POWER4 (gp)", 197 .cpu_features = CPU_FTRS_POWER4, 198 .cpu_user_features = COMMON_USER_POWER4, 199 .mmu_features = MMU_FTR_HPTE_TABLE, 200 .icache_bsize = 128, 201 .dcache_bsize = 128, 202 .num_pmcs = 8, 203 .pmc_type = PPC_PMC_IBM, 204 .oprofile_cpu_type = "ppc64/power4", 205 .oprofile_type = PPC_OPROFILE_POWER4, 206 .machine_check = machine_check_generic, 207 .platform = "power4", 208 }, 209 { /* Power4+ */ 210 .pvr_mask = 0xffff0000, 211 .pvr_value = 0x00380000, 212 .cpu_name = "POWER4+ (gq)", 213 .cpu_features = CPU_FTRS_POWER4, 214 .cpu_user_features = COMMON_USER_POWER4, 215 .mmu_features = MMU_FTR_HPTE_TABLE, 216 .icache_bsize = 128, 217 .dcache_bsize = 128, 218 .num_pmcs = 8, 219 .pmc_type = PPC_PMC_IBM, 220 .oprofile_cpu_type = "ppc64/power4", 221 .oprofile_type = PPC_OPROFILE_POWER4, 222 .machine_check = machine_check_generic, 223 .platform = "power4", 224 }, 225 { /* PPC970 */ 226 .pvr_mask = 0xffff0000, 227 .pvr_value = 0x00390000, 228 .cpu_name = "PPC970", 229 .cpu_features = CPU_FTRS_PPC970, 230 .cpu_user_features = COMMON_USER_POWER4 | 231 PPC_FEATURE_HAS_ALTIVEC_COMP, 232 .mmu_features = MMU_FTR_HPTE_TABLE, 233 .icache_bsize = 128, 234 .dcache_bsize = 128, 235 .num_pmcs = 8, 236 .pmc_type = PPC_PMC_IBM, 237 .cpu_setup = __setup_cpu_ppc970, 238 .cpu_restore = __restore_cpu_ppc970, 239 .oprofile_cpu_type = "ppc64/970", 240 .oprofile_type = PPC_OPROFILE_POWER4, 241 .machine_check = machine_check_generic, 242 .platform = "ppc970", 243 }, 244 { /* PPC970FX */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x003c0000, 247 .cpu_name = "PPC970FX", 248 .cpu_features = CPU_FTRS_PPC970, 249 .cpu_user_features = COMMON_USER_POWER4 | 250 PPC_FEATURE_HAS_ALTIVEC_COMP, 251 .mmu_features = MMU_FTR_HPTE_TABLE, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .num_pmcs = 8, 255 .pmc_type = PPC_PMC_IBM, 256 .cpu_setup = __setup_cpu_ppc970, 257 .cpu_restore = __restore_cpu_ppc970, 258 .oprofile_cpu_type = "ppc64/970", 259 .oprofile_type = PPC_OPROFILE_POWER4, 260 .machine_check = machine_check_generic, 261 .platform = "ppc970", 262 }, 263 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 264 .pvr_mask = 0xffffffff, 265 .pvr_value = 0x00440100, 266 .cpu_name = "PPC970MP", 267 .cpu_features = CPU_FTRS_PPC970, 268 .cpu_user_features = COMMON_USER_POWER4 | 269 PPC_FEATURE_HAS_ALTIVEC_COMP, 270 .mmu_features = MMU_FTR_HPTE_TABLE, 271 .icache_bsize = 128, 272 .dcache_bsize = 128, 273 .num_pmcs = 8, 274 .pmc_type = PPC_PMC_IBM, 275 .cpu_setup = __setup_cpu_ppc970, 276 .cpu_restore = __restore_cpu_ppc970, 277 .oprofile_cpu_type = "ppc64/970MP", 278 .oprofile_type = PPC_OPROFILE_POWER4, 279 .machine_check = machine_check_generic, 280 .platform = "ppc970", 281 }, 282 { /* PPC970MP */ 283 .pvr_mask = 0xffff0000, 284 .pvr_value = 0x00440000, 285 .cpu_name = "PPC970MP", 286 .cpu_features = CPU_FTRS_PPC970, 287 .cpu_user_features = COMMON_USER_POWER4 | 288 PPC_FEATURE_HAS_ALTIVEC_COMP, 289 .mmu_features = MMU_FTR_HPTE_TABLE, 290 .icache_bsize = 128, 291 .dcache_bsize = 128, 292 .num_pmcs = 8, 293 .pmc_type = PPC_PMC_IBM, 294 .cpu_setup = __setup_cpu_ppc970MP, 295 .cpu_restore = __restore_cpu_ppc970, 296 .oprofile_cpu_type = "ppc64/970MP", 297 .oprofile_type = PPC_OPROFILE_POWER4, 298 .machine_check = machine_check_generic, 299 .platform = "ppc970", 300 }, 301 { /* PPC970GX */ 302 .pvr_mask = 0xffff0000, 303 .pvr_value = 0x00450000, 304 .cpu_name = "PPC970GX", 305 .cpu_features = CPU_FTRS_PPC970, 306 .cpu_user_features = COMMON_USER_POWER4 | 307 PPC_FEATURE_HAS_ALTIVEC_COMP, 308 .mmu_features = MMU_FTR_HPTE_TABLE, 309 .icache_bsize = 128, 310 .dcache_bsize = 128, 311 .num_pmcs = 8, 312 .pmc_type = PPC_PMC_IBM, 313 .cpu_setup = __setup_cpu_ppc970, 314 .oprofile_cpu_type = "ppc64/970", 315 .oprofile_type = PPC_OPROFILE_POWER4, 316 .machine_check = machine_check_generic, 317 .platform = "ppc970", 318 }, 319 { /* Power5 GR */ 320 .pvr_mask = 0xffff0000, 321 .pvr_value = 0x003a0000, 322 .cpu_name = "POWER5 (gr)", 323 .cpu_features = CPU_FTRS_POWER5, 324 .cpu_user_features = COMMON_USER_POWER5, 325 .mmu_features = MMU_FTR_HPTE_TABLE, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .num_pmcs = 6, 329 .pmc_type = PPC_PMC_IBM, 330 .oprofile_cpu_type = "ppc64/power5", 331 .oprofile_type = PPC_OPROFILE_POWER4, 332 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 333 * and above but only works on POWER5 and above 334 */ 335 .oprofile_mmcra_sihv = MMCRA_SIHV, 336 .oprofile_mmcra_sipr = MMCRA_SIPR, 337 .machine_check = machine_check_generic, 338 .platform = "power5", 339 }, 340 { /* Power5++ */ 341 .pvr_mask = 0xffffff00, 342 .pvr_value = 0x003b0300, 343 .cpu_name = "POWER5+ (gs)", 344 .cpu_features = CPU_FTRS_POWER5, 345 .cpu_user_features = COMMON_USER_POWER5_PLUS, 346 .mmu_features = MMU_FTR_HPTE_TABLE, 347 .icache_bsize = 128, 348 .dcache_bsize = 128, 349 .num_pmcs = 6, 350 .oprofile_cpu_type = "ppc64/power5++", 351 .oprofile_type = PPC_OPROFILE_POWER4, 352 .oprofile_mmcra_sihv = MMCRA_SIHV, 353 .oprofile_mmcra_sipr = MMCRA_SIPR, 354 .machine_check = machine_check_generic, 355 .platform = "power5+", 356 }, 357 { /* Power5 GS */ 358 .pvr_mask = 0xffff0000, 359 .pvr_value = 0x003b0000, 360 .cpu_name = "POWER5+ (gs)", 361 .cpu_features = CPU_FTRS_POWER5, 362 .cpu_user_features = COMMON_USER_POWER5_PLUS, 363 .mmu_features = MMU_FTR_HPTE_TABLE, 364 .icache_bsize = 128, 365 .dcache_bsize = 128, 366 .num_pmcs = 6, 367 .pmc_type = PPC_PMC_IBM, 368 .oprofile_cpu_type = "ppc64/power5+", 369 .oprofile_type = PPC_OPROFILE_POWER4, 370 .oprofile_mmcra_sihv = MMCRA_SIHV, 371 .oprofile_mmcra_sipr = MMCRA_SIPR, 372 .machine_check = machine_check_generic, 373 .platform = "power5+", 374 }, 375 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 376 .pvr_mask = 0xffffffff, 377 .pvr_value = 0x0f000001, 378 .cpu_name = "POWER5+", 379 .cpu_features = CPU_FTRS_POWER5, 380 .cpu_user_features = COMMON_USER_POWER5_PLUS, 381 .mmu_features = MMU_FTR_HPTE_TABLE, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .machine_check = machine_check_generic, 385 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 386 .oprofile_type = PPC_OPROFILE_POWER4, 387 .platform = "power5+", 388 }, 389 { /* Power6 */ 390 .pvr_mask = 0xffff0000, 391 .pvr_value = 0x003e0000, 392 .cpu_name = "POWER6 (raw)", 393 .cpu_features = CPU_FTRS_POWER6, 394 .cpu_user_features = COMMON_USER_POWER6 | 395 PPC_FEATURE_POWER6_EXT, 396 .mmu_features = MMU_FTR_HPTE_TABLE, 397 .icache_bsize = 128, 398 .dcache_bsize = 128, 399 .num_pmcs = 6, 400 .pmc_type = PPC_PMC_IBM, 401 .oprofile_cpu_type = "ppc64/power6", 402 .oprofile_type = PPC_OPROFILE_POWER4, 403 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 404 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 405 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 406 POWER6_MMCRA_OTHER, 407 .machine_check = machine_check_generic, 408 .platform = "power6x", 409 }, 410 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 411 .pvr_mask = 0xffffffff, 412 .pvr_value = 0x0f000002, 413 .cpu_name = "POWER6 (architected)", 414 .cpu_features = CPU_FTRS_POWER6, 415 .cpu_user_features = COMMON_USER_POWER6, 416 .mmu_features = MMU_FTR_HPTE_TABLE, 417 .icache_bsize = 128, 418 .dcache_bsize = 128, 419 .machine_check = machine_check_generic, 420 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 421 .oprofile_type = PPC_OPROFILE_POWER4, 422 .platform = "power6", 423 }, 424 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 425 .pvr_mask = 0xffffffff, 426 .pvr_value = 0x0f000003, 427 .cpu_name = "POWER7 (architected)", 428 .cpu_features = CPU_FTRS_POWER7, 429 .cpu_user_features = COMMON_USER_POWER7, 430 .mmu_features = MMU_FTR_HPTE_TABLE | 431 MMU_FTR_TLBIE_206, 432 .icache_bsize = 128, 433 .dcache_bsize = 128, 434 .machine_check = machine_check_generic, 435 .oprofile_type = PPC_OPROFILE_POWER4, 436 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 437 .platform = "power7", 438 }, 439 { /* Power7 */ 440 .pvr_mask = 0xffff0000, 441 .pvr_value = 0x003f0000, 442 .cpu_name = "POWER7 (raw)", 443 .cpu_features = CPU_FTRS_POWER7, 444 .cpu_user_features = COMMON_USER_POWER7, 445 .mmu_features = MMU_FTR_HPTE_TABLE | 446 MMU_FTR_TLBIE_206, 447 .icache_bsize = 128, 448 .dcache_bsize = 128, 449 .num_pmcs = 6, 450 .pmc_type = PPC_PMC_IBM, 451 .cpu_setup = __setup_cpu_power7, 452 .cpu_restore = __restore_cpu_power7, 453 .oprofile_cpu_type = "ppc64/power7", 454 .oprofile_type = PPC_OPROFILE_POWER4, 455 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 456 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 457 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 458 POWER6_MMCRA_OTHER, 459 .platform = "power7", 460 }, 461 { /* Cell Broadband Engine */ 462 .pvr_mask = 0xffff0000, 463 .pvr_value = 0x00700000, 464 .cpu_name = "Cell Broadband Engine", 465 .cpu_features = CPU_FTRS_CELL, 466 .cpu_user_features = COMMON_USER_PPC64 | 467 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 468 PPC_FEATURE_SMT, 469 .mmu_features = MMU_FTR_HPTE_TABLE, 470 .icache_bsize = 128, 471 .dcache_bsize = 128, 472 .num_pmcs = 4, 473 .pmc_type = PPC_PMC_IBM, 474 .oprofile_cpu_type = "ppc64/cell-be", 475 .oprofile_type = PPC_OPROFILE_CELL, 476 .machine_check = machine_check_generic, 477 .platform = "ppc-cell-be", 478 }, 479 { /* PA Semi PA6T */ 480 .pvr_mask = 0x7fff0000, 481 .pvr_value = 0x00900000, 482 .cpu_name = "PA6T", 483 .cpu_features = CPU_FTRS_PA6T, 484 .cpu_user_features = COMMON_USER_PA6T, 485 .mmu_features = MMU_FTR_HPTE_TABLE, 486 .icache_bsize = 64, 487 .dcache_bsize = 64, 488 .num_pmcs = 6, 489 .pmc_type = PPC_PMC_PA6T, 490 .cpu_setup = __setup_cpu_pa6t, 491 .cpu_restore = __restore_cpu_pa6t, 492 .oprofile_cpu_type = "ppc64/pa6t", 493 .oprofile_type = PPC_OPROFILE_PA6T, 494 .machine_check = machine_check_generic, 495 .platform = "pa6t", 496 }, 497 { /* default match */ 498 .pvr_mask = 0x00000000, 499 .pvr_value = 0x00000000, 500 .cpu_name = "POWER4 (compatible)", 501 .cpu_features = CPU_FTRS_COMPATIBLE, 502 .cpu_user_features = COMMON_USER_PPC64, 503 .mmu_features = MMU_FTR_HPTE_TABLE, 504 .icache_bsize = 128, 505 .dcache_bsize = 128, 506 .num_pmcs = 6, 507 .pmc_type = PPC_PMC_IBM, 508 .machine_check = machine_check_generic, 509 .platform = "power4", 510 } 511 #endif /* CONFIG_PPC64 */ 512 #ifdef CONFIG_PPC32 513 #if CLASSIC_PPC 514 { /* 601 */ 515 .pvr_mask = 0xffff0000, 516 .pvr_value = 0x00010000, 517 .cpu_name = "601", 518 .cpu_features = CPU_FTRS_PPC601, 519 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 520 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 521 .mmu_features = MMU_FTR_HPTE_TABLE, 522 .icache_bsize = 32, 523 .dcache_bsize = 32, 524 .machine_check = machine_check_generic, 525 .platform = "ppc601", 526 }, 527 { /* 603 */ 528 .pvr_mask = 0xffff0000, 529 .pvr_value = 0x00030000, 530 .cpu_name = "603", 531 .cpu_features = CPU_FTRS_603, 532 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 533 .mmu_features = 0, 534 .icache_bsize = 32, 535 .dcache_bsize = 32, 536 .cpu_setup = __setup_cpu_603, 537 .machine_check = machine_check_generic, 538 .platform = "ppc603", 539 }, 540 { /* 603e */ 541 .pvr_mask = 0xffff0000, 542 .pvr_value = 0x00060000, 543 .cpu_name = "603e", 544 .cpu_features = CPU_FTRS_603, 545 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 546 .mmu_features = 0, 547 .icache_bsize = 32, 548 .dcache_bsize = 32, 549 .cpu_setup = __setup_cpu_603, 550 .machine_check = machine_check_generic, 551 .platform = "ppc603", 552 }, 553 { /* 603ev */ 554 .pvr_mask = 0xffff0000, 555 .pvr_value = 0x00070000, 556 .cpu_name = "603ev", 557 .cpu_features = CPU_FTRS_603, 558 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 559 .mmu_features = 0, 560 .icache_bsize = 32, 561 .dcache_bsize = 32, 562 .cpu_setup = __setup_cpu_603, 563 .machine_check = machine_check_generic, 564 .platform = "ppc603", 565 }, 566 { /* 604 */ 567 .pvr_mask = 0xffff0000, 568 .pvr_value = 0x00040000, 569 .cpu_name = "604", 570 .cpu_features = CPU_FTRS_604, 571 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 572 .mmu_features = MMU_FTR_HPTE_TABLE, 573 .icache_bsize = 32, 574 .dcache_bsize = 32, 575 .num_pmcs = 2, 576 .cpu_setup = __setup_cpu_604, 577 .machine_check = machine_check_generic, 578 .platform = "ppc604", 579 }, 580 { /* 604e */ 581 .pvr_mask = 0xfffff000, 582 .pvr_value = 0x00090000, 583 .cpu_name = "604e", 584 .cpu_features = CPU_FTRS_604, 585 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 586 .mmu_features = MMU_FTR_HPTE_TABLE, 587 .icache_bsize = 32, 588 .dcache_bsize = 32, 589 .num_pmcs = 4, 590 .cpu_setup = __setup_cpu_604, 591 .machine_check = machine_check_generic, 592 .platform = "ppc604", 593 }, 594 { /* 604r */ 595 .pvr_mask = 0xffff0000, 596 .pvr_value = 0x00090000, 597 .cpu_name = "604r", 598 .cpu_features = CPU_FTRS_604, 599 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 600 .mmu_features = MMU_FTR_HPTE_TABLE, 601 .icache_bsize = 32, 602 .dcache_bsize = 32, 603 .num_pmcs = 4, 604 .cpu_setup = __setup_cpu_604, 605 .machine_check = machine_check_generic, 606 .platform = "ppc604", 607 }, 608 { /* 604ev */ 609 .pvr_mask = 0xffff0000, 610 .pvr_value = 0x000a0000, 611 .cpu_name = "604ev", 612 .cpu_features = CPU_FTRS_604, 613 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 614 .mmu_features = MMU_FTR_HPTE_TABLE, 615 .icache_bsize = 32, 616 .dcache_bsize = 32, 617 .num_pmcs = 4, 618 .cpu_setup = __setup_cpu_604, 619 .machine_check = machine_check_generic, 620 .platform = "ppc604", 621 }, 622 { /* 740/750 (0x4202, don't support TAU ?) */ 623 .pvr_mask = 0xffffffff, 624 .pvr_value = 0x00084202, 625 .cpu_name = "740/750", 626 .cpu_features = CPU_FTRS_740_NOTAU, 627 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 628 .mmu_features = MMU_FTR_HPTE_TABLE, 629 .icache_bsize = 32, 630 .dcache_bsize = 32, 631 .num_pmcs = 4, 632 .cpu_setup = __setup_cpu_750, 633 .machine_check = machine_check_generic, 634 .platform = "ppc750", 635 }, 636 { /* 750CX (80100 and 8010x?) */ 637 .pvr_mask = 0xfffffff0, 638 .pvr_value = 0x00080100, 639 .cpu_name = "750CX", 640 .cpu_features = CPU_FTRS_750, 641 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 642 .mmu_features = MMU_FTR_HPTE_TABLE, 643 .icache_bsize = 32, 644 .dcache_bsize = 32, 645 .num_pmcs = 4, 646 .cpu_setup = __setup_cpu_750cx, 647 .machine_check = machine_check_generic, 648 .platform = "ppc750", 649 }, 650 { /* 750CX (82201 and 82202) */ 651 .pvr_mask = 0xfffffff0, 652 .pvr_value = 0x00082200, 653 .cpu_name = "750CX", 654 .cpu_features = CPU_FTRS_750, 655 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 656 .mmu_features = MMU_FTR_HPTE_TABLE, 657 .icache_bsize = 32, 658 .dcache_bsize = 32, 659 .num_pmcs = 4, 660 .pmc_type = PPC_PMC_IBM, 661 .cpu_setup = __setup_cpu_750cx, 662 .machine_check = machine_check_generic, 663 .platform = "ppc750", 664 }, 665 { /* 750CXe (82214) */ 666 .pvr_mask = 0xfffffff0, 667 .pvr_value = 0x00082210, 668 .cpu_name = "750CXe", 669 .cpu_features = CPU_FTRS_750, 670 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 671 .mmu_features = MMU_FTR_HPTE_TABLE, 672 .icache_bsize = 32, 673 .dcache_bsize = 32, 674 .num_pmcs = 4, 675 .pmc_type = PPC_PMC_IBM, 676 .cpu_setup = __setup_cpu_750cx, 677 .machine_check = machine_check_generic, 678 .platform = "ppc750", 679 }, 680 { /* 750CXe "Gekko" (83214) */ 681 .pvr_mask = 0xffffffff, 682 .pvr_value = 0x00083214, 683 .cpu_name = "750CXe", 684 .cpu_features = CPU_FTRS_750, 685 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 686 .mmu_features = MMU_FTR_HPTE_TABLE, 687 .icache_bsize = 32, 688 .dcache_bsize = 32, 689 .num_pmcs = 4, 690 .pmc_type = PPC_PMC_IBM, 691 .cpu_setup = __setup_cpu_750cx, 692 .machine_check = machine_check_generic, 693 .platform = "ppc750", 694 }, 695 { /* 750CL */ 696 .pvr_mask = 0xfffff0f0, 697 .pvr_value = 0x00087010, 698 .cpu_name = "750CL", 699 .cpu_features = CPU_FTRS_750CL, 700 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 701 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 702 .icache_bsize = 32, 703 .dcache_bsize = 32, 704 .num_pmcs = 4, 705 .pmc_type = PPC_PMC_IBM, 706 .cpu_setup = __setup_cpu_750, 707 .machine_check = machine_check_generic, 708 .platform = "ppc750", 709 }, 710 { /* 745/755 */ 711 .pvr_mask = 0xfffff000, 712 .pvr_value = 0x00083000, 713 .cpu_name = "745/755", 714 .cpu_features = CPU_FTRS_750, 715 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 716 .mmu_features = MMU_FTR_HPTE_TABLE, 717 .icache_bsize = 32, 718 .dcache_bsize = 32, 719 .num_pmcs = 4, 720 .pmc_type = PPC_PMC_IBM, 721 .cpu_setup = __setup_cpu_750, 722 .machine_check = machine_check_generic, 723 .platform = "ppc750", 724 }, 725 { /* 750FX rev 1.x */ 726 .pvr_mask = 0xffffff00, 727 .pvr_value = 0x70000100, 728 .cpu_name = "750FX", 729 .cpu_features = CPU_FTRS_750FX1, 730 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 731 .mmu_features = MMU_FTR_HPTE_TABLE, 732 .icache_bsize = 32, 733 .dcache_bsize = 32, 734 .num_pmcs = 4, 735 .pmc_type = PPC_PMC_IBM, 736 .cpu_setup = __setup_cpu_750, 737 .machine_check = machine_check_generic, 738 .platform = "ppc750", 739 .oprofile_cpu_type = "ppc/750", 740 .oprofile_type = PPC_OPROFILE_G4, 741 }, 742 { /* 750FX rev 2.0 must disable HID0[DPM] */ 743 .pvr_mask = 0xffffffff, 744 .pvr_value = 0x70000200, 745 .cpu_name = "750FX", 746 .cpu_features = CPU_FTRS_750FX2, 747 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 748 .mmu_features = MMU_FTR_HPTE_TABLE, 749 .icache_bsize = 32, 750 .dcache_bsize = 32, 751 .num_pmcs = 4, 752 .pmc_type = PPC_PMC_IBM, 753 .cpu_setup = __setup_cpu_750, 754 .machine_check = machine_check_generic, 755 .platform = "ppc750", 756 .oprofile_cpu_type = "ppc/750", 757 .oprofile_type = PPC_OPROFILE_G4, 758 }, 759 { /* 750FX (All revs except 2.0) */ 760 .pvr_mask = 0xffff0000, 761 .pvr_value = 0x70000000, 762 .cpu_name = "750FX", 763 .cpu_features = CPU_FTRS_750FX, 764 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 765 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 766 .icache_bsize = 32, 767 .dcache_bsize = 32, 768 .num_pmcs = 4, 769 .pmc_type = PPC_PMC_IBM, 770 .cpu_setup = __setup_cpu_750fx, 771 .machine_check = machine_check_generic, 772 .platform = "ppc750", 773 .oprofile_cpu_type = "ppc/750", 774 .oprofile_type = PPC_OPROFILE_G4, 775 }, 776 { /* 750GX */ 777 .pvr_mask = 0xffff0000, 778 .pvr_value = 0x70020000, 779 .cpu_name = "750GX", 780 .cpu_features = CPU_FTRS_750GX, 781 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 782 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 783 .icache_bsize = 32, 784 .dcache_bsize = 32, 785 .num_pmcs = 4, 786 .pmc_type = PPC_PMC_IBM, 787 .cpu_setup = __setup_cpu_750fx, 788 .machine_check = machine_check_generic, 789 .platform = "ppc750", 790 .oprofile_cpu_type = "ppc/750", 791 .oprofile_type = PPC_OPROFILE_G4, 792 }, 793 { /* 740/750 (L2CR bit need fixup for 740) */ 794 .pvr_mask = 0xffff0000, 795 .pvr_value = 0x00080000, 796 .cpu_name = "740/750", 797 .cpu_features = CPU_FTRS_740, 798 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 799 .mmu_features = MMU_FTR_HPTE_TABLE, 800 .icache_bsize = 32, 801 .dcache_bsize = 32, 802 .num_pmcs = 4, 803 .pmc_type = PPC_PMC_IBM, 804 .cpu_setup = __setup_cpu_750, 805 .machine_check = machine_check_generic, 806 .platform = "ppc750", 807 }, 808 { /* 7400 rev 1.1 ? (no TAU) */ 809 .pvr_mask = 0xffffffff, 810 .pvr_value = 0x000c1101, 811 .cpu_name = "7400 (1.1)", 812 .cpu_features = CPU_FTRS_7400_NOTAU, 813 .cpu_user_features = COMMON_USER | 814 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 815 .mmu_features = MMU_FTR_HPTE_TABLE, 816 .icache_bsize = 32, 817 .dcache_bsize = 32, 818 .num_pmcs = 4, 819 .pmc_type = PPC_PMC_G4, 820 .cpu_setup = __setup_cpu_7400, 821 .machine_check = machine_check_generic, 822 .platform = "ppc7400", 823 }, 824 { /* 7400 */ 825 .pvr_mask = 0xffff0000, 826 .pvr_value = 0x000c0000, 827 .cpu_name = "7400", 828 .cpu_features = CPU_FTRS_7400, 829 .cpu_user_features = COMMON_USER | 830 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 831 .mmu_features = MMU_FTR_HPTE_TABLE, 832 .icache_bsize = 32, 833 .dcache_bsize = 32, 834 .num_pmcs = 4, 835 .pmc_type = PPC_PMC_G4, 836 .cpu_setup = __setup_cpu_7400, 837 .machine_check = machine_check_generic, 838 .platform = "ppc7400", 839 }, 840 { /* 7410 */ 841 .pvr_mask = 0xffff0000, 842 .pvr_value = 0x800c0000, 843 .cpu_name = "7410", 844 .cpu_features = CPU_FTRS_7400, 845 .cpu_user_features = COMMON_USER | 846 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 847 .mmu_features = MMU_FTR_HPTE_TABLE, 848 .icache_bsize = 32, 849 .dcache_bsize = 32, 850 .num_pmcs = 4, 851 .pmc_type = PPC_PMC_G4, 852 .cpu_setup = __setup_cpu_7410, 853 .machine_check = machine_check_generic, 854 .platform = "ppc7400", 855 }, 856 { /* 7450 2.0 - no doze/nap */ 857 .pvr_mask = 0xffffffff, 858 .pvr_value = 0x80000200, 859 .cpu_name = "7450", 860 .cpu_features = CPU_FTRS_7450_20, 861 .cpu_user_features = COMMON_USER | 862 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 863 .mmu_features = MMU_FTR_HPTE_TABLE, 864 .icache_bsize = 32, 865 .dcache_bsize = 32, 866 .num_pmcs = 6, 867 .pmc_type = PPC_PMC_G4, 868 .cpu_setup = __setup_cpu_745x, 869 .oprofile_cpu_type = "ppc/7450", 870 .oprofile_type = PPC_OPROFILE_G4, 871 .machine_check = machine_check_generic, 872 .platform = "ppc7450", 873 }, 874 { /* 7450 2.1 */ 875 .pvr_mask = 0xffffffff, 876 .pvr_value = 0x80000201, 877 .cpu_name = "7450", 878 .cpu_features = CPU_FTRS_7450_21, 879 .cpu_user_features = COMMON_USER | 880 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 881 .mmu_features = MMU_FTR_HPTE_TABLE, 882 .icache_bsize = 32, 883 .dcache_bsize = 32, 884 .num_pmcs = 6, 885 .pmc_type = PPC_PMC_G4, 886 .cpu_setup = __setup_cpu_745x, 887 .oprofile_cpu_type = "ppc/7450", 888 .oprofile_type = PPC_OPROFILE_G4, 889 .machine_check = machine_check_generic, 890 .platform = "ppc7450", 891 }, 892 { /* 7450 2.3 and newer */ 893 .pvr_mask = 0xffff0000, 894 .pvr_value = 0x80000000, 895 .cpu_name = "7450", 896 .cpu_features = CPU_FTRS_7450_23, 897 .cpu_user_features = COMMON_USER | 898 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 899 .mmu_features = MMU_FTR_HPTE_TABLE, 900 .icache_bsize = 32, 901 .dcache_bsize = 32, 902 .num_pmcs = 6, 903 .pmc_type = PPC_PMC_G4, 904 .cpu_setup = __setup_cpu_745x, 905 .oprofile_cpu_type = "ppc/7450", 906 .oprofile_type = PPC_OPROFILE_G4, 907 .machine_check = machine_check_generic, 908 .platform = "ppc7450", 909 }, 910 { /* 7455 rev 1.x */ 911 .pvr_mask = 0xffffff00, 912 .pvr_value = 0x80010100, 913 .cpu_name = "7455", 914 .cpu_features = CPU_FTRS_7455_1, 915 .cpu_user_features = COMMON_USER | 916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 917 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 918 .icache_bsize = 32, 919 .dcache_bsize = 32, 920 .num_pmcs = 6, 921 .pmc_type = PPC_PMC_G4, 922 .cpu_setup = __setup_cpu_745x, 923 .oprofile_cpu_type = "ppc/7450", 924 .oprofile_type = PPC_OPROFILE_G4, 925 .machine_check = machine_check_generic, 926 .platform = "ppc7450", 927 }, 928 { /* 7455 rev 2.0 */ 929 .pvr_mask = 0xffffffff, 930 .pvr_value = 0x80010200, 931 .cpu_name = "7455", 932 .cpu_features = CPU_FTRS_7455_20, 933 .cpu_user_features = COMMON_USER | 934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 935 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 936 .icache_bsize = 32, 937 .dcache_bsize = 32, 938 .num_pmcs = 6, 939 .pmc_type = PPC_PMC_G4, 940 .cpu_setup = __setup_cpu_745x, 941 .oprofile_cpu_type = "ppc/7450", 942 .oprofile_type = PPC_OPROFILE_G4, 943 .machine_check = machine_check_generic, 944 .platform = "ppc7450", 945 }, 946 { /* 7455 others */ 947 .pvr_mask = 0xffff0000, 948 .pvr_value = 0x80010000, 949 .cpu_name = "7455", 950 .cpu_features = CPU_FTRS_7455, 951 .cpu_user_features = COMMON_USER | 952 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 953 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 954 .icache_bsize = 32, 955 .dcache_bsize = 32, 956 .num_pmcs = 6, 957 .pmc_type = PPC_PMC_G4, 958 .cpu_setup = __setup_cpu_745x, 959 .oprofile_cpu_type = "ppc/7450", 960 .oprofile_type = PPC_OPROFILE_G4, 961 .machine_check = machine_check_generic, 962 .platform = "ppc7450", 963 }, 964 { /* 7447/7457 Rev 1.0 */ 965 .pvr_mask = 0xffffffff, 966 .pvr_value = 0x80020100, 967 .cpu_name = "7447/7457", 968 .cpu_features = CPU_FTRS_7447_10, 969 .cpu_user_features = COMMON_USER | 970 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 971 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 972 .icache_bsize = 32, 973 .dcache_bsize = 32, 974 .num_pmcs = 6, 975 .pmc_type = PPC_PMC_G4, 976 .cpu_setup = __setup_cpu_745x, 977 .oprofile_cpu_type = "ppc/7450", 978 .oprofile_type = PPC_OPROFILE_G4, 979 .machine_check = machine_check_generic, 980 .platform = "ppc7450", 981 }, 982 { /* 7447/7457 Rev 1.1 */ 983 .pvr_mask = 0xffffffff, 984 .pvr_value = 0x80020101, 985 .cpu_name = "7447/7457", 986 .cpu_features = CPU_FTRS_7447_10, 987 .cpu_user_features = COMMON_USER | 988 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 989 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 990 .icache_bsize = 32, 991 .dcache_bsize = 32, 992 .num_pmcs = 6, 993 .pmc_type = PPC_PMC_G4, 994 .cpu_setup = __setup_cpu_745x, 995 .oprofile_cpu_type = "ppc/7450", 996 .oprofile_type = PPC_OPROFILE_G4, 997 .machine_check = machine_check_generic, 998 .platform = "ppc7450", 999 }, 1000 { /* 7447/7457 Rev 1.2 and later */ 1001 .pvr_mask = 0xffff0000, 1002 .pvr_value = 0x80020000, 1003 .cpu_name = "7447/7457", 1004 .cpu_features = CPU_FTRS_7447, 1005 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1006 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1007 .icache_bsize = 32, 1008 .dcache_bsize = 32, 1009 .num_pmcs = 6, 1010 .pmc_type = PPC_PMC_G4, 1011 .cpu_setup = __setup_cpu_745x, 1012 .oprofile_cpu_type = "ppc/7450", 1013 .oprofile_type = PPC_OPROFILE_G4, 1014 .machine_check = machine_check_generic, 1015 .platform = "ppc7450", 1016 }, 1017 { /* 7447A */ 1018 .pvr_mask = 0xffff0000, 1019 .pvr_value = 0x80030000, 1020 .cpu_name = "7447A", 1021 .cpu_features = CPU_FTRS_7447A, 1022 .cpu_user_features = COMMON_USER | 1023 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1024 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1025 .icache_bsize = 32, 1026 .dcache_bsize = 32, 1027 .num_pmcs = 6, 1028 .pmc_type = PPC_PMC_G4, 1029 .cpu_setup = __setup_cpu_745x, 1030 .oprofile_cpu_type = "ppc/7450", 1031 .oprofile_type = PPC_OPROFILE_G4, 1032 .machine_check = machine_check_generic, 1033 .platform = "ppc7450", 1034 }, 1035 { /* 7448 */ 1036 .pvr_mask = 0xffff0000, 1037 .pvr_value = 0x80040000, 1038 .cpu_name = "7448", 1039 .cpu_features = CPU_FTRS_7448, 1040 .cpu_user_features = COMMON_USER | 1041 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1042 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1043 .icache_bsize = 32, 1044 .dcache_bsize = 32, 1045 .num_pmcs = 6, 1046 .pmc_type = PPC_PMC_G4, 1047 .cpu_setup = __setup_cpu_745x, 1048 .oprofile_cpu_type = "ppc/7450", 1049 .oprofile_type = PPC_OPROFILE_G4, 1050 .machine_check = machine_check_generic, 1051 .platform = "ppc7450", 1052 }, 1053 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1054 .pvr_mask = 0x7fff0000, 1055 .pvr_value = 0x00810000, 1056 .cpu_name = "82xx", 1057 .cpu_features = CPU_FTRS_82XX, 1058 .cpu_user_features = COMMON_USER, 1059 .mmu_features = 0, 1060 .icache_bsize = 32, 1061 .dcache_bsize = 32, 1062 .cpu_setup = __setup_cpu_603, 1063 .machine_check = machine_check_generic, 1064 .platform = "ppc603", 1065 }, 1066 { /* All G2_LE (603e core, plus some) have the same pvr */ 1067 .pvr_mask = 0x7fff0000, 1068 .pvr_value = 0x00820000, 1069 .cpu_name = "G2_LE", 1070 .cpu_features = CPU_FTRS_G2_LE, 1071 .cpu_user_features = COMMON_USER, 1072 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1073 .icache_bsize = 32, 1074 .dcache_bsize = 32, 1075 .cpu_setup = __setup_cpu_603, 1076 .machine_check = machine_check_generic, 1077 .platform = "ppc603", 1078 }, 1079 { /* e300c1 (a 603e core, plus some) on 83xx */ 1080 .pvr_mask = 0x7fff0000, 1081 .pvr_value = 0x00830000, 1082 .cpu_name = "e300c1", 1083 .cpu_features = CPU_FTRS_E300, 1084 .cpu_user_features = COMMON_USER, 1085 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1086 .icache_bsize = 32, 1087 .dcache_bsize = 32, 1088 .cpu_setup = __setup_cpu_603, 1089 .machine_check = machine_check_generic, 1090 .platform = "ppc603", 1091 }, 1092 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1093 .pvr_mask = 0x7fff0000, 1094 .pvr_value = 0x00840000, 1095 .cpu_name = "e300c2", 1096 .cpu_features = CPU_FTRS_E300C2, 1097 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1098 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1099 MMU_FTR_NEED_DTLB_SW_LRU, 1100 .icache_bsize = 32, 1101 .dcache_bsize = 32, 1102 .cpu_setup = __setup_cpu_603, 1103 .machine_check = machine_check_generic, 1104 .platform = "ppc603", 1105 }, 1106 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1107 .pvr_mask = 0x7fff0000, 1108 .pvr_value = 0x00850000, 1109 .cpu_name = "e300c3", 1110 .cpu_features = CPU_FTRS_E300, 1111 .cpu_user_features = COMMON_USER, 1112 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1113 MMU_FTR_NEED_DTLB_SW_LRU, 1114 .icache_bsize = 32, 1115 .dcache_bsize = 32, 1116 .cpu_setup = __setup_cpu_603, 1117 .num_pmcs = 4, 1118 .oprofile_cpu_type = "ppc/e300", 1119 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1120 .platform = "ppc603", 1121 }, 1122 { /* e300c4 (e300c1, plus one IU) */ 1123 .pvr_mask = 0x7fff0000, 1124 .pvr_value = 0x00860000, 1125 .cpu_name = "e300c4", 1126 .cpu_features = CPU_FTRS_E300, 1127 .cpu_user_features = COMMON_USER, 1128 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1129 MMU_FTR_NEED_DTLB_SW_LRU, 1130 .icache_bsize = 32, 1131 .dcache_bsize = 32, 1132 .cpu_setup = __setup_cpu_603, 1133 .machine_check = machine_check_generic, 1134 .num_pmcs = 4, 1135 .oprofile_cpu_type = "ppc/e300", 1136 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1137 .platform = "ppc603", 1138 }, 1139 { /* default match, we assume split I/D cache & TB (non-601)... */ 1140 .pvr_mask = 0x00000000, 1141 .pvr_value = 0x00000000, 1142 .cpu_name = "(generic PPC)", 1143 .cpu_features = CPU_FTRS_CLASSIC32, 1144 .cpu_user_features = COMMON_USER, 1145 .mmu_features = MMU_FTR_HPTE_TABLE, 1146 .icache_bsize = 32, 1147 .dcache_bsize = 32, 1148 .machine_check = machine_check_generic, 1149 .platform = "ppc603", 1150 }, 1151 #endif /* CLASSIC_PPC */ 1152 #ifdef CONFIG_8xx 1153 { /* 8xx */ 1154 .pvr_mask = 0xffff0000, 1155 .pvr_value = 0x00500000, 1156 .cpu_name = "8xx", 1157 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1158 * if the 8xx code is there.... */ 1159 .cpu_features = CPU_FTRS_8XX, 1160 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1161 .mmu_features = MMU_FTR_TYPE_8xx, 1162 .icache_bsize = 16, 1163 .dcache_bsize = 16, 1164 .platform = "ppc823", 1165 }, 1166 #endif /* CONFIG_8xx */ 1167 #ifdef CONFIG_40x 1168 { /* 403GC */ 1169 .pvr_mask = 0xffffff00, 1170 .pvr_value = 0x00200200, 1171 .cpu_name = "403GC", 1172 .cpu_features = CPU_FTRS_40X, 1173 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1174 .mmu_features = MMU_FTR_TYPE_40x, 1175 .icache_bsize = 16, 1176 .dcache_bsize = 16, 1177 .machine_check = machine_check_4xx, 1178 .platform = "ppc403", 1179 }, 1180 { /* 403GCX */ 1181 .pvr_mask = 0xffffff00, 1182 .pvr_value = 0x00201400, 1183 .cpu_name = "403GCX", 1184 .cpu_features = CPU_FTRS_40X, 1185 .cpu_user_features = PPC_FEATURE_32 | 1186 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1187 .mmu_features = MMU_FTR_TYPE_40x, 1188 .icache_bsize = 16, 1189 .dcache_bsize = 16, 1190 .machine_check = machine_check_4xx, 1191 .platform = "ppc403", 1192 }, 1193 { /* 403G ?? */ 1194 .pvr_mask = 0xffff0000, 1195 .pvr_value = 0x00200000, 1196 .cpu_name = "403G ??", 1197 .cpu_features = CPU_FTRS_40X, 1198 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1199 .mmu_features = MMU_FTR_TYPE_40x, 1200 .icache_bsize = 16, 1201 .dcache_bsize = 16, 1202 .machine_check = machine_check_4xx, 1203 .platform = "ppc403", 1204 }, 1205 { /* 405GP */ 1206 .pvr_mask = 0xffff0000, 1207 .pvr_value = 0x40110000, 1208 .cpu_name = "405GP", 1209 .cpu_features = CPU_FTRS_40X, 1210 .cpu_user_features = PPC_FEATURE_32 | 1211 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1212 .mmu_features = MMU_FTR_TYPE_40x, 1213 .icache_bsize = 32, 1214 .dcache_bsize = 32, 1215 .machine_check = machine_check_4xx, 1216 .platform = "ppc405", 1217 }, 1218 { /* STB 03xxx */ 1219 .pvr_mask = 0xffff0000, 1220 .pvr_value = 0x40130000, 1221 .cpu_name = "STB03xxx", 1222 .cpu_features = CPU_FTRS_40X, 1223 .cpu_user_features = PPC_FEATURE_32 | 1224 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1225 .mmu_features = MMU_FTR_TYPE_40x, 1226 .icache_bsize = 32, 1227 .dcache_bsize = 32, 1228 .machine_check = machine_check_4xx, 1229 .platform = "ppc405", 1230 }, 1231 { /* STB 04xxx */ 1232 .pvr_mask = 0xffff0000, 1233 .pvr_value = 0x41810000, 1234 .cpu_name = "STB04xxx", 1235 .cpu_features = CPU_FTRS_40X, 1236 .cpu_user_features = PPC_FEATURE_32 | 1237 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1238 .mmu_features = MMU_FTR_TYPE_40x, 1239 .icache_bsize = 32, 1240 .dcache_bsize = 32, 1241 .machine_check = machine_check_4xx, 1242 .platform = "ppc405", 1243 }, 1244 { /* NP405L */ 1245 .pvr_mask = 0xffff0000, 1246 .pvr_value = 0x41610000, 1247 .cpu_name = "NP405L", 1248 .cpu_features = CPU_FTRS_40X, 1249 .cpu_user_features = PPC_FEATURE_32 | 1250 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1251 .mmu_features = MMU_FTR_TYPE_40x, 1252 .icache_bsize = 32, 1253 .dcache_bsize = 32, 1254 .machine_check = machine_check_4xx, 1255 .platform = "ppc405", 1256 }, 1257 { /* NP4GS3 */ 1258 .pvr_mask = 0xffff0000, 1259 .pvr_value = 0x40B10000, 1260 .cpu_name = "NP4GS3", 1261 .cpu_features = CPU_FTRS_40X, 1262 .cpu_user_features = PPC_FEATURE_32 | 1263 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1264 .mmu_features = MMU_FTR_TYPE_40x, 1265 .icache_bsize = 32, 1266 .dcache_bsize = 32, 1267 .machine_check = machine_check_4xx, 1268 .platform = "ppc405", 1269 }, 1270 { /* NP405H */ 1271 .pvr_mask = 0xffff0000, 1272 .pvr_value = 0x41410000, 1273 .cpu_name = "NP405H", 1274 .cpu_features = CPU_FTRS_40X, 1275 .cpu_user_features = PPC_FEATURE_32 | 1276 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1277 .mmu_features = MMU_FTR_TYPE_40x, 1278 .icache_bsize = 32, 1279 .dcache_bsize = 32, 1280 .machine_check = machine_check_4xx, 1281 .platform = "ppc405", 1282 }, 1283 { /* 405GPr */ 1284 .pvr_mask = 0xffff0000, 1285 .pvr_value = 0x50910000, 1286 .cpu_name = "405GPr", 1287 .cpu_features = CPU_FTRS_40X, 1288 .cpu_user_features = PPC_FEATURE_32 | 1289 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1290 .mmu_features = MMU_FTR_TYPE_40x, 1291 .icache_bsize = 32, 1292 .dcache_bsize = 32, 1293 .machine_check = machine_check_4xx, 1294 .platform = "ppc405", 1295 }, 1296 { /* STBx25xx */ 1297 .pvr_mask = 0xffff0000, 1298 .pvr_value = 0x51510000, 1299 .cpu_name = "STBx25xx", 1300 .cpu_features = CPU_FTRS_40X, 1301 .cpu_user_features = PPC_FEATURE_32 | 1302 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1303 .mmu_features = MMU_FTR_TYPE_40x, 1304 .icache_bsize = 32, 1305 .dcache_bsize = 32, 1306 .machine_check = machine_check_4xx, 1307 .platform = "ppc405", 1308 }, 1309 { /* 405LP */ 1310 .pvr_mask = 0xffff0000, 1311 .pvr_value = 0x41F10000, 1312 .cpu_name = "405LP", 1313 .cpu_features = CPU_FTRS_40X, 1314 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1315 .mmu_features = MMU_FTR_TYPE_40x, 1316 .icache_bsize = 32, 1317 .dcache_bsize = 32, 1318 .machine_check = machine_check_4xx, 1319 .platform = "ppc405", 1320 }, 1321 { /* Xilinx Virtex-II Pro */ 1322 .pvr_mask = 0xfffff000, 1323 .pvr_value = 0x20010000, 1324 .cpu_name = "Virtex-II Pro", 1325 .cpu_features = CPU_FTRS_40X, 1326 .cpu_user_features = PPC_FEATURE_32 | 1327 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1328 .mmu_features = MMU_FTR_TYPE_40x, 1329 .icache_bsize = 32, 1330 .dcache_bsize = 32, 1331 .machine_check = machine_check_4xx, 1332 .platform = "ppc405", 1333 }, 1334 { /* Xilinx Virtex-4 FX */ 1335 .pvr_mask = 0xfffff000, 1336 .pvr_value = 0x20011000, 1337 .cpu_name = "Virtex-4 FX", 1338 .cpu_features = CPU_FTRS_40X, 1339 .cpu_user_features = PPC_FEATURE_32 | 1340 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1341 .mmu_features = MMU_FTR_TYPE_40x, 1342 .icache_bsize = 32, 1343 .dcache_bsize = 32, 1344 .machine_check = machine_check_4xx, 1345 .platform = "ppc405", 1346 }, 1347 { /* 405EP */ 1348 .pvr_mask = 0xffff0000, 1349 .pvr_value = 0x51210000, 1350 .cpu_name = "405EP", 1351 .cpu_features = CPU_FTRS_40X, 1352 .cpu_user_features = PPC_FEATURE_32 | 1353 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1354 .mmu_features = MMU_FTR_TYPE_40x, 1355 .icache_bsize = 32, 1356 .dcache_bsize = 32, 1357 .machine_check = machine_check_4xx, 1358 .platform = "ppc405", 1359 }, 1360 { /* 405EX */ 1361 .pvr_mask = 0xffff0004, 1362 .pvr_value = 0x12910004, 1363 .cpu_name = "405EX", 1364 .cpu_features = CPU_FTRS_40X, 1365 .cpu_user_features = PPC_FEATURE_32 | 1366 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1367 .mmu_features = MMU_FTR_TYPE_40x, 1368 .icache_bsize = 32, 1369 .dcache_bsize = 32, 1370 .machine_check = machine_check_4xx, 1371 .platform = "ppc405", 1372 }, 1373 { /* 405EXr */ 1374 .pvr_mask = 0xffff0004, 1375 .pvr_value = 0x12910000, 1376 .cpu_name = "405EXr", 1377 .cpu_features = CPU_FTRS_40X, 1378 .cpu_user_features = PPC_FEATURE_32 | 1379 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1380 .mmu_features = MMU_FTR_TYPE_40x, 1381 .icache_bsize = 32, 1382 .dcache_bsize = 32, 1383 .machine_check = machine_check_4xx, 1384 .platform = "ppc405", 1385 }, 1386 { 1387 /* 405EZ */ 1388 .pvr_mask = 0xffff0000, 1389 .pvr_value = 0x41510000, 1390 .cpu_name = "405EZ", 1391 .cpu_features = CPU_FTRS_40X, 1392 .cpu_user_features = PPC_FEATURE_32 | 1393 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1394 .mmu_features = MMU_FTR_TYPE_40x, 1395 .icache_bsize = 32, 1396 .dcache_bsize = 32, 1397 .machine_check = machine_check_4xx, 1398 .platform = "ppc405", 1399 }, 1400 { /* default match */ 1401 .pvr_mask = 0x00000000, 1402 .pvr_value = 0x00000000, 1403 .cpu_name = "(generic 40x PPC)", 1404 .cpu_features = CPU_FTRS_40X, 1405 .cpu_user_features = PPC_FEATURE_32 | 1406 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1407 .mmu_features = MMU_FTR_TYPE_40x, 1408 .icache_bsize = 32, 1409 .dcache_bsize = 32, 1410 .machine_check = machine_check_4xx, 1411 .platform = "ppc405", 1412 } 1413 1414 #endif /* CONFIG_40x */ 1415 #ifdef CONFIG_44x 1416 { 1417 .pvr_mask = 0xf0000fff, 1418 .pvr_value = 0x40000850, 1419 .cpu_name = "440GR Rev. A", 1420 .cpu_features = CPU_FTRS_44X, 1421 .cpu_user_features = COMMON_USER_BOOKE, 1422 .mmu_features = MMU_FTR_TYPE_44x, 1423 .icache_bsize = 32, 1424 .dcache_bsize = 32, 1425 .machine_check = machine_check_4xx, 1426 .platform = "ppc440", 1427 }, 1428 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1429 .pvr_mask = 0xf0000fff, 1430 .pvr_value = 0x40000858, 1431 .cpu_name = "440EP Rev. A", 1432 .cpu_features = CPU_FTRS_44X, 1433 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1434 .mmu_features = MMU_FTR_TYPE_44x, 1435 .icache_bsize = 32, 1436 .dcache_bsize = 32, 1437 .cpu_setup = __setup_cpu_440ep, 1438 .machine_check = machine_check_4xx, 1439 .platform = "ppc440", 1440 }, 1441 { 1442 .pvr_mask = 0xf0000fff, 1443 .pvr_value = 0x400008d3, 1444 .cpu_name = "440GR Rev. B", 1445 .cpu_features = CPU_FTRS_44X, 1446 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1447 .mmu_features = MMU_FTR_TYPE_44x, 1448 .icache_bsize = 32, 1449 .dcache_bsize = 32, 1450 .machine_check = machine_check_4xx, 1451 .platform = "ppc440", 1452 }, 1453 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1454 .pvr_mask = 0xf0000ff7, 1455 .pvr_value = 0x400008d4, 1456 .cpu_name = "440EP Rev. C", 1457 .cpu_features = CPU_FTRS_44X, 1458 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1459 .mmu_features = MMU_FTR_TYPE_44x, 1460 .icache_bsize = 32, 1461 .dcache_bsize = 32, 1462 .cpu_setup = __setup_cpu_440ep, 1463 .machine_check = machine_check_4xx, 1464 .platform = "ppc440", 1465 }, 1466 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1467 .pvr_mask = 0xf0000fff, 1468 .pvr_value = 0x400008db, 1469 .cpu_name = "440EP Rev. B", 1470 .cpu_features = CPU_FTRS_44X, 1471 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1472 .mmu_features = MMU_FTR_TYPE_44x, 1473 .icache_bsize = 32, 1474 .dcache_bsize = 32, 1475 .cpu_setup = __setup_cpu_440ep, 1476 .machine_check = machine_check_4xx, 1477 .platform = "ppc440", 1478 }, 1479 { /* 440GRX */ 1480 .pvr_mask = 0xf0000ffb, 1481 .pvr_value = 0x200008D0, 1482 .cpu_name = "440GRX", 1483 .cpu_features = CPU_FTRS_44X, 1484 .cpu_user_features = COMMON_USER_BOOKE, 1485 .mmu_features = MMU_FTR_TYPE_44x, 1486 .icache_bsize = 32, 1487 .dcache_bsize = 32, 1488 .cpu_setup = __setup_cpu_440grx, 1489 .machine_check = machine_check_440A, 1490 .platform = "ppc440", 1491 }, 1492 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1493 .pvr_mask = 0xf0000ffb, 1494 .pvr_value = 0x200008D8, 1495 .cpu_name = "440EPX", 1496 .cpu_features = CPU_FTRS_44X, 1497 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1498 .mmu_features = MMU_FTR_TYPE_44x, 1499 .icache_bsize = 32, 1500 .dcache_bsize = 32, 1501 .cpu_setup = __setup_cpu_440epx, 1502 .machine_check = machine_check_440A, 1503 .platform = "ppc440", 1504 }, 1505 { /* 440GP Rev. B */ 1506 .pvr_mask = 0xf0000fff, 1507 .pvr_value = 0x40000440, 1508 .cpu_name = "440GP Rev. B", 1509 .cpu_features = CPU_FTRS_44X, 1510 .cpu_user_features = COMMON_USER_BOOKE, 1511 .mmu_features = MMU_FTR_TYPE_44x, 1512 .icache_bsize = 32, 1513 .dcache_bsize = 32, 1514 .machine_check = machine_check_4xx, 1515 .platform = "ppc440gp", 1516 }, 1517 { /* 440GP Rev. C */ 1518 .pvr_mask = 0xf0000fff, 1519 .pvr_value = 0x40000481, 1520 .cpu_name = "440GP Rev. C", 1521 .cpu_features = CPU_FTRS_44X, 1522 .cpu_user_features = COMMON_USER_BOOKE, 1523 .mmu_features = MMU_FTR_TYPE_44x, 1524 .icache_bsize = 32, 1525 .dcache_bsize = 32, 1526 .machine_check = machine_check_4xx, 1527 .platform = "ppc440gp", 1528 }, 1529 { /* 440GX Rev. A */ 1530 .pvr_mask = 0xf0000fff, 1531 .pvr_value = 0x50000850, 1532 .cpu_name = "440GX Rev. A", 1533 .cpu_features = CPU_FTRS_44X, 1534 .cpu_user_features = COMMON_USER_BOOKE, 1535 .mmu_features = MMU_FTR_TYPE_44x, 1536 .icache_bsize = 32, 1537 .dcache_bsize = 32, 1538 .cpu_setup = __setup_cpu_440gx, 1539 .machine_check = machine_check_440A, 1540 .platform = "ppc440", 1541 }, 1542 { /* 440GX Rev. B */ 1543 .pvr_mask = 0xf0000fff, 1544 .pvr_value = 0x50000851, 1545 .cpu_name = "440GX Rev. B", 1546 .cpu_features = CPU_FTRS_44X, 1547 .cpu_user_features = COMMON_USER_BOOKE, 1548 .mmu_features = MMU_FTR_TYPE_44x, 1549 .icache_bsize = 32, 1550 .dcache_bsize = 32, 1551 .cpu_setup = __setup_cpu_440gx, 1552 .machine_check = machine_check_440A, 1553 .platform = "ppc440", 1554 }, 1555 { /* 440GX Rev. C */ 1556 .pvr_mask = 0xf0000fff, 1557 .pvr_value = 0x50000892, 1558 .cpu_name = "440GX Rev. C", 1559 .cpu_features = CPU_FTRS_44X, 1560 .cpu_user_features = COMMON_USER_BOOKE, 1561 .mmu_features = MMU_FTR_TYPE_44x, 1562 .icache_bsize = 32, 1563 .dcache_bsize = 32, 1564 .cpu_setup = __setup_cpu_440gx, 1565 .machine_check = machine_check_440A, 1566 .platform = "ppc440", 1567 }, 1568 { /* 440GX Rev. F */ 1569 .pvr_mask = 0xf0000fff, 1570 .pvr_value = 0x50000894, 1571 .cpu_name = "440GX Rev. F", 1572 .cpu_features = CPU_FTRS_44X, 1573 .cpu_user_features = COMMON_USER_BOOKE, 1574 .mmu_features = MMU_FTR_TYPE_44x, 1575 .icache_bsize = 32, 1576 .dcache_bsize = 32, 1577 .cpu_setup = __setup_cpu_440gx, 1578 .machine_check = machine_check_440A, 1579 .platform = "ppc440", 1580 }, 1581 { /* 440SP Rev. A */ 1582 .pvr_mask = 0xfff00fff, 1583 .pvr_value = 0x53200891, 1584 .cpu_name = "440SP Rev. A", 1585 .cpu_features = CPU_FTRS_44X, 1586 .cpu_user_features = COMMON_USER_BOOKE, 1587 .mmu_features = MMU_FTR_TYPE_44x, 1588 .icache_bsize = 32, 1589 .dcache_bsize = 32, 1590 .machine_check = machine_check_4xx, 1591 .platform = "ppc440", 1592 }, 1593 { /* 440SPe Rev. A */ 1594 .pvr_mask = 0xfff00fff, 1595 .pvr_value = 0x53400890, 1596 .cpu_name = "440SPe Rev. A", 1597 .cpu_features = CPU_FTRS_44X, 1598 .cpu_user_features = COMMON_USER_BOOKE, 1599 .mmu_features = MMU_FTR_TYPE_44x, 1600 .icache_bsize = 32, 1601 .dcache_bsize = 32, 1602 .cpu_setup = __setup_cpu_440spe, 1603 .machine_check = machine_check_440A, 1604 .platform = "ppc440", 1605 }, 1606 { /* 440SPe Rev. B */ 1607 .pvr_mask = 0xfff00fff, 1608 .pvr_value = 0x53400891, 1609 .cpu_name = "440SPe Rev. B", 1610 .cpu_features = CPU_FTRS_44X, 1611 .cpu_user_features = COMMON_USER_BOOKE, 1612 .mmu_features = MMU_FTR_TYPE_44x, 1613 .icache_bsize = 32, 1614 .dcache_bsize = 32, 1615 .cpu_setup = __setup_cpu_440spe, 1616 .machine_check = machine_check_440A, 1617 .platform = "ppc440", 1618 }, 1619 { /* 440 in Xilinx Virtex-5 FXT */ 1620 .pvr_mask = 0xfffffff0, 1621 .pvr_value = 0x7ff21910, 1622 .cpu_name = "440 in Virtex-5 FXT", 1623 .cpu_features = CPU_FTRS_44X, 1624 .cpu_user_features = COMMON_USER_BOOKE, 1625 .mmu_features = MMU_FTR_TYPE_44x, 1626 .icache_bsize = 32, 1627 .dcache_bsize = 32, 1628 .cpu_setup = __setup_cpu_440x5, 1629 .machine_check = machine_check_440A, 1630 .platform = "ppc440", 1631 }, 1632 { /* 460EX */ 1633 .pvr_mask = 0xffff0002, 1634 .pvr_value = 0x13020002, 1635 .cpu_name = "460EX", 1636 .cpu_features = CPU_FTRS_440x6, 1637 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1638 .mmu_features = MMU_FTR_TYPE_44x, 1639 .icache_bsize = 32, 1640 .dcache_bsize = 32, 1641 .cpu_setup = __setup_cpu_460ex, 1642 .machine_check = machine_check_440A, 1643 .platform = "ppc440", 1644 }, 1645 { /* 460GT */ 1646 .pvr_mask = 0xffff0002, 1647 .pvr_value = 0x13020000, 1648 .cpu_name = "460GT", 1649 .cpu_features = CPU_FTRS_440x6, 1650 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1651 .mmu_features = MMU_FTR_TYPE_44x, 1652 .icache_bsize = 32, 1653 .dcache_bsize = 32, 1654 .cpu_setup = __setup_cpu_460gt, 1655 .machine_check = machine_check_440A, 1656 .platform = "ppc440", 1657 }, 1658 { /* 460SX */ 1659 .pvr_mask = 0xffffff00, 1660 .pvr_value = 0x13541800, 1661 .cpu_name = "460SX", 1662 .cpu_features = CPU_FTRS_44X, 1663 .cpu_user_features = COMMON_USER_BOOKE, 1664 .mmu_features = MMU_FTR_TYPE_44x, 1665 .icache_bsize = 32, 1666 .dcache_bsize = 32, 1667 .cpu_setup = __setup_cpu_460sx, 1668 .machine_check = machine_check_440A, 1669 .platform = "ppc440", 1670 }, 1671 { /* default match */ 1672 .pvr_mask = 0x00000000, 1673 .pvr_value = 0x00000000, 1674 .cpu_name = "(generic 44x PPC)", 1675 .cpu_features = CPU_FTRS_44X, 1676 .cpu_user_features = COMMON_USER_BOOKE, 1677 .mmu_features = MMU_FTR_TYPE_44x, 1678 .icache_bsize = 32, 1679 .dcache_bsize = 32, 1680 .machine_check = machine_check_4xx, 1681 .platform = "ppc440", 1682 } 1683 #endif /* CONFIG_44x */ 1684 #ifdef CONFIG_E200 1685 { /* e200z5 */ 1686 .pvr_mask = 0xfff00000, 1687 .pvr_value = 0x81000000, 1688 .cpu_name = "e200z5", 1689 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1690 .cpu_features = CPU_FTRS_E200, 1691 .cpu_user_features = COMMON_USER_BOOKE | 1692 PPC_FEATURE_HAS_EFP_SINGLE | 1693 PPC_FEATURE_UNIFIED_CACHE, 1694 .mmu_features = MMU_FTR_TYPE_FSL_E, 1695 .dcache_bsize = 32, 1696 .machine_check = machine_check_e200, 1697 .platform = "ppc5554", 1698 }, 1699 { /* e200z6 */ 1700 .pvr_mask = 0xfff00000, 1701 .pvr_value = 0x81100000, 1702 .cpu_name = "e200z6", 1703 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1704 .cpu_features = CPU_FTRS_E200, 1705 .cpu_user_features = COMMON_USER_BOOKE | 1706 PPC_FEATURE_HAS_SPE_COMP | 1707 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1708 PPC_FEATURE_UNIFIED_CACHE, 1709 .mmu_features = MMU_FTR_TYPE_FSL_E, 1710 .dcache_bsize = 32, 1711 .machine_check = machine_check_e200, 1712 .platform = "ppc5554", 1713 }, 1714 { /* default match */ 1715 .pvr_mask = 0x00000000, 1716 .pvr_value = 0x00000000, 1717 .cpu_name = "(generic E200 PPC)", 1718 .cpu_features = CPU_FTRS_E200, 1719 .cpu_user_features = COMMON_USER_BOOKE | 1720 PPC_FEATURE_HAS_EFP_SINGLE | 1721 PPC_FEATURE_UNIFIED_CACHE, 1722 .mmu_features = MMU_FTR_TYPE_FSL_E, 1723 .dcache_bsize = 32, 1724 .cpu_setup = __setup_cpu_e200, 1725 .machine_check = machine_check_e200, 1726 .platform = "ppc5554", 1727 } 1728 #endif /* CONFIG_E200 */ 1729 #ifdef CONFIG_E500 1730 { /* e500 */ 1731 .pvr_mask = 0xffff0000, 1732 .pvr_value = 0x80200000, 1733 .cpu_name = "e500", 1734 .cpu_features = CPU_FTRS_E500, 1735 .cpu_user_features = COMMON_USER_BOOKE | 1736 PPC_FEATURE_HAS_SPE_COMP | 1737 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1738 .mmu_features = MMU_FTR_TYPE_FSL_E, 1739 .icache_bsize = 32, 1740 .dcache_bsize = 32, 1741 .num_pmcs = 4, 1742 .oprofile_cpu_type = "ppc/e500", 1743 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1744 .cpu_setup = __setup_cpu_e500v1, 1745 .machine_check = machine_check_e500, 1746 .platform = "ppc8540", 1747 }, 1748 { /* e500v2 */ 1749 .pvr_mask = 0xffff0000, 1750 .pvr_value = 0x80210000, 1751 .cpu_name = "e500v2", 1752 .cpu_features = CPU_FTRS_E500_2, 1753 .cpu_user_features = COMMON_USER_BOOKE | 1754 PPC_FEATURE_HAS_SPE_COMP | 1755 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1756 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1757 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1758 .icache_bsize = 32, 1759 .dcache_bsize = 32, 1760 .num_pmcs = 4, 1761 .oprofile_cpu_type = "ppc/e500", 1762 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1763 .cpu_setup = __setup_cpu_e500v2, 1764 .machine_check = machine_check_e500, 1765 .platform = "ppc8548", 1766 }, 1767 { /* e500mc */ 1768 .pvr_mask = 0xffff0000, 1769 .pvr_value = 0x80230000, 1770 .cpu_name = "e500mc", 1771 .cpu_features = CPU_FTRS_E500MC, 1772 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1773 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1774 MMU_FTR_USE_TLBILX, 1775 .icache_bsize = 64, 1776 .dcache_bsize = 64, 1777 .num_pmcs = 4, 1778 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1779 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1780 .cpu_setup = __setup_cpu_e500mc, 1781 .machine_check = machine_check_e500, 1782 .platform = "ppce500mc", 1783 }, 1784 { /* default match */ 1785 .pvr_mask = 0x00000000, 1786 .pvr_value = 0x00000000, 1787 .cpu_name = "(generic E500 PPC)", 1788 .cpu_features = CPU_FTRS_E500, 1789 .cpu_user_features = COMMON_USER_BOOKE | 1790 PPC_FEATURE_HAS_SPE_COMP | 1791 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1792 .mmu_features = MMU_FTR_TYPE_FSL_E, 1793 .icache_bsize = 32, 1794 .dcache_bsize = 32, 1795 .machine_check = machine_check_e500, 1796 .platform = "powerpc", 1797 } 1798 #endif /* CONFIG_E500 */ 1799 #endif /* CONFIG_PPC32 */ 1800 }; 1801 1802 static struct cpu_spec the_cpu_spec; 1803 1804 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) 1805 { 1806 struct cpu_spec *t = &the_cpu_spec; 1807 struct cpu_spec old; 1808 1809 t = PTRRELOC(t); 1810 old = *t; 1811 1812 /* Copy everything, then do fixups */ 1813 *t = *s; 1814 1815 /* 1816 * If we are overriding a previous value derived from the real 1817 * PVR with a new value obtained using a logical PVR value, 1818 * don't modify the performance monitor fields. 1819 */ 1820 if (old.num_pmcs && !s->num_pmcs) { 1821 t->num_pmcs = old.num_pmcs; 1822 t->pmc_type = old.pmc_type; 1823 t->oprofile_type = old.oprofile_type; 1824 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 1825 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 1826 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 1827 1828 /* 1829 * If we have passed through this logic once before and 1830 * have pulled the default case because the real PVR was 1831 * not found inside cpu_specs[], then we are possibly 1832 * running in compatibility mode. In that case, let the 1833 * oprofiler know which set of compatibility counters to 1834 * pull from by making sure the oprofile_cpu_type string 1835 * is set to that of compatibility mode. If the 1836 * oprofile_cpu_type already has a value, then we are 1837 * possibly overriding a real PVR with a logical one, 1838 * and, in that case, keep the current value for 1839 * oprofile_cpu_type. 1840 */ 1841 if (old.oprofile_cpu_type != NULL) { 1842 t->oprofile_cpu_type = old.oprofile_cpu_type; 1843 t->oprofile_type = old.oprofile_type; 1844 } 1845 } 1846 1847 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 1848 1849 /* 1850 * Set the base platform string once; assumes 1851 * we're called with real pvr first. 1852 */ 1853 if (*PTRRELOC(&powerpc_base_platform) == NULL) 1854 *PTRRELOC(&powerpc_base_platform) = t->platform; 1855 1856 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1857 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 1858 * that processor. I will consolidate that at a later time, for now, 1859 * just use #ifdef. We also don't need to PTRRELOC the function 1860 * pointer on ppc64 and booke as we are running at 0 in real mode 1861 * on ppc64 and reloc_offset is always 0 on booke. 1862 */ 1863 if (s->cpu_setup) { 1864 s->cpu_setup(offset, s); 1865 } 1866 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1867 } 1868 1869 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1870 { 1871 struct cpu_spec *s = cpu_specs; 1872 int i; 1873 1874 s = PTRRELOC(s); 1875 1876 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 1877 if ((pvr & s->pvr_mask) == s->pvr_value) { 1878 setup_cpu_spec(offset, s); 1879 return s; 1880 } 1881 } 1882 1883 BUG(); 1884 1885 return NULL; 1886 } 1887