1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/config.h> 14 #include <linux/string.h> 15 #include <linux/sched.h> 16 #include <linux/threads.h> 17 #include <linux/init.h> 18 #include <linux/module.h> 19 20 #include <asm/oprofile_impl.h> 21 #include <asm/cputable.h> 22 23 struct cpu_spec* cur_cpu_spec = NULL; 24 EXPORT_SYMBOL(cur_cpu_spec); 25 26 /* NOTE: 27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 28 * the responsibility of the appropriate CPU save/restore functions to 29 * eventually copy these settings over. Those save/restore aren't yet 30 * part of the cputable though. That has to be fixed for both ppc32 31 * and ppc64 32 */ 33 #ifdef CONFIG_PPC64 34 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec); 35 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec); 36 extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec); 37 #else 38 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 46 #endif /* CONFIG_PPC32 */ 47 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 48 49 /* This table only contains "desktop" CPUs, it need to be filled with embedded 50 * ones as well... 51 */ 52 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 53 PPC_FEATURE_HAS_MMU) 54 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 55 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 56 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5) 57 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS) 58 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 59 PPC_FEATURE_BOOKE) 60 61 /* We only set the spe features if the kernel was compiled with 62 * spe support 63 */ 64 #ifdef CONFIG_SPE 65 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE 66 #else 67 #define PPC_FEATURE_SPE_COMP 0 68 #endif 69 70 struct cpu_spec cpu_specs[] = { 71 #ifdef CONFIG_PPC64 72 { /* Power3 */ 73 .pvr_mask = 0xffff0000, 74 .pvr_value = 0x00400000, 75 .cpu_name = "POWER3 (630)", 76 .cpu_features = CPU_FTRS_POWER3, 77 .cpu_user_features = COMMON_USER_PPC64, 78 .icache_bsize = 128, 79 .dcache_bsize = 128, 80 .num_pmcs = 8, 81 .cpu_setup = __setup_cpu_power3, 82 .oprofile_cpu_type = "ppc64/power3", 83 .oprofile_type = PPC_OPROFILE_RS64, 84 .platform = "power3", 85 }, 86 { /* Power3+ */ 87 .pvr_mask = 0xffff0000, 88 .pvr_value = 0x00410000, 89 .cpu_name = "POWER3 (630+)", 90 .cpu_features = CPU_FTRS_POWER3, 91 .cpu_user_features = COMMON_USER_PPC64, 92 .icache_bsize = 128, 93 .dcache_bsize = 128, 94 .num_pmcs = 8, 95 .cpu_setup = __setup_cpu_power3, 96 .oprofile_cpu_type = "ppc64/power3", 97 .oprofile_type = PPC_OPROFILE_RS64, 98 .platform = "power3", 99 }, 100 { /* Northstar */ 101 .pvr_mask = 0xffff0000, 102 .pvr_value = 0x00330000, 103 .cpu_name = "RS64-II (northstar)", 104 .cpu_features = CPU_FTRS_RS64, 105 .cpu_user_features = COMMON_USER_PPC64, 106 .icache_bsize = 128, 107 .dcache_bsize = 128, 108 .num_pmcs = 8, 109 .cpu_setup = __setup_cpu_power3, 110 .oprofile_cpu_type = "ppc64/rs64", 111 .oprofile_type = PPC_OPROFILE_RS64, 112 .platform = "rs64", 113 }, 114 { /* Pulsar */ 115 .pvr_mask = 0xffff0000, 116 .pvr_value = 0x00340000, 117 .cpu_name = "RS64-III (pulsar)", 118 .cpu_features = CPU_FTRS_RS64, 119 .cpu_user_features = COMMON_USER_PPC64, 120 .icache_bsize = 128, 121 .dcache_bsize = 128, 122 .num_pmcs = 8, 123 .cpu_setup = __setup_cpu_power3, 124 .oprofile_cpu_type = "ppc64/rs64", 125 .oprofile_type = PPC_OPROFILE_RS64, 126 .platform = "rs64", 127 }, 128 { /* I-star */ 129 .pvr_mask = 0xffff0000, 130 .pvr_value = 0x00360000, 131 .cpu_name = "RS64-III (icestar)", 132 .cpu_features = CPU_FTRS_RS64, 133 .cpu_user_features = COMMON_USER_PPC64, 134 .icache_bsize = 128, 135 .dcache_bsize = 128, 136 .num_pmcs = 8, 137 .cpu_setup = __setup_cpu_power3, 138 .oprofile_cpu_type = "ppc64/rs64", 139 .oprofile_type = PPC_OPROFILE_RS64, 140 .platform = "rs64", 141 }, 142 { /* S-star */ 143 .pvr_mask = 0xffff0000, 144 .pvr_value = 0x00370000, 145 .cpu_name = "RS64-IV (sstar)", 146 .cpu_features = CPU_FTRS_RS64, 147 .cpu_user_features = COMMON_USER_PPC64, 148 .icache_bsize = 128, 149 .dcache_bsize = 128, 150 .num_pmcs = 8, 151 .cpu_setup = __setup_cpu_power3, 152 .oprofile_cpu_type = "ppc64/rs64", 153 .oprofile_type = PPC_OPROFILE_RS64, 154 .platform = "rs64", 155 }, 156 { /* Power4 */ 157 .pvr_mask = 0xffff0000, 158 .pvr_value = 0x00350000, 159 .cpu_name = "POWER4 (gp)", 160 .cpu_features = CPU_FTRS_POWER4, 161 .cpu_user_features = COMMON_USER_POWER4, 162 .icache_bsize = 128, 163 .dcache_bsize = 128, 164 .num_pmcs = 8, 165 .cpu_setup = __setup_cpu_power4, 166 .oprofile_cpu_type = "ppc64/power4", 167 .oprofile_type = PPC_OPROFILE_POWER4, 168 .platform = "power4", 169 }, 170 { /* Power4+ */ 171 .pvr_mask = 0xffff0000, 172 .pvr_value = 0x00380000, 173 .cpu_name = "POWER4+ (gq)", 174 .cpu_features = CPU_FTRS_POWER4, 175 .cpu_user_features = COMMON_USER_POWER4, 176 .icache_bsize = 128, 177 .dcache_bsize = 128, 178 .num_pmcs = 8, 179 .cpu_setup = __setup_cpu_power4, 180 .oprofile_cpu_type = "ppc64/power4", 181 .oprofile_type = PPC_OPROFILE_POWER4, 182 .platform = "power4", 183 }, 184 { /* PPC970 */ 185 .pvr_mask = 0xffff0000, 186 .pvr_value = 0x00390000, 187 .cpu_name = "PPC970", 188 .cpu_features = CPU_FTRS_PPC970, 189 .cpu_user_features = COMMON_USER_POWER4 | 190 PPC_FEATURE_HAS_ALTIVEC_COMP, 191 .icache_bsize = 128, 192 .dcache_bsize = 128, 193 .num_pmcs = 8, 194 .cpu_setup = __setup_cpu_ppc970, 195 .oprofile_cpu_type = "ppc64/970", 196 .oprofile_type = PPC_OPROFILE_POWER4, 197 .platform = "ppc970", 198 }, 199 #endif /* CONFIG_PPC64 */ 200 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4) 201 { /* PPC970FX */ 202 .pvr_mask = 0xffff0000, 203 .pvr_value = 0x003c0000, 204 .cpu_name = "PPC970FX", 205 #ifdef CONFIG_PPC32 206 .cpu_features = CPU_FTRS_970_32, 207 #else 208 .cpu_features = CPU_FTRS_PPC970, 209 #endif 210 .cpu_user_features = COMMON_USER_POWER4 | 211 PPC_FEATURE_HAS_ALTIVEC_COMP, 212 .icache_bsize = 128, 213 .dcache_bsize = 128, 214 .num_pmcs = 8, 215 .cpu_setup = __setup_cpu_ppc970, 216 .oprofile_cpu_type = "ppc64/970", 217 .oprofile_type = PPC_OPROFILE_POWER4, 218 .platform = "ppc970", 219 }, 220 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */ 221 #ifdef CONFIG_PPC64 222 { /* PPC970MP */ 223 .pvr_mask = 0xffff0000, 224 .pvr_value = 0x00440000, 225 .cpu_name = "PPC970MP", 226 .cpu_features = CPU_FTRS_PPC970, 227 .cpu_user_features = COMMON_USER_POWER4 | 228 PPC_FEATURE_HAS_ALTIVEC_COMP, 229 .icache_bsize = 128, 230 .dcache_bsize = 128, 231 .cpu_setup = __setup_cpu_ppc970, 232 .oprofile_cpu_type = "ppc64/970", 233 .oprofile_type = PPC_OPROFILE_POWER4, 234 .platform = "ppc970", 235 }, 236 { /* Power5 GR */ 237 .pvr_mask = 0xffff0000, 238 .pvr_value = 0x003a0000, 239 .cpu_name = "POWER5 (gr)", 240 .cpu_features = CPU_FTRS_POWER5, 241 .cpu_user_features = COMMON_USER_POWER5, 242 .icache_bsize = 128, 243 .dcache_bsize = 128, 244 .num_pmcs = 6, 245 .cpu_setup = __setup_cpu_power4, 246 .oprofile_cpu_type = "ppc64/power5", 247 .oprofile_type = PPC_OPROFILE_POWER4, 248 .platform = "power5", 249 }, 250 { /* Power5 GS */ 251 .pvr_mask = 0xffff0000, 252 .pvr_value = 0x003b0000, 253 .cpu_name = "POWER5+ (gs)", 254 .cpu_features = CPU_FTRS_POWER5, 255 .cpu_user_features = COMMON_USER_POWER5_PLUS, 256 .icache_bsize = 128, 257 .dcache_bsize = 128, 258 .num_pmcs = 6, 259 .cpu_setup = __setup_cpu_power4, 260 .oprofile_cpu_type = "ppc64/power5+", 261 .oprofile_type = PPC_OPROFILE_POWER4, 262 .platform = "power5+", 263 }, 264 { /* Cell Broadband Engine */ 265 .pvr_mask = 0xffff0000, 266 .pvr_value = 0x00700000, 267 .cpu_name = "Cell Broadband Engine", 268 .cpu_features = CPU_FTRS_CELL, 269 .cpu_user_features = COMMON_USER_PPC64 | 270 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP, 271 .icache_bsize = 128, 272 .dcache_bsize = 128, 273 .cpu_setup = __setup_cpu_be, 274 .platform = "ppc-cell-be", 275 }, 276 { /* default match */ 277 .pvr_mask = 0x00000000, 278 .pvr_value = 0x00000000, 279 .cpu_name = "POWER4 (compatible)", 280 .cpu_features = CPU_FTRS_COMPATIBLE, 281 .cpu_user_features = COMMON_USER_PPC64, 282 .icache_bsize = 128, 283 .dcache_bsize = 128, 284 .num_pmcs = 6, 285 .cpu_setup = __setup_cpu_power4, 286 .platform = "power4", 287 } 288 #endif /* CONFIG_PPC64 */ 289 #ifdef CONFIG_PPC32 290 #if CLASSIC_PPC 291 { /* 601 */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x00010000, 294 .cpu_name = "601", 295 .cpu_features = CPU_FTRS_PPC601, 296 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 297 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 298 .icache_bsize = 32, 299 .dcache_bsize = 32, 300 .platform = "ppc601", 301 }, 302 { /* 603 */ 303 .pvr_mask = 0xffff0000, 304 .pvr_value = 0x00030000, 305 .cpu_name = "603", 306 .cpu_features = CPU_FTRS_603, 307 .cpu_user_features = COMMON_USER, 308 .icache_bsize = 32, 309 .dcache_bsize = 32, 310 .cpu_setup = __setup_cpu_603, 311 .platform = "ppc603", 312 }, 313 { /* 603e */ 314 .pvr_mask = 0xffff0000, 315 .pvr_value = 0x00060000, 316 .cpu_name = "603e", 317 .cpu_features = CPU_FTRS_603, 318 .cpu_user_features = COMMON_USER, 319 .icache_bsize = 32, 320 .dcache_bsize = 32, 321 .cpu_setup = __setup_cpu_603, 322 .platform = "ppc603", 323 }, 324 { /* 603ev */ 325 .pvr_mask = 0xffff0000, 326 .pvr_value = 0x00070000, 327 .cpu_name = "603ev", 328 .cpu_features = CPU_FTRS_603, 329 .cpu_user_features = COMMON_USER, 330 .icache_bsize = 32, 331 .dcache_bsize = 32, 332 .cpu_setup = __setup_cpu_603, 333 .platform = "ppc603", 334 }, 335 { /* 604 */ 336 .pvr_mask = 0xffff0000, 337 .pvr_value = 0x00040000, 338 .cpu_name = "604", 339 .cpu_features = CPU_FTRS_604, 340 .cpu_user_features = COMMON_USER, 341 .icache_bsize = 32, 342 .dcache_bsize = 32, 343 .num_pmcs = 2, 344 .cpu_setup = __setup_cpu_604, 345 .platform = "ppc604", 346 }, 347 { /* 604e */ 348 .pvr_mask = 0xfffff000, 349 .pvr_value = 0x00090000, 350 .cpu_name = "604e", 351 .cpu_features = CPU_FTRS_604, 352 .cpu_user_features = COMMON_USER, 353 .icache_bsize = 32, 354 .dcache_bsize = 32, 355 .num_pmcs = 4, 356 .cpu_setup = __setup_cpu_604, 357 .platform = "ppc604", 358 }, 359 { /* 604r */ 360 .pvr_mask = 0xffff0000, 361 .pvr_value = 0x00090000, 362 .cpu_name = "604r", 363 .cpu_features = CPU_FTRS_604, 364 .cpu_user_features = COMMON_USER, 365 .icache_bsize = 32, 366 .dcache_bsize = 32, 367 .num_pmcs = 4, 368 .cpu_setup = __setup_cpu_604, 369 .platform = "ppc604", 370 }, 371 { /* 604ev */ 372 .pvr_mask = 0xffff0000, 373 .pvr_value = 0x000a0000, 374 .cpu_name = "604ev", 375 .cpu_features = CPU_FTRS_604, 376 .cpu_user_features = COMMON_USER, 377 .icache_bsize = 32, 378 .dcache_bsize = 32, 379 .num_pmcs = 4, 380 .cpu_setup = __setup_cpu_604, 381 .platform = "ppc604", 382 }, 383 { /* 740/750 (0x4202, don't support TAU ?) */ 384 .pvr_mask = 0xffffffff, 385 .pvr_value = 0x00084202, 386 .cpu_name = "740/750", 387 .cpu_features = CPU_FTRS_740_NOTAU, 388 .cpu_user_features = COMMON_USER, 389 .icache_bsize = 32, 390 .dcache_bsize = 32, 391 .num_pmcs = 4, 392 .cpu_setup = __setup_cpu_750, 393 .platform = "ppc750", 394 }, 395 { /* 750CX (80100 and 8010x?) */ 396 .pvr_mask = 0xfffffff0, 397 .pvr_value = 0x00080100, 398 .cpu_name = "750CX", 399 .cpu_features = CPU_FTRS_750, 400 .cpu_user_features = COMMON_USER, 401 .icache_bsize = 32, 402 .dcache_bsize = 32, 403 .num_pmcs = 4, 404 .cpu_setup = __setup_cpu_750cx, 405 .platform = "ppc750", 406 }, 407 { /* 750CX (82201 and 82202) */ 408 .pvr_mask = 0xfffffff0, 409 .pvr_value = 0x00082200, 410 .cpu_name = "750CX", 411 .cpu_features = CPU_FTRS_750, 412 .cpu_user_features = COMMON_USER, 413 .icache_bsize = 32, 414 .dcache_bsize = 32, 415 .num_pmcs = 4, 416 .cpu_setup = __setup_cpu_750cx, 417 .platform = "ppc750", 418 }, 419 { /* 750CXe (82214) */ 420 .pvr_mask = 0xfffffff0, 421 .pvr_value = 0x00082210, 422 .cpu_name = "750CXe", 423 .cpu_features = CPU_FTRS_750, 424 .cpu_user_features = COMMON_USER, 425 .icache_bsize = 32, 426 .dcache_bsize = 32, 427 .num_pmcs = 4, 428 .cpu_setup = __setup_cpu_750cx, 429 .platform = "ppc750", 430 }, 431 { /* 750CXe "Gekko" (83214) */ 432 .pvr_mask = 0xffffffff, 433 .pvr_value = 0x00083214, 434 .cpu_name = "750CXe", 435 .cpu_features = CPU_FTRS_750, 436 .cpu_user_features = COMMON_USER, 437 .icache_bsize = 32, 438 .dcache_bsize = 32, 439 .num_pmcs = 4, 440 .cpu_setup = __setup_cpu_750cx, 441 .platform = "ppc750", 442 }, 443 { /* 745/755 */ 444 .pvr_mask = 0xfffff000, 445 .pvr_value = 0x00083000, 446 .cpu_name = "745/755", 447 .cpu_features = CPU_FTRS_750, 448 .cpu_user_features = COMMON_USER, 449 .icache_bsize = 32, 450 .dcache_bsize = 32, 451 .num_pmcs = 4, 452 .cpu_setup = __setup_cpu_750, 453 .platform = "ppc750", 454 }, 455 { /* 750FX rev 1.x */ 456 .pvr_mask = 0xffffff00, 457 .pvr_value = 0x70000100, 458 .cpu_name = "750FX", 459 .cpu_features = CPU_FTRS_750FX1, 460 .cpu_user_features = COMMON_USER, 461 .icache_bsize = 32, 462 .dcache_bsize = 32, 463 .num_pmcs = 4, 464 .cpu_setup = __setup_cpu_750, 465 .platform = "ppc750", 466 }, 467 { /* 750FX rev 2.0 must disable HID0[DPM] */ 468 .pvr_mask = 0xffffffff, 469 .pvr_value = 0x70000200, 470 .cpu_name = "750FX", 471 .cpu_features = CPU_FTRS_750FX2, 472 .cpu_user_features = COMMON_USER, 473 .icache_bsize = 32, 474 .dcache_bsize = 32, 475 .num_pmcs = 4, 476 .cpu_setup = __setup_cpu_750, 477 .platform = "ppc750", 478 }, 479 { /* 750FX (All revs except 2.0) */ 480 .pvr_mask = 0xffff0000, 481 .pvr_value = 0x70000000, 482 .cpu_name = "750FX", 483 .cpu_features = CPU_FTRS_750FX, 484 .cpu_user_features = COMMON_USER, 485 .icache_bsize = 32, 486 .dcache_bsize = 32, 487 .num_pmcs = 4, 488 .cpu_setup = __setup_cpu_750fx, 489 .platform = "ppc750", 490 }, 491 { /* 750GX */ 492 .pvr_mask = 0xffff0000, 493 .pvr_value = 0x70020000, 494 .cpu_name = "750GX", 495 .cpu_features = CPU_FTRS_750GX, 496 .cpu_user_features = COMMON_USER, 497 .icache_bsize = 32, 498 .dcache_bsize = 32, 499 .num_pmcs = 4, 500 .cpu_setup = __setup_cpu_750fx, 501 .platform = "ppc750", 502 }, 503 { /* 740/750 (L2CR bit need fixup for 740) */ 504 .pvr_mask = 0xffff0000, 505 .pvr_value = 0x00080000, 506 .cpu_name = "740/750", 507 .cpu_features = CPU_FTRS_740, 508 .cpu_user_features = COMMON_USER, 509 .icache_bsize = 32, 510 .dcache_bsize = 32, 511 .num_pmcs = 4, 512 .cpu_setup = __setup_cpu_750, 513 .platform = "ppc750", 514 }, 515 { /* 7400 rev 1.1 ? (no TAU) */ 516 .pvr_mask = 0xffffffff, 517 .pvr_value = 0x000c1101, 518 .cpu_name = "7400 (1.1)", 519 .cpu_features = CPU_FTRS_7400_NOTAU, 520 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 521 .icache_bsize = 32, 522 .dcache_bsize = 32, 523 .num_pmcs = 4, 524 .cpu_setup = __setup_cpu_7400, 525 .platform = "ppc7400", 526 }, 527 { /* 7400 */ 528 .pvr_mask = 0xffff0000, 529 .pvr_value = 0x000c0000, 530 .cpu_name = "7400", 531 .cpu_features = CPU_FTRS_7400, 532 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 533 .icache_bsize = 32, 534 .dcache_bsize = 32, 535 .num_pmcs = 4, 536 .cpu_setup = __setup_cpu_7400, 537 .platform = "ppc7400", 538 }, 539 { /* 7410 */ 540 .pvr_mask = 0xffff0000, 541 .pvr_value = 0x800c0000, 542 .cpu_name = "7410", 543 .cpu_features = CPU_FTRS_7400, 544 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 545 .icache_bsize = 32, 546 .dcache_bsize = 32, 547 .num_pmcs = 4, 548 .cpu_setup = __setup_cpu_7410, 549 .platform = "ppc7400", 550 }, 551 { /* 7450 2.0 - no doze/nap */ 552 .pvr_mask = 0xffffffff, 553 .pvr_value = 0x80000200, 554 .cpu_name = "7450", 555 .cpu_features = CPU_FTRS_7450_20, 556 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 557 .icache_bsize = 32, 558 .dcache_bsize = 32, 559 .num_pmcs = 6, 560 .cpu_setup = __setup_cpu_745x, 561 .oprofile_cpu_type = "ppc/7450", 562 .oprofile_type = PPC_OPROFILE_G4, 563 .platform = "ppc7450", 564 }, 565 { /* 7450 2.1 */ 566 .pvr_mask = 0xffffffff, 567 .pvr_value = 0x80000201, 568 .cpu_name = "7450", 569 .cpu_features = CPU_FTRS_7450_21, 570 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 571 .icache_bsize = 32, 572 .dcache_bsize = 32, 573 .num_pmcs = 6, 574 .cpu_setup = __setup_cpu_745x, 575 .oprofile_cpu_type = "ppc/7450", 576 .oprofile_type = PPC_OPROFILE_G4, 577 .platform = "ppc7450", 578 }, 579 { /* 7450 2.3 and newer */ 580 .pvr_mask = 0xffff0000, 581 .pvr_value = 0x80000000, 582 .cpu_name = "7450", 583 .cpu_features = CPU_FTRS_7450_23, 584 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 585 .icache_bsize = 32, 586 .dcache_bsize = 32, 587 .num_pmcs = 6, 588 .cpu_setup = __setup_cpu_745x, 589 .oprofile_cpu_type = "ppc/7450", 590 .oprofile_type = PPC_OPROFILE_G4, 591 .platform = "ppc7450", 592 }, 593 { /* 7455 rev 1.x */ 594 .pvr_mask = 0xffffff00, 595 .pvr_value = 0x80010100, 596 .cpu_name = "7455", 597 .cpu_features = CPU_FTRS_7455_1, 598 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 599 .icache_bsize = 32, 600 .dcache_bsize = 32, 601 .num_pmcs = 6, 602 .cpu_setup = __setup_cpu_745x, 603 .oprofile_cpu_type = "ppc/7450", 604 .oprofile_type = PPC_OPROFILE_G4, 605 .platform = "ppc7450", 606 }, 607 { /* 7455 rev 2.0 */ 608 .pvr_mask = 0xffffffff, 609 .pvr_value = 0x80010200, 610 .cpu_name = "7455", 611 .cpu_features = CPU_FTRS_7455_20, 612 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 613 .icache_bsize = 32, 614 .dcache_bsize = 32, 615 .num_pmcs = 6, 616 .cpu_setup = __setup_cpu_745x, 617 .oprofile_cpu_type = "ppc/7450", 618 .oprofile_type = PPC_OPROFILE_G4, 619 .platform = "ppc7450", 620 }, 621 { /* 7455 others */ 622 .pvr_mask = 0xffff0000, 623 .pvr_value = 0x80010000, 624 .cpu_name = "7455", 625 .cpu_features = CPU_FTRS_7455, 626 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 627 .icache_bsize = 32, 628 .dcache_bsize = 32, 629 .num_pmcs = 6, 630 .cpu_setup = __setup_cpu_745x, 631 .oprofile_cpu_type = "ppc/7450", 632 .oprofile_type = PPC_OPROFILE_G4, 633 .platform = "ppc7450", 634 }, 635 { /* 7447/7457 Rev 1.0 */ 636 .pvr_mask = 0xffffffff, 637 .pvr_value = 0x80020100, 638 .cpu_name = "7447/7457", 639 .cpu_features = CPU_FTRS_7447_10, 640 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 641 .icache_bsize = 32, 642 .dcache_bsize = 32, 643 .num_pmcs = 6, 644 .cpu_setup = __setup_cpu_745x, 645 .oprofile_cpu_type = "ppc/7450", 646 .oprofile_type = PPC_OPROFILE_G4, 647 .platform = "ppc7450", 648 }, 649 { /* 7447/7457 Rev 1.1 */ 650 .pvr_mask = 0xffffffff, 651 .pvr_value = 0x80020101, 652 .cpu_name = "7447/7457", 653 .cpu_features = CPU_FTRS_7447_10, 654 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 655 .icache_bsize = 32, 656 .dcache_bsize = 32, 657 .num_pmcs = 6, 658 .cpu_setup = __setup_cpu_745x, 659 .oprofile_cpu_type = "ppc/7450", 660 .oprofile_type = PPC_OPROFILE_G4, 661 .platform = "ppc7450", 662 }, 663 { /* 7447/7457 Rev 1.2 and later */ 664 .pvr_mask = 0xffff0000, 665 .pvr_value = 0x80020000, 666 .cpu_name = "7447/7457", 667 .cpu_features = CPU_FTRS_7447, 668 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 669 .icache_bsize = 32, 670 .dcache_bsize = 32, 671 .num_pmcs = 6, 672 .cpu_setup = __setup_cpu_745x, 673 .oprofile_cpu_type = "ppc/7450", 674 .oprofile_type = PPC_OPROFILE_G4, 675 .platform = "ppc7450", 676 }, 677 { /* 7447A */ 678 .pvr_mask = 0xffff0000, 679 .pvr_value = 0x80030000, 680 .cpu_name = "7447A", 681 .cpu_features = CPU_FTRS_7447A, 682 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 683 .icache_bsize = 32, 684 .dcache_bsize = 32, 685 .num_pmcs = 6, 686 .cpu_setup = __setup_cpu_745x, 687 .oprofile_cpu_type = "ppc/7450", 688 .oprofile_type = PPC_OPROFILE_G4, 689 .platform = "ppc7450", 690 }, 691 { /* 7448 */ 692 .pvr_mask = 0xffff0000, 693 .pvr_value = 0x80040000, 694 .cpu_name = "7448", 695 .cpu_features = CPU_FTRS_7447A, 696 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, 697 .icache_bsize = 32, 698 .dcache_bsize = 32, 699 .num_pmcs = 6, 700 .cpu_setup = __setup_cpu_745x, 701 .oprofile_cpu_type = "ppc/7450", 702 .oprofile_type = PPC_OPROFILE_G4, 703 .platform = "ppc7450", 704 }, 705 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 706 .pvr_mask = 0x7fff0000, 707 .pvr_value = 0x00810000, 708 .cpu_name = "82xx", 709 .cpu_features = CPU_FTRS_82XX, 710 .cpu_user_features = COMMON_USER, 711 .icache_bsize = 32, 712 .dcache_bsize = 32, 713 .cpu_setup = __setup_cpu_603, 714 .platform = "ppc603", 715 }, 716 { /* All G2_LE (603e core, plus some) have the same pvr */ 717 .pvr_mask = 0x7fff0000, 718 .pvr_value = 0x00820000, 719 .cpu_name = "G2_LE", 720 .cpu_features = CPU_FTRS_G2_LE, 721 .cpu_user_features = COMMON_USER, 722 .icache_bsize = 32, 723 .dcache_bsize = 32, 724 .cpu_setup = __setup_cpu_603, 725 .platform = "ppc603", 726 }, 727 { /* e300 (a 603e core, plus some) on 83xx */ 728 .pvr_mask = 0x7fff0000, 729 .pvr_value = 0x00830000, 730 .cpu_name = "e300", 731 .cpu_features = CPU_FTRS_E300, 732 .cpu_user_features = COMMON_USER, 733 .icache_bsize = 32, 734 .dcache_bsize = 32, 735 .cpu_setup = __setup_cpu_603, 736 .platform = "ppc603", 737 }, 738 { /* default match, we assume split I/D cache & TB (non-601)... */ 739 .pvr_mask = 0x00000000, 740 .pvr_value = 0x00000000, 741 .cpu_name = "(generic PPC)", 742 .cpu_features = CPU_FTRS_CLASSIC32, 743 .cpu_user_features = COMMON_USER, 744 .icache_bsize = 32, 745 .dcache_bsize = 32, 746 .platform = "ppc603", 747 }, 748 #endif /* CLASSIC_PPC */ 749 #ifdef CONFIG_8xx 750 { /* 8xx */ 751 .pvr_mask = 0xffff0000, 752 .pvr_value = 0x00500000, 753 .cpu_name = "8xx", 754 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 755 * if the 8xx code is there.... */ 756 .cpu_features = CPU_FTRS_8XX, 757 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 758 .icache_bsize = 16, 759 .dcache_bsize = 16, 760 .platform = "ppc823", 761 }, 762 #endif /* CONFIG_8xx */ 763 #ifdef CONFIG_40x 764 { /* 403GC */ 765 .pvr_mask = 0xffffff00, 766 .pvr_value = 0x00200200, 767 .cpu_name = "403GC", 768 .cpu_features = CPU_FTRS_40X, 769 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 770 .icache_bsize = 16, 771 .dcache_bsize = 16, 772 .platform = "ppc403", 773 }, 774 { /* 403GCX */ 775 .pvr_mask = 0xffffff00, 776 .pvr_value = 0x00201400, 777 .cpu_name = "403GCX", 778 .cpu_features = CPU_FTRS_40X, 779 .cpu_user_features = PPC_FEATURE_32 | 780 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 781 .icache_bsize = 16, 782 .dcache_bsize = 16, 783 .platform = "ppc403", 784 }, 785 { /* 403G ?? */ 786 .pvr_mask = 0xffff0000, 787 .pvr_value = 0x00200000, 788 .cpu_name = "403G ??", 789 .cpu_features = CPU_FTRS_40X, 790 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 791 .icache_bsize = 16, 792 .dcache_bsize = 16, 793 .platform = "ppc403", 794 }, 795 { /* 405GP */ 796 .pvr_mask = 0xffff0000, 797 .pvr_value = 0x40110000, 798 .cpu_name = "405GP", 799 .cpu_features = CPU_FTRS_40X, 800 .cpu_user_features = PPC_FEATURE_32 | 801 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 802 .icache_bsize = 32, 803 .dcache_bsize = 32, 804 .platform = "ppc405", 805 }, 806 { /* STB 03xxx */ 807 .pvr_mask = 0xffff0000, 808 .pvr_value = 0x40130000, 809 .cpu_name = "STB03xxx", 810 .cpu_features = CPU_FTRS_40X, 811 .cpu_user_features = PPC_FEATURE_32 | 812 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 813 .icache_bsize = 32, 814 .dcache_bsize = 32, 815 .platform = "ppc405", 816 }, 817 { /* STB 04xxx */ 818 .pvr_mask = 0xffff0000, 819 .pvr_value = 0x41810000, 820 .cpu_name = "STB04xxx", 821 .cpu_features = CPU_FTRS_40X, 822 .cpu_user_features = PPC_FEATURE_32 | 823 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 824 .icache_bsize = 32, 825 .dcache_bsize = 32, 826 .platform = "ppc405", 827 }, 828 { /* NP405L */ 829 .pvr_mask = 0xffff0000, 830 .pvr_value = 0x41610000, 831 .cpu_name = "NP405L", 832 .cpu_features = CPU_FTRS_40X, 833 .cpu_user_features = PPC_FEATURE_32 | 834 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 835 .icache_bsize = 32, 836 .dcache_bsize = 32, 837 .platform = "ppc405", 838 }, 839 { /* NP4GS3 */ 840 .pvr_mask = 0xffff0000, 841 .pvr_value = 0x40B10000, 842 .cpu_name = "NP4GS3", 843 .cpu_features = CPU_FTRS_40X, 844 .cpu_user_features = PPC_FEATURE_32 | 845 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 846 .icache_bsize = 32, 847 .dcache_bsize = 32, 848 .platform = "ppc405", 849 }, 850 { /* NP405H */ 851 .pvr_mask = 0xffff0000, 852 .pvr_value = 0x41410000, 853 .cpu_name = "NP405H", 854 .cpu_features = CPU_FTRS_40X, 855 .cpu_user_features = PPC_FEATURE_32 | 856 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 857 .icache_bsize = 32, 858 .dcache_bsize = 32, 859 .platform = "ppc405", 860 }, 861 { /* 405GPr */ 862 .pvr_mask = 0xffff0000, 863 .pvr_value = 0x50910000, 864 .cpu_name = "405GPr", 865 .cpu_features = CPU_FTRS_40X, 866 .cpu_user_features = PPC_FEATURE_32 | 867 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 868 .icache_bsize = 32, 869 .dcache_bsize = 32, 870 .platform = "ppc405", 871 }, 872 { /* STBx25xx */ 873 .pvr_mask = 0xffff0000, 874 .pvr_value = 0x51510000, 875 .cpu_name = "STBx25xx", 876 .cpu_features = CPU_FTRS_40X, 877 .cpu_user_features = PPC_FEATURE_32 | 878 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 879 .icache_bsize = 32, 880 .dcache_bsize = 32, 881 .platform = "ppc405", 882 }, 883 { /* 405LP */ 884 .pvr_mask = 0xffff0000, 885 .pvr_value = 0x41F10000, 886 .cpu_name = "405LP", 887 .cpu_features = CPU_FTRS_40X, 888 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 889 .icache_bsize = 32, 890 .dcache_bsize = 32, 891 .platform = "ppc405", 892 }, 893 { /* Xilinx Virtex-II Pro */ 894 .pvr_mask = 0xffff0000, 895 .pvr_value = 0x20010000, 896 .cpu_name = "Virtex-II Pro", 897 .cpu_features = CPU_FTRS_40X, 898 .cpu_user_features = PPC_FEATURE_32 | 899 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 900 .icache_bsize = 32, 901 .dcache_bsize = 32, 902 .platform = "ppc405", 903 }, 904 { /* 405EP */ 905 .pvr_mask = 0xffff0000, 906 .pvr_value = 0x51210000, 907 .cpu_name = "405EP", 908 .cpu_features = CPU_FTRS_40X, 909 .cpu_user_features = PPC_FEATURE_32 | 910 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 911 .icache_bsize = 32, 912 .dcache_bsize = 32, 913 .platform = "ppc405", 914 }, 915 916 #endif /* CONFIG_40x */ 917 #ifdef CONFIG_44x 918 { 919 .pvr_mask = 0xf0000fff, 920 .pvr_value = 0x40000850, 921 .cpu_name = "440EP Rev. A", 922 .cpu_features = CPU_FTRS_44X, 923 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 924 .icache_bsize = 32, 925 .dcache_bsize = 32, 926 .platform = "ppc440", 927 }, 928 { 929 .pvr_mask = 0xf0000fff, 930 .pvr_value = 0x400008d3, 931 .cpu_name = "440EP Rev. B", 932 .cpu_features = CPU_FTRS_44X, 933 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 934 .icache_bsize = 32, 935 .dcache_bsize = 32, 936 .platform = "ppc440", 937 }, 938 { /* 440GP Rev. B */ 939 .pvr_mask = 0xf0000fff, 940 .pvr_value = 0x40000440, 941 .cpu_name = "440GP Rev. B", 942 .cpu_features = CPU_FTRS_44X, 943 .cpu_user_features = COMMON_USER_BOOKE, 944 .icache_bsize = 32, 945 .dcache_bsize = 32, 946 .platform = "ppc440gp", 947 }, 948 { /* 440GP Rev. C */ 949 .pvr_mask = 0xf0000fff, 950 .pvr_value = 0x40000481, 951 .cpu_name = "440GP Rev. C", 952 .cpu_features = CPU_FTRS_44X, 953 .cpu_user_features = COMMON_USER_BOOKE, 954 .icache_bsize = 32, 955 .dcache_bsize = 32, 956 .platform = "ppc440gp", 957 }, 958 { /* 440GX Rev. A */ 959 .pvr_mask = 0xf0000fff, 960 .pvr_value = 0x50000850, 961 .cpu_name = "440GX Rev. A", 962 .cpu_features = CPU_FTRS_44X, 963 .cpu_user_features = COMMON_USER_BOOKE, 964 .icache_bsize = 32, 965 .dcache_bsize = 32, 966 .platform = "ppc440", 967 }, 968 { /* 440GX Rev. B */ 969 .pvr_mask = 0xf0000fff, 970 .pvr_value = 0x50000851, 971 .cpu_name = "440GX Rev. B", 972 .cpu_features = CPU_FTRS_44X, 973 .cpu_user_features = COMMON_USER_BOOKE, 974 .icache_bsize = 32, 975 .dcache_bsize = 32, 976 .platform = "ppc440", 977 }, 978 { /* 440GX Rev. C */ 979 .pvr_mask = 0xf0000fff, 980 .pvr_value = 0x50000892, 981 .cpu_name = "440GX Rev. C", 982 .cpu_features = CPU_FTRS_44X, 983 .cpu_user_features = COMMON_USER_BOOKE, 984 .icache_bsize = 32, 985 .dcache_bsize = 32, 986 .platform = "ppc440", 987 }, 988 { /* 440GX Rev. F */ 989 .pvr_mask = 0xf0000fff, 990 .pvr_value = 0x50000894, 991 .cpu_name = "440GX Rev. F", 992 .cpu_features = CPU_FTRS_44X, 993 .cpu_user_features = COMMON_USER_BOOKE, 994 .icache_bsize = 32, 995 .dcache_bsize = 32, 996 .platform = "ppc440", 997 }, 998 { /* 440SP Rev. A */ 999 .pvr_mask = 0xff000fff, 1000 .pvr_value = 0x53000891, 1001 .cpu_name = "440SP Rev. A", 1002 .cpu_features = CPU_FTRS_44X, 1003 .cpu_user_features = COMMON_USER_BOOKE, 1004 .icache_bsize = 32, 1005 .dcache_bsize = 32, 1006 .platform = "ppc440", 1007 }, 1008 { /* 440SPe Rev. A */ 1009 .pvr_mask = 0xff000fff, 1010 .pvr_value = 0x53000890, 1011 .cpu_name = "440SPe Rev. A", 1012 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 1013 CPU_FTR_USE_TB, 1014 .cpu_user_features = COMMON_USER_BOOKE, 1015 .icache_bsize = 32, 1016 .dcache_bsize = 32, 1017 .platform = "ppc440", 1018 }, 1019 #endif /* CONFIG_44x */ 1020 #ifdef CONFIG_FSL_BOOKE 1021 { /* e200z5 */ 1022 .pvr_mask = 0xfff00000, 1023 .pvr_value = 0x81000000, 1024 .cpu_name = "e200z5", 1025 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1026 .cpu_features = CPU_FTRS_E200, 1027 .cpu_user_features = COMMON_USER_BOOKE | 1028 PPC_FEATURE_HAS_EFP_SINGLE | 1029 PPC_FEATURE_UNIFIED_CACHE, 1030 .dcache_bsize = 32, 1031 .platform = "ppc5554", 1032 }, 1033 { /* e200z6 */ 1034 .pvr_mask = 0xfff00000, 1035 .pvr_value = 0x81100000, 1036 .cpu_name = "e200z6", 1037 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1038 .cpu_features = CPU_FTRS_E200, 1039 .cpu_user_features = COMMON_USER_BOOKE | 1040 PPC_FEATURE_SPE_COMP | 1041 PPC_FEATURE_HAS_EFP_SINGLE | 1042 PPC_FEATURE_UNIFIED_CACHE, 1043 .dcache_bsize = 32, 1044 .platform = "ppc5554", 1045 }, 1046 { /* e500 */ 1047 .pvr_mask = 0xffff0000, 1048 .pvr_value = 0x80200000, 1049 .cpu_name = "e500", 1050 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1051 .cpu_features = CPU_FTRS_E500, 1052 .cpu_user_features = COMMON_USER_BOOKE | 1053 PPC_FEATURE_SPE_COMP | 1054 PPC_FEATURE_HAS_EFP_SINGLE, 1055 .icache_bsize = 32, 1056 .dcache_bsize = 32, 1057 .num_pmcs = 4, 1058 .oprofile_cpu_type = "ppc/e500", 1059 .oprofile_type = PPC_OPROFILE_BOOKE, 1060 .platform = "ppc8540", 1061 }, 1062 { /* e500v2 */ 1063 .pvr_mask = 0xffff0000, 1064 .pvr_value = 0x80210000, 1065 .cpu_name = "e500v2", 1066 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1067 .cpu_features = CPU_FTRS_E500_2, 1068 .cpu_user_features = COMMON_USER_BOOKE | 1069 PPC_FEATURE_SPE_COMP | 1070 PPC_FEATURE_HAS_EFP_SINGLE | 1071 PPC_FEATURE_HAS_EFP_DOUBLE, 1072 .icache_bsize = 32, 1073 .dcache_bsize = 32, 1074 .num_pmcs = 4, 1075 .oprofile_cpu_type = "ppc/e500", 1076 .oprofile_type = PPC_OPROFILE_BOOKE, 1077 .platform = "ppc8548", 1078 }, 1079 #endif 1080 #if !CLASSIC_PPC 1081 { /* default match */ 1082 .pvr_mask = 0x00000000, 1083 .pvr_value = 0x00000000, 1084 .cpu_name = "(generic PPC)", 1085 .cpu_features = CPU_FTRS_GENERIC_32, 1086 .cpu_user_features = PPC_FEATURE_32, 1087 .icache_bsize = 32, 1088 .dcache_bsize = 32, 1089 .platform = "powerpc", 1090 } 1091 #endif /* !CLASSIC_PPC */ 1092 #endif /* CONFIG_PPC32 */ 1093 }; 1094