1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 #include <asm/setup.h> 24 25 struct cpu_spec* cur_cpu_spec = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __restore_cpu_pa6t(void); 67 extern void __restore_cpu_ppc970(void); 68 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_power7(void); 70 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 71 extern void __restore_cpu_power8(void); 72 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 73 extern void __restore_cpu_power9(void); 74 extern void __flush_tlb_power7(unsigned int action); 75 extern void __flush_tlb_power8(unsigned int action); 76 extern void __flush_tlb_power9(unsigned int action); 77 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 78 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 79 #endif /* CONFIG_PPC64 */ 80 #if defined(CONFIG_E500) 81 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 82 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 83 extern void __restore_cpu_e5500(void); 84 extern void __restore_cpu_e6500(void); 85 #endif /* CONFIG_E500 */ 86 87 /* This table only contains "desktop" CPUs, it need to be filled with embedded 88 * ones as well... 89 */ 90 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 91 PPC_FEATURE_HAS_MMU) 92 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 93 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 94 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 95 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 96 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 97 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 98 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 100 PPC_FEATURE_TRUE_LE | \ 101 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 102 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 104 PPC_FEATURE_TRUE_LE | \ 105 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 106 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 107 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 108 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 109 PPC_FEATURE_TRUE_LE | \ 110 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 111 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 112 PPC_FEATURE2_HTM_COMP | \ 113 PPC_FEATURE2_HTM_NOSC_COMP | \ 114 PPC_FEATURE2_DSCR | \ 115 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 116 PPC_FEATURE2_VEC_CRYPTO) 117 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 118 PPC_FEATURE_TRUE_LE | \ 119 PPC_FEATURE_HAS_ALTIVEC_COMP) 120 #define COMMON_USER_POWER9 COMMON_USER_POWER8 121 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 122 PPC_FEATURE2_ARCH_3_00 | \ 123 PPC_FEATURE2_HAS_IEEE128) 124 125 #ifdef CONFIG_PPC_BOOK3E_64 126 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 127 #else 128 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 129 PPC_FEATURE_BOOKE) 130 #endif 131 132 static struct cpu_spec __initdata cpu_specs[] = { 133 #ifdef CONFIG_PPC_BOOK3S_64 134 { /* Power4 */ 135 .pvr_mask = 0xffff0000, 136 .pvr_value = 0x00350000, 137 .cpu_name = "POWER4 (gp)", 138 .cpu_features = CPU_FTRS_POWER4, 139 .cpu_user_features = COMMON_USER_POWER4, 140 .mmu_features = MMU_FTRS_POWER4, 141 .icache_bsize = 128, 142 .dcache_bsize = 128, 143 .num_pmcs = 8, 144 .pmc_type = PPC_PMC_IBM, 145 .oprofile_cpu_type = "ppc64/power4", 146 .oprofile_type = PPC_OPROFILE_POWER4, 147 .platform = "power4", 148 }, 149 { /* Power4+ */ 150 .pvr_mask = 0xffff0000, 151 .pvr_value = 0x00380000, 152 .cpu_name = "POWER4+ (gq)", 153 .cpu_features = CPU_FTRS_POWER4, 154 .cpu_user_features = COMMON_USER_POWER4, 155 .mmu_features = MMU_FTRS_POWER4, 156 .icache_bsize = 128, 157 .dcache_bsize = 128, 158 .num_pmcs = 8, 159 .pmc_type = PPC_PMC_IBM, 160 .oprofile_cpu_type = "ppc64/power4", 161 .oprofile_type = PPC_OPROFILE_POWER4, 162 .platform = "power4", 163 }, 164 { /* PPC970 */ 165 .pvr_mask = 0xffff0000, 166 .pvr_value = 0x00390000, 167 .cpu_name = "PPC970", 168 .cpu_features = CPU_FTRS_PPC970, 169 .cpu_user_features = COMMON_USER_POWER4 | 170 PPC_FEATURE_HAS_ALTIVEC_COMP, 171 .mmu_features = MMU_FTRS_PPC970, 172 .icache_bsize = 128, 173 .dcache_bsize = 128, 174 .num_pmcs = 8, 175 .pmc_type = PPC_PMC_IBM, 176 .cpu_setup = __setup_cpu_ppc970, 177 .cpu_restore = __restore_cpu_ppc970, 178 .oprofile_cpu_type = "ppc64/970", 179 .oprofile_type = PPC_OPROFILE_POWER4, 180 .platform = "ppc970", 181 }, 182 { /* PPC970FX */ 183 .pvr_mask = 0xffff0000, 184 .pvr_value = 0x003c0000, 185 .cpu_name = "PPC970FX", 186 .cpu_features = CPU_FTRS_PPC970, 187 .cpu_user_features = COMMON_USER_POWER4 | 188 PPC_FEATURE_HAS_ALTIVEC_COMP, 189 .mmu_features = MMU_FTRS_PPC970, 190 .icache_bsize = 128, 191 .dcache_bsize = 128, 192 .num_pmcs = 8, 193 .pmc_type = PPC_PMC_IBM, 194 .cpu_setup = __setup_cpu_ppc970, 195 .cpu_restore = __restore_cpu_ppc970, 196 .oprofile_cpu_type = "ppc64/970", 197 .oprofile_type = PPC_OPROFILE_POWER4, 198 .platform = "ppc970", 199 }, 200 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 201 .pvr_mask = 0xffffffff, 202 .pvr_value = 0x00440100, 203 .cpu_name = "PPC970MP", 204 .cpu_features = CPU_FTRS_PPC970, 205 .cpu_user_features = COMMON_USER_POWER4 | 206 PPC_FEATURE_HAS_ALTIVEC_COMP, 207 .mmu_features = MMU_FTRS_PPC970, 208 .icache_bsize = 128, 209 .dcache_bsize = 128, 210 .num_pmcs = 8, 211 .pmc_type = PPC_PMC_IBM, 212 .cpu_setup = __setup_cpu_ppc970, 213 .cpu_restore = __restore_cpu_ppc970, 214 .oprofile_cpu_type = "ppc64/970MP", 215 .oprofile_type = PPC_OPROFILE_POWER4, 216 .platform = "ppc970", 217 }, 218 { /* PPC970MP */ 219 .pvr_mask = 0xffff0000, 220 .pvr_value = 0x00440000, 221 .cpu_name = "PPC970MP", 222 .cpu_features = CPU_FTRS_PPC970, 223 .cpu_user_features = COMMON_USER_POWER4 | 224 PPC_FEATURE_HAS_ALTIVEC_COMP, 225 .mmu_features = MMU_FTRS_PPC970, 226 .icache_bsize = 128, 227 .dcache_bsize = 128, 228 .num_pmcs = 8, 229 .pmc_type = PPC_PMC_IBM, 230 .cpu_setup = __setup_cpu_ppc970MP, 231 .cpu_restore = __restore_cpu_ppc970, 232 .oprofile_cpu_type = "ppc64/970MP", 233 .oprofile_type = PPC_OPROFILE_POWER4, 234 .platform = "ppc970", 235 }, 236 { /* PPC970GX */ 237 .pvr_mask = 0xffff0000, 238 .pvr_value = 0x00450000, 239 .cpu_name = "PPC970GX", 240 .cpu_features = CPU_FTRS_PPC970, 241 .cpu_user_features = COMMON_USER_POWER4 | 242 PPC_FEATURE_HAS_ALTIVEC_COMP, 243 .mmu_features = MMU_FTRS_PPC970, 244 .icache_bsize = 128, 245 .dcache_bsize = 128, 246 .num_pmcs = 8, 247 .pmc_type = PPC_PMC_IBM, 248 .cpu_setup = __setup_cpu_ppc970, 249 .oprofile_cpu_type = "ppc64/970", 250 .oprofile_type = PPC_OPROFILE_POWER4, 251 .platform = "ppc970", 252 }, 253 { /* Power5 GR */ 254 .pvr_mask = 0xffff0000, 255 .pvr_value = 0x003a0000, 256 .cpu_name = "POWER5 (gr)", 257 .cpu_features = CPU_FTRS_POWER5, 258 .cpu_user_features = COMMON_USER_POWER5, 259 .mmu_features = MMU_FTRS_POWER5, 260 .icache_bsize = 128, 261 .dcache_bsize = 128, 262 .num_pmcs = 6, 263 .pmc_type = PPC_PMC_IBM, 264 .oprofile_cpu_type = "ppc64/power5", 265 .oprofile_type = PPC_OPROFILE_POWER4, 266 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 267 * and above but only works on POWER5 and above 268 */ 269 .oprofile_mmcra_sihv = MMCRA_SIHV, 270 .oprofile_mmcra_sipr = MMCRA_SIPR, 271 .platform = "power5", 272 }, 273 { /* Power5++ */ 274 .pvr_mask = 0xffffff00, 275 .pvr_value = 0x003b0300, 276 .cpu_name = "POWER5+ (gs)", 277 .cpu_features = CPU_FTRS_POWER5, 278 .cpu_user_features = COMMON_USER_POWER5_PLUS, 279 .mmu_features = MMU_FTRS_POWER5, 280 .icache_bsize = 128, 281 .dcache_bsize = 128, 282 .num_pmcs = 6, 283 .oprofile_cpu_type = "ppc64/power5++", 284 .oprofile_type = PPC_OPROFILE_POWER4, 285 .oprofile_mmcra_sihv = MMCRA_SIHV, 286 .oprofile_mmcra_sipr = MMCRA_SIPR, 287 .platform = "power5+", 288 }, 289 { /* Power5 GS */ 290 .pvr_mask = 0xffff0000, 291 .pvr_value = 0x003b0000, 292 .cpu_name = "POWER5+ (gs)", 293 .cpu_features = CPU_FTRS_POWER5, 294 .cpu_user_features = COMMON_USER_POWER5_PLUS, 295 .mmu_features = MMU_FTRS_POWER5, 296 .icache_bsize = 128, 297 .dcache_bsize = 128, 298 .num_pmcs = 6, 299 .pmc_type = PPC_PMC_IBM, 300 .oprofile_cpu_type = "ppc64/power5+", 301 .oprofile_type = PPC_OPROFILE_POWER4, 302 .oprofile_mmcra_sihv = MMCRA_SIHV, 303 .oprofile_mmcra_sipr = MMCRA_SIPR, 304 .platform = "power5+", 305 }, 306 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 307 .pvr_mask = 0xffffffff, 308 .pvr_value = 0x0f000001, 309 .cpu_name = "POWER5+", 310 .cpu_features = CPU_FTRS_POWER5, 311 .cpu_user_features = COMMON_USER_POWER5_PLUS, 312 .mmu_features = MMU_FTRS_POWER5, 313 .icache_bsize = 128, 314 .dcache_bsize = 128, 315 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 316 .oprofile_type = PPC_OPROFILE_POWER4, 317 .platform = "power5+", 318 }, 319 { /* Power6 */ 320 .pvr_mask = 0xffff0000, 321 .pvr_value = 0x003e0000, 322 .cpu_name = "POWER6 (raw)", 323 .cpu_features = CPU_FTRS_POWER6, 324 .cpu_user_features = COMMON_USER_POWER6 | 325 PPC_FEATURE_POWER6_EXT, 326 .mmu_features = MMU_FTRS_POWER6, 327 .icache_bsize = 128, 328 .dcache_bsize = 128, 329 .num_pmcs = 6, 330 .pmc_type = PPC_PMC_IBM, 331 .oprofile_cpu_type = "ppc64/power6", 332 .oprofile_type = PPC_OPROFILE_POWER4, 333 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 334 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 335 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 336 POWER6_MMCRA_OTHER, 337 .platform = "power6x", 338 }, 339 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 340 .pvr_mask = 0xffffffff, 341 .pvr_value = 0x0f000002, 342 .cpu_name = "POWER6 (architected)", 343 .cpu_features = CPU_FTRS_POWER6, 344 .cpu_user_features = COMMON_USER_POWER6, 345 .mmu_features = MMU_FTRS_POWER6, 346 .icache_bsize = 128, 347 .dcache_bsize = 128, 348 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 349 .oprofile_type = PPC_OPROFILE_POWER4, 350 .platform = "power6", 351 }, 352 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 353 .pvr_mask = 0xffffffff, 354 .pvr_value = 0x0f000003, 355 .cpu_name = "POWER7 (architected)", 356 .cpu_features = CPU_FTRS_POWER7, 357 .cpu_user_features = COMMON_USER_POWER7, 358 .cpu_user_features2 = COMMON_USER2_POWER7, 359 .mmu_features = MMU_FTRS_POWER7, 360 .icache_bsize = 128, 361 .dcache_bsize = 128, 362 .oprofile_type = PPC_OPROFILE_POWER4, 363 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 364 .cpu_setup = __setup_cpu_power7, 365 .cpu_restore = __restore_cpu_power7, 366 .flush_tlb = __flush_tlb_power7, 367 .machine_check_early = __machine_check_early_realmode_p7, 368 .platform = "power7", 369 }, 370 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 371 .pvr_mask = 0xffffffff, 372 .pvr_value = 0x0f000004, 373 .cpu_name = "POWER8 (architected)", 374 .cpu_features = CPU_FTRS_POWER8, 375 .cpu_user_features = COMMON_USER_POWER8, 376 .cpu_user_features2 = COMMON_USER2_POWER8, 377 .mmu_features = MMU_FTRS_POWER8, 378 .icache_bsize = 128, 379 .dcache_bsize = 128, 380 .oprofile_type = PPC_OPROFILE_INVALID, 381 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 382 .cpu_setup = __setup_cpu_power8, 383 .cpu_restore = __restore_cpu_power8, 384 .flush_tlb = __flush_tlb_power8, 385 .machine_check_early = __machine_check_early_realmode_p8, 386 .platform = "power8", 387 }, 388 { /* Power7 */ 389 .pvr_mask = 0xffff0000, 390 .pvr_value = 0x003f0000, 391 .cpu_name = "POWER7 (raw)", 392 .cpu_features = CPU_FTRS_POWER7, 393 .cpu_user_features = COMMON_USER_POWER7, 394 .cpu_user_features2 = COMMON_USER2_POWER7, 395 .mmu_features = MMU_FTRS_POWER7, 396 .icache_bsize = 128, 397 .dcache_bsize = 128, 398 .num_pmcs = 6, 399 .pmc_type = PPC_PMC_IBM, 400 .oprofile_cpu_type = "ppc64/power7", 401 .oprofile_type = PPC_OPROFILE_POWER4, 402 .cpu_setup = __setup_cpu_power7, 403 .cpu_restore = __restore_cpu_power7, 404 .flush_tlb = __flush_tlb_power7, 405 .machine_check_early = __machine_check_early_realmode_p7, 406 .platform = "power7", 407 }, 408 { /* Power7+ */ 409 .pvr_mask = 0xffff0000, 410 .pvr_value = 0x004A0000, 411 .cpu_name = "POWER7+ (raw)", 412 .cpu_features = CPU_FTRS_POWER7, 413 .cpu_user_features = COMMON_USER_POWER7, 414 .cpu_user_features2 = COMMON_USER2_POWER7, 415 .mmu_features = MMU_FTRS_POWER7, 416 .icache_bsize = 128, 417 .dcache_bsize = 128, 418 .num_pmcs = 6, 419 .pmc_type = PPC_PMC_IBM, 420 .oprofile_cpu_type = "ppc64/power7", 421 .oprofile_type = PPC_OPROFILE_POWER4, 422 .cpu_setup = __setup_cpu_power7, 423 .cpu_restore = __restore_cpu_power7, 424 .flush_tlb = __flush_tlb_power7, 425 .machine_check_early = __machine_check_early_realmode_p7, 426 .platform = "power7+", 427 }, 428 { /* Power8E */ 429 .pvr_mask = 0xffff0000, 430 .pvr_value = 0x004b0000, 431 .cpu_name = "POWER8E (raw)", 432 .cpu_features = CPU_FTRS_POWER8E, 433 .cpu_user_features = COMMON_USER_POWER8, 434 .cpu_user_features2 = COMMON_USER2_POWER8, 435 .mmu_features = MMU_FTRS_POWER8, 436 .icache_bsize = 128, 437 .dcache_bsize = 128, 438 .num_pmcs = 6, 439 .pmc_type = PPC_PMC_IBM, 440 .oprofile_cpu_type = "ppc64/power8", 441 .oprofile_type = PPC_OPROFILE_INVALID, 442 .cpu_setup = __setup_cpu_power8, 443 .cpu_restore = __restore_cpu_power8, 444 .flush_tlb = __flush_tlb_power8, 445 .machine_check_early = __machine_check_early_realmode_p8, 446 .platform = "power8", 447 }, 448 { /* Power8NVL */ 449 .pvr_mask = 0xffff0000, 450 .pvr_value = 0x004c0000, 451 .cpu_name = "POWER8NVL (raw)", 452 .cpu_features = CPU_FTRS_POWER8, 453 .cpu_user_features = COMMON_USER_POWER8, 454 .cpu_user_features2 = COMMON_USER2_POWER8, 455 .mmu_features = MMU_FTRS_POWER8, 456 .icache_bsize = 128, 457 .dcache_bsize = 128, 458 .num_pmcs = 6, 459 .pmc_type = PPC_PMC_IBM, 460 .oprofile_cpu_type = "ppc64/power8", 461 .oprofile_type = PPC_OPROFILE_INVALID, 462 .cpu_setup = __setup_cpu_power8, 463 .cpu_restore = __restore_cpu_power8, 464 .flush_tlb = __flush_tlb_power8, 465 .machine_check_early = __machine_check_early_realmode_p8, 466 .platform = "power8", 467 }, 468 { /* Power8 DD1: Does not support doorbell IPIs */ 469 .pvr_mask = 0xffffff00, 470 .pvr_value = 0x004d0100, 471 .cpu_name = "POWER8 (raw)", 472 .cpu_features = CPU_FTRS_POWER8_DD1, 473 .cpu_user_features = COMMON_USER_POWER8, 474 .cpu_user_features2 = COMMON_USER2_POWER8, 475 .mmu_features = MMU_FTRS_POWER8, 476 .icache_bsize = 128, 477 .dcache_bsize = 128, 478 .num_pmcs = 6, 479 .pmc_type = PPC_PMC_IBM, 480 .oprofile_cpu_type = "ppc64/power8", 481 .oprofile_type = PPC_OPROFILE_INVALID, 482 .cpu_setup = __setup_cpu_power8, 483 .cpu_restore = __restore_cpu_power8, 484 .flush_tlb = __flush_tlb_power8, 485 .machine_check_early = __machine_check_early_realmode_p8, 486 .platform = "power8", 487 }, 488 { /* Power8 */ 489 .pvr_mask = 0xffff0000, 490 .pvr_value = 0x004d0000, 491 .cpu_name = "POWER8 (raw)", 492 .cpu_features = CPU_FTRS_POWER8, 493 .cpu_user_features = COMMON_USER_POWER8, 494 .cpu_user_features2 = COMMON_USER2_POWER8, 495 .mmu_features = MMU_FTRS_POWER8, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power8", 501 .oprofile_type = PPC_OPROFILE_INVALID, 502 .cpu_setup = __setup_cpu_power8, 503 .cpu_restore = __restore_cpu_power8, 504 .flush_tlb = __flush_tlb_power8, 505 .machine_check_early = __machine_check_early_realmode_p8, 506 .platform = "power8", 507 }, 508 { /* Power9 */ 509 .pvr_mask = 0xffff0000, 510 .pvr_value = 0x004e0000, 511 .cpu_name = "POWER9 (raw)", 512 .cpu_features = CPU_FTRS_POWER9, 513 .cpu_user_features = COMMON_USER_POWER9, 514 .cpu_user_features2 = COMMON_USER2_POWER9, 515 .mmu_features = MMU_FTRS_POWER9, 516 .icache_bsize = 128, 517 .dcache_bsize = 128, 518 .num_pmcs = 6, 519 .pmc_type = PPC_PMC_IBM, 520 .oprofile_cpu_type = "ppc64/power9", 521 .oprofile_type = PPC_OPROFILE_INVALID, 522 .cpu_setup = __setup_cpu_power9, 523 .cpu_restore = __restore_cpu_power9, 524 .flush_tlb = __flush_tlb_power9, 525 .platform = "power9", 526 }, 527 { /* Cell Broadband Engine */ 528 .pvr_mask = 0xffff0000, 529 .pvr_value = 0x00700000, 530 .cpu_name = "Cell Broadband Engine", 531 .cpu_features = CPU_FTRS_CELL, 532 .cpu_user_features = COMMON_USER_PPC64 | 533 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 534 PPC_FEATURE_SMT, 535 .mmu_features = MMU_FTRS_CELL, 536 .icache_bsize = 128, 537 .dcache_bsize = 128, 538 .num_pmcs = 4, 539 .pmc_type = PPC_PMC_IBM, 540 .oprofile_cpu_type = "ppc64/cell-be", 541 .oprofile_type = PPC_OPROFILE_CELL, 542 .platform = "ppc-cell-be", 543 }, 544 { /* PA Semi PA6T */ 545 .pvr_mask = 0x7fff0000, 546 .pvr_value = 0x00900000, 547 .cpu_name = "PA6T", 548 .cpu_features = CPU_FTRS_PA6T, 549 .cpu_user_features = COMMON_USER_PA6T, 550 .mmu_features = MMU_FTRS_PA6T, 551 .icache_bsize = 64, 552 .dcache_bsize = 64, 553 .num_pmcs = 6, 554 .pmc_type = PPC_PMC_PA6T, 555 .cpu_setup = __setup_cpu_pa6t, 556 .cpu_restore = __restore_cpu_pa6t, 557 .oprofile_cpu_type = "ppc64/pa6t", 558 .oprofile_type = PPC_OPROFILE_PA6T, 559 .platform = "pa6t", 560 }, 561 { /* default match */ 562 .pvr_mask = 0x00000000, 563 .pvr_value = 0x00000000, 564 .cpu_name = "POWER4 (compatible)", 565 .cpu_features = CPU_FTRS_COMPATIBLE, 566 .cpu_user_features = COMMON_USER_PPC64, 567 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 568 .icache_bsize = 128, 569 .dcache_bsize = 128, 570 .num_pmcs = 6, 571 .pmc_type = PPC_PMC_IBM, 572 .platform = "power4", 573 } 574 #endif /* CONFIG_PPC_BOOK3S_64 */ 575 576 #ifdef CONFIG_PPC32 577 #ifdef CONFIG_PPC_BOOK3S_32 578 { /* 601 */ 579 .pvr_mask = 0xffff0000, 580 .pvr_value = 0x00010000, 581 .cpu_name = "601", 582 .cpu_features = CPU_FTRS_PPC601, 583 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 584 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 585 .mmu_features = MMU_FTR_HPTE_TABLE, 586 .icache_bsize = 32, 587 .dcache_bsize = 32, 588 .machine_check = machine_check_generic, 589 .platform = "ppc601", 590 }, 591 { /* 603 */ 592 .pvr_mask = 0xffff0000, 593 .pvr_value = 0x00030000, 594 .cpu_name = "603", 595 .cpu_features = CPU_FTRS_603, 596 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 597 .mmu_features = 0, 598 .icache_bsize = 32, 599 .dcache_bsize = 32, 600 .cpu_setup = __setup_cpu_603, 601 .machine_check = machine_check_generic, 602 .platform = "ppc603", 603 }, 604 { /* 603e */ 605 .pvr_mask = 0xffff0000, 606 .pvr_value = 0x00060000, 607 .cpu_name = "603e", 608 .cpu_features = CPU_FTRS_603, 609 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 610 .mmu_features = 0, 611 .icache_bsize = 32, 612 .dcache_bsize = 32, 613 .cpu_setup = __setup_cpu_603, 614 .machine_check = machine_check_generic, 615 .platform = "ppc603", 616 }, 617 { /* 603ev */ 618 .pvr_mask = 0xffff0000, 619 .pvr_value = 0x00070000, 620 .cpu_name = "603ev", 621 .cpu_features = CPU_FTRS_603, 622 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 623 .mmu_features = 0, 624 .icache_bsize = 32, 625 .dcache_bsize = 32, 626 .cpu_setup = __setup_cpu_603, 627 .machine_check = machine_check_generic, 628 .platform = "ppc603", 629 }, 630 { /* 604 */ 631 .pvr_mask = 0xffff0000, 632 .pvr_value = 0x00040000, 633 .cpu_name = "604", 634 .cpu_features = CPU_FTRS_604, 635 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 636 .mmu_features = MMU_FTR_HPTE_TABLE, 637 .icache_bsize = 32, 638 .dcache_bsize = 32, 639 .num_pmcs = 2, 640 .cpu_setup = __setup_cpu_604, 641 .machine_check = machine_check_generic, 642 .platform = "ppc604", 643 }, 644 { /* 604e */ 645 .pvr_mask = 0xfffff000, 646 .pvr_value = 0x00090000, 647 .cpu_name = "604e", 648 .cpu_features = CPU_FTRS_604, 649 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 650 .mmu_features = MMU_FTR_HPTE_TABLE, 651 .icache_bsize = 32, 652 .dcache_bsize = 32, 653 .num_pmcs = 4, 654 .cpu_setup = __setup_cpu_604, 655 .machine_check = machine_check_generic, 656 .platform = "ppc604", 657 }, 658 { /* 604r */ 659 .pvr_mask = 0xffff0000, 660 .pvr_value = 0x00090000, 661 .cpu_name = "604r", 662 .cpu_features = CPU_FTRS_604, 663 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 664 .mmu_features = MMU_FTR_HPTE_TABLE, 665 .icache_bsize = 32, 666 .dcache_bsize = 32, 667 .num_pmcs = 4, 668 .cpu_setup = __setup_cpu_604, 669 .machine_check = machine_check_generic, 670 .platform = "ppc604", 671 }, 672 { /* 604ev */ 673 .pvr_mask = 0xffff0000, 674 .pvr_value = 0x000a0000, 675 .cpu_name = "604ev", 676 .cpu_features = CPU_FTRS_604, 677 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 678 .mmu_features = MMU_FTR_HPTE_TABLE, 679 .icache_bsize = 32, 680 .dcache_bsize = 32, 681 .num_pmcs = 4, 682 .cpu_setup = __setup_cpu_604, 683 .machine_check = machine_check_generic, 684 .platform = "ppc604", 685 }, 686 { /* 740/750 (0x4202, don't support TAU ?) */ 687 .pvr_mask = 0xffffffff, 688 .pvr_value = 0x00084202, 689 .cpu_name = "740/750", 690 .cpu_features = CPU_FTRS_740_NOTAU, 691 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 692 .mmu_features = MMU_FTR_HPTE_TABLE, 693 .icache_bsize = 32, 694 .dcache_bsize = 32, 695 .num_pmcs = 4, 696 .cpu_setup = __setup_cpu_750, 697 .machine_check = machine_check_generic, 698 .platform = "ppc750", 699 }, 700 { /* 750CX (80100 and 8010x?) */ 701 .pvr_mask = 0xfffffff0, 702 .pvr_value = 0x00080100, 703 .cpu_name = "750CX", 704 .cpu_features = CPU_FTRS_750, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 706 .mmu_features = MMU_FTR_HPTE_TABLE, 707 .icache_bsize = 32, 708 .dcache_bsize = 32, 709 .num_pmcs = 4, 710 .cpu_setup = __setup_cpu_750cx, 711 .machine_check = machine_check_generic, 712 .platform = "ppc750", 713 }, 714 { /* 750CX (82201 and 82202) */ 715 .pvr_mask = 0xfffffff0, 716 .pvr_value = 0x00082200, 717 .cpu_name = "750CX", 718 .cpu_features = CPU_FTRS_750, 719 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 720 .mmu_features = MMU_FTR_HPTE_TABLE, 721 .icache_bsize = 32, 722 .dcache_bsize = 32, 723 .num_pmcs = 4, 724 .pmc_type = PPC_PMC_IBM, 725 .cpu_setup = __setup_cpu_750cx, 726 .machine_check = machine_check_generic, 727 .platform = "ppc750", 728 }, 729 { /* 750CXe (82214) */ 730 .pvr_mask = 0xfffffff0, 731 .pvr_value = 0x00082210, 732 .cpu_name = "750CXe", 733 .cpu_features = CPU_FTRS_750, 734 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 735 .mmu_features = MMU_FTR_HPTE_TABLE, 736 .icache_bsize = 32, 737 .dcache_bsize = 32, 738 .num_pmcs = 4, 739 .pmc_type = PPC_PMC_IBM, 740 .cpu_setup = __setup_cpu_750cx, 741 .machine_check = machine_check_generic, 742 .platform = "ppc750", 743 }, 744 { /* 750CXe "Gekko" (83214) */ 745 .pvr_mask = 0xffffffff, 746 .pvr_value = 0x00083214, 747 .cpu_name = "750CXe", 748 .cpu_features = CPU_FTRS_750, 749 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 750 .mmu_features = MMU_FTR_HPTE_TABLE, 751 .icache_bsize = 32, 752 .dcache_bsize = 32, 753 .num_pmcs = 4, 754 .pmc_type = PPC_PMC_IBM, 755 .cpu_setup = __setup_cpu_750cx, 756 .machine_check = machine_check_generic, 757 .platform = "ppc750", 758 }, 759 { /* 750CL (and "Broadway") */ 760 .pvr_mask = 0xfffff0e0, 761 .pvr_value = 0x00087000, 762 .cpu_name = "750CL", 763 .cpu_features = CPU_FTRS_750CL, 764 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 765 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 766 .icache_bsize = 32, 767 .dcache_bsize = 32, 768 .num_pmcs = 4, 769 .pmc_type = PPC_PMC_IBM, 770 .cpu_setup = __setup_cpu_750, 771 .machine_check = machine_check_generic, 772 .platform = "ppc750", 773 .oprofile_cpu_type = "ppc/750", 774 .oprofile_type = PPC_OPROFILE_G4, 775 }, 776 { /* 745/755 */ 777 .pvr_mask = 0xfffff000, 778 .pvr_value = 0x00083000, 779 .cpu_name = "745/755", 780 .cpu_features = CPU_FTRS_750, 781 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 782 .mmu_features = MMU_FTR_HPTE_TABLE, 783 .icache_bsize = 32, 784 .dcache_bsize = 32, 785 .num_pmcs = 4, 786 .pmc_type = PPC_PMC_IBM, 787 .cpu_setup = __setup_cpu_750, 788 .machine_check = machine_check_generic, 789 .platform = "ppc750", 790 }, 791 { /* 750FX rev 1.x */ 792 .pvr_mask = 0xffffff00, 793 .pvr_value = 0x70000100, 794 .cpu_name = "750FX", 795 .cpu_features = CPU_FTRS_750FX1, 796 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 797 .mmu_features = MMU_FTR_HPTE_TABLE, 798 .icache_bsize = 32, 799 .dcache_bsize = 32, 800 .num_pmcs = 4, 801 .pmc_type = PPC_PMC_IBM, 802 .cpu_setup = __setup_cpu_750, 803 .machine_check = machine_check_generic, 804 .platform = "ppc750", 805 .oprofile_cpu_type = "ppc/750", 806 .oprofile_type = PPC_OPROFILE_G4, 807 }, 808 { /* 750FX rev 2.0 must disable HID0[DPM] */ 809 .pvr_mask = 0xffffffff, 810 .pvr_value = 0x70000200, 811 .cpu_name = "750FX", 812 .cpu_features = CPU_FTRS_750FX2, 813 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 814 .mmu_features = MMU_FTR_HPTE_TABLE, 815 .icache_bsize = 32, 816 .dcache_bsize = 32, 817 .num_pmcs = 4, 818 .pmc_type = PPC_PMC_IBM, 819 .cpu_setup = __setup_cpu_750, 820 .machine_check = machine_check_generic, 821 .platform = "ppc750", 822 .oprofile_cpu_type = "ppc/750", 823 .oprofile_type = PPC_OPROFILE_G4, 824 }, 825 { /* 750FX (All revs except 2.0) */ 826 .pvr_mask = 0xffff0000, 827 .pvr_value = 0x70000000, 828 .cpu_name = "750FX", 829 .cpu_features = CPU_FTRS_750FX, 830 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 831 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 832 .icache_bsize = 32, 833 .dcache_bsize = 32, 834 .num_pmcs = 4, 835 .pmc_type = PPC_PMC_IBM, 836 .cpu_setup = __setup_cpu_750fx, 837 .machine_check = machine_check_generic, 838 .platform = "ppc750", 839 .oprofile_cpu_type = "ppc/750", 840 .oprofile_type = PPC_OPROFILE_G4, 841 }, 842 { /* 750GX */ 843 .pvr_mask = 0xffff0000, 844 .pvr_value = 0x70020000, 845 .cpu_name = "750GX", 846 .cpu_features = CPU_FTRS_750GX, 847 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 848 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 849 .icache_bsize = 32, 850 .dcache_bsize = 32, 851 .num_pmcs = 4, 852 .pmc_type = PPC_PMC_IBM, 853 .cpu_setup = __setup_cpu_750fx, 854 .machine_check = machine_check_generic, 855 .platform = "ppc750", 856 .oprofile_cpu_type = "ppc/750", 857 .oprofile_type = PPC_OPROFILE_G4, 858 }, 859 { /* 740/750 (L2CR bit need fixup for 740) */ 860 .pvr_mask = 0xffff0000, 861 .pvr_value = 0x00080000, 862 .cpu_name = "740/750", 863 .cpu_features = CPU_FTRS_740, 864 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 865 .mmu_features = MMU_FTR_HPTE_TABLE, 866 .icache_bsize = 32, 867 .dcache_bsize = 32, 868 .num_pmcs = 4, 869 .pmc_type = PPC_PMC_IBM, 870 .cpu_setup = __setup_cpu_750, 871 .machine_check = machine_check_generic, 872 .platform = "ppc750", 873 }, 874 { /* 7400 rev 1.1 ? (no TAU) */ 875 .pvr_mask = 0xffffffff, 876 .pvr_value = 0x000c1101, 877 .cpu_name = "7400 (1.1)", 878 .cpu_features = CPU_FTRS_7400_NOTAU, 879 .cpu_user_features = COMMON_USER | 880 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 881 .mmu_features = MMU_FTR_HPTE_TABLE, 882 .icache_bsize = 32, 883 .dcache_bsize = 32, 884 .num_pmcs = 4, 885 .pmc_type = PPC_PMC_G4, 886 .cpu_setup = __setup_cpu_7400, 887 .machine_check = machine_check_generic, 888 .platform = "ppc7400", 889 }, 890 { /* 7400 */ 891 .pvr_mask = 0xffff0000, 892 .pvr_value = 0x000c0000, 893 .cpu_name = "7400", 894 .cpu_features = CPU_FTRS_7400, 895 .cpu_user_features = COMMON_USER | 896 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 897 .mmu_features = MMU_FTR_HPTE_TABLE, 898 .icache_bsize = 32, 899 .dcache_bsize = 32, 900 .num_pmcs = 4, 901 .pmc_type = PPC_PMC_G4, 902 .cpu_setup = __setup_cpu_7400, 903 .machine_check = machine_check_generic, 904 .platform = "ppc7400", 905 }, 906 { /* 7410 */ 907 .pvr_mask = 0xffff0000, 908 .pvr_value = 0x800c0000, 909 .cpu_name = "7410", 910 .cpu_features = CPU_FTRS_7400, 911 .cpu_user_features = COMMON_USER | 912 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 913 .mmu_features = MMU_FTR_HPTE_TABLE, 914 .icache_bsize = 32, 915 .dcache_bsize = 32, 916 .num_pmcs = 4, 917 .pmc_type = PPC_PMC_G4, 918 .cpu_setup = __setup_cpu_7410, 919 .machine_check = machine_check_generic, 920 .platform = "ppc7400", 921 }, 922 { /* 7450 2.0 - no doze/nap */ 923 .pvr_mask = 0xffffffff, 924 .pvr_value = 0x80000200, 925 .cpu_name = "7450", 926 .cpu_features = CPU_FTRS_7450_20, 927 .cpu_user_features = COMMON_USER | 928 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 929 .mmu_features = MMU_FTR_HPTE_TABLE, 930 .icache_bsize = 32, 931 .dcache_bsize = 32, 932 .num_pmcs = 6, 933 .pmc_type = PPC_PMC_G4, 934 .cpu_setup = __setup_cpu_745x, 935 .oprofile_cpu_type = "ppc/7450", 936 .oprofile_type = PPC_OPROFILE_G4, 937 .machine_check = machine_check_generic, 938 .platform = "ppc7450", 939 }, 940 { /* 7450 2.1 */ 941 .pvr_mask = 0xffffffff, 942 .pvr_value = 0x80000201, 943 .cpu_name = "7450", 944 .cpu_features = CPU_FTRS_7450_21, 945 .cpu_user_features = COMMON_USER | 946 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 947 .mmu_features = MMU_FTR_HPTE_TABLE, 948 .icache_bsize = 32, 949 .dcache_bsize = 32, 950 .num_pmcs = 6, 951 .pmc_type = PPC_PMC_G4, 952 .cpu_setup = __setup_cpu_745x, 953 .oprofile_cpu_type = "ppc/7450", 954 .oprofile_type = PPC_OPROFILE_G4, 955 .machine_check = machine_check_generic, 956 .platform = "ppc7450", 957 }, 958 { /* 7450 2.3 and newer */ 959 .pvr_mask = 0xffff0000, 960 .pvr_value = 0x80000000, 961 .cpu_name = "7450", 962 .cpu_features = CPU_FTRS_7450_23, 963 .cpu_user_features = COMMON_USER | 964 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 965 .mmu_features = MMU_FTR_HPTE_TABLE, 966 .icache_bsize = 32, 967 .dcache_bsize = 32, 968 .num_pmcs = 6, 969 .pmc_type = PPC_PMC_G4, 970 .cpu_setup = __setup_cpu_745x, 971 .oprofile_cpu_type = "ppc/7450", 972 .oprofile_type = PPC_OPROFILE_G4, 973 .machine_check = machine_check_generic, 974 .platform = "ppc7450", 975 }, 976 { /* 7455 rev 1.x */ 977 .pvr_mask = 0xffffff00, 978 .pvr_value = 0x80010100, 979 .cpu_name = "7455", 980 .cpu_features = CPU_FTRS_7455_1, 981 .cpu_user_features = COMMON_USER | 982 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 983 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 984 .icache_bsize = 32, 985 .dcache_bsize = 32, 986 .num_pmcs = 6, 987 .pmc_type = PPC_PMC_G4, 988 .cpu_setup = __setup_cpu_745x, 989 .oprofile_cpu_type = "ppc/7450", 990 .oprofile_type = PPC_OPROFILE_G4, 991 .machine_check = machine_check_generic, 992 .platform = "ppc7450", 993 }, 994 { /* 7455 rev 2.0 */ 995 .pvr_mask = 0xffffffff, 996 .pvr_value = 0x80010200, 997 .cpu_name = "7455", 998 .cpu_features = CPU_FTRS_7455_20, 999 .cpu_user_features = COMMON_USER | 1000 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1001 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1002 .icache_bsize = 32, 1003 .dcache_bsize = 32, 1004 .num_pmcs = 6, 1005 .pmc_type = PPC_PMC_G4, 1006 .cpu_setup = __setup_cpu_745x, 1007 .oprofile_cpu_type = "ppc/7450", 1008 .oprofile_type = PPC_OPROFILE_G4, 1009 .machine_check = machine_check_generic, 1010 .platform = "ppc7450", 1011 }, 1012 { /* 7455 others */ 1013 .pvr_mask = 0xffff0000, 1014 .pvr_value = 0x80010000, 1015 .cpu_name = "7455", 1016 .cpu_features = CPU_FTRS_7455, 1017 .cpu_user_features = COMMON_USER | 1018 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1019 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1020 .icache_bsize = 32, 1021 .dcache_bsize = 32, 1022 .num_pmcs = 6, 1023 .pmc_type = PPC_PMC_G4, 1024 .cpu_setup = __setup_cpu_745x, 1025 .oprofile_cpu_type = "ppc/7450", 1026 .oprofile_type = PPC_OPROFILE_G4, 1027 .machine_check = machine_check_generic, 1028 .platform = "ppc7450", 1029 }, 1030 { /* 7447/7457 Rev 1.0 */ 1031 .pvr_mask = 0xffffffff, 1032 .pvr_value = 0x80020100, 1033 .cpu_name = "7447/7457", 1034 .cpu_features = CPU_FTRS_7447_10, 1035 .cpu_user_features = COMMON_USER | 1036 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1037 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1038 .icache_bsize = 32, 1039 .dcache_bsize = 32, 1040 .num_pmcs = 6, 1041 .pmc_type = PPC_PMC_G4, 1042 .cpu_setup = __setup_cpu_745x, 1043 .oprofile_cpu_type = "ppc/7450", 1044 .oprofile_type = PPC_OPROFILE_G4, 1045 .machine_check = machine_check_generic, 1046 .platform = "ppc7450", 1047 }, 1048 { /* 7447/7457 Rev 1.1 */ 1049 .pvr_mask = 0xffffffff, 1050 .pvr_value = 0x80020101, 1051 .cpu_name = "7447/7457", 1052 .cpu_features = CPU_FTRS_7447_10, 1053 .cpu_user_features = COMMON_USER | 1054 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1055 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1056 .icache_bsize = 32, 1057 .dcache_bsize = 32, 1058 .num_pmcs = 6, 1059 .pmc_type = PPC_PMC_G4, 1060 .cpu_setup = __setup_cpu_745x, 1061 .oprofile_cpu_type = "ppc/7450", 1062 .oprofile_type = PPC_OPROFILE_G4, 1063 .machine_check = machine_check_generic, 1064 .platform = "ppc7450", 1065 }, 1066 { /* 7447/7457 Rev 1.2 and later */ 1067 .pvr_mask = 0xffff0000, 1068 .pvr_value = 0x80020000, 1069 .cpu_name = "7447/7457", 1070 .cpu_features = CPU_FTRS_7447, 1071 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1072 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1073 .icache_bsize = 32, 1074 .dcache_bsize = 32, 1075 .num_pmcs = 6, 1076 .pmc_type = PPC_PMC_G4, 1077 .cpu_setup = __setup_cpu_745x, 1078 .oprofile_cpu_type = "ppc/7450", 1079 .oprofile_type = PPC_OPROFILE_G4, 1080 .machine_check = machine_check_generic, 1081 .platform = "ppc7450", 1082 }, 1083 { /* 7447A */ 1084 .pvr_mask = 0xffff0000, 1085 .pvr_value = 0x80030000, 1086 .cpu_name = "7447A", 1087 .cpu_features = CPU_FTRS_7447A, 1088 .cpu_user_features = COMMON_USER | 1089 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1090 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1091 .icache_bsize = 32, 1092 .dcache_bsize = 32, 1093 .num_pmcs = 6, 1094 .pmc_type = PPC_PMC_G4, 1095 .cpu_setup = __setup_cpu_745x, 1096 .oprofile_cpu_type = "ppc/7450", 1097 .oprofile_type = PPC_OPROFILE_G4, 1098 .machine_check = machine_check_generic, 1099 .platform = "ppc7450", 1100 }, 1101 { /* 7448 */ 1102 .pvr_mask = 0xffff0000, 1103 .pvr_value = 0x80040000, 1104 .cpu_name = "7448", 1105 .cpu_features = CPU_FTRS_7448, 1106 .cpu_user_features = COMMON_USER | 1107 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1108 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1109 .icache_bsize = 32, 1110 .dcache_bsize = 32, 1111 .num_pmcs = 6, 1112 .pmc_type = PPC_PMC_G4, 1113 .cpu_setup = __setup_cpu_745x, 1114 .oprofile_cpu_type = "ppc/7450", 1115 .oprofile_type = PPC_OPROFILE_G4, 1116 .machine_check = machine_check_generic, 1117 .platform = "ppc7450", 1118 }, 1119 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1120 .pvr_mask = 0x7fff0000, 1121 .pvr_value = 0x00810000, 1122 .cpu_name = "82xx", 1123 .cpu_features = CPU_FTRS_82XX, 1124 .cpu_user_features = COMMON_USER, 1125 .mmu_features = 0, 1126 .icache_bsize = 32, 1127 .dcache_bsize = 32, 1128 .cpu_setup = __setup_cpu_603, 1129 .machine_check = machine_check_generic, 1130 .platform = "ppc603", 1131 }, 1132 { /* All G2_LE (603e core, plus some) have the same pvr */ 1133 .pvr_mask = 0x7fff0000, 1134 .pvr_value = 0x00820000, 1135 .cpu_name = "G2_LE", 1136 .cpu_features = CPU_FTRS_G2_LE, 1137 .cpu_user_features = COMMON_USER, 1138 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1139 .icache_bsize = 32, 1140 .dcache_bsize = 32, 1141 .cpu_setup = __setup_cpu_603, 1142 .machine_check = machine_check_generic, 1143 .platform = "ppc603", 1144 }, 1145 { /* e300c1 (a 603e core, plus some) on 83xx */ 1146 .pvr_mask = 0x7fff0000, 1147 .pvr_value = 0x00830000, 1148 .cpu_name = "e300c1", 1149 .cpu_features = CPU_FTRS_E300, 1150 .cpu_user_features = COMMON_USER, 1151 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1152 .icache_bsize = 32, 1153 .dcache_bsize = 32, 1154 .cpu_setup = __setup_cpu_603, 1155 .machine_check = machine_check_generic, 1156 .platform = "ppc603", 1157 }, 1158 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1159 .pvr_mask = 0x7fff0000, 1160 .pvr_value = 0x00840000, 1161 .cpu_name = "e300c2", 1162 .cpu_features = CPU_FTRS_E300C2, 1163 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1164 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1165 MMU_FTR_NEED_DTLB_SW_LRU, 1166 .icache_bsize = 32, 1167 .dcache_bsize = 32, 1168 .cpu_setup = __setup_cpu_603, 1169 .machine_check = machine_check_generic, 1170 .platform = "ppc603", 1171 }, 1172 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1173 .pvr_mask = 0x7fff0000, 1174 .pvr_value = 0x00850000, 1175 .cpu_name = "e300c3", 1176 .cpu_features = CPU_FTRS_E300, 1177 .cpu_user_features = COMMON_USER, 1178 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1179 MMU_FTR_NEED_DTLB_SW_LRU, 1180 .icache_bsize = 32, 1181 .dcache_bsize = 32, 1182 .cpu_setup = __setup_cpu_603, 1183 .machine_check = machine_check_generic, 1184 .num_pmcs = 4, 1185 .oprofile_cpu_type = "ppc/e300", 1186 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1187 .platform = "ppc603", 1188 }, 1189 { /* e300c4 (e300c1, plus one IU) */ 1190 .pvr_mask = 0x7fff0000, 1191 .pvr_value = 0x00860000, 1192 .cpu_name = "e300c4", 1193 .cpu_features = CPU_FTRS_E300, 1194 .cpu_user_features = COMMON_USER, 1195 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1196 MMU_FTR_NEED_DTLB_SW_LRU, 1197 .icache_bsize = 32, 1198 .dcache_bsize = 32, 1199 .cpu_setup = __setup_cpu_603, 1200 .machine_check = machine_check_generic, 1201 .num_pmcs = 4, 1202 .oprofile_cpu_type = "ppc/e300", 1203 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1204 .platform = "ppc603", 1205 }, 1206 { /* default match, we assume split I/D cache & TB (non-601)... */ 1207 .pvr_mask = 0x00000000, 1208 .pvr_value = 0x00000000, 1209 .cpu_name = "(generic PPC)", 1210 .cpu_features = CPU_FTRS_CLASSIC32, 1211 .cpu_user_features = COMMON_USER, 1212 .mmu_features = MMU_FTR_HPTE_TABLE, 1213 .icache_bsize = 32, 1214 .dcache_bsize = 32, 1215 .machine_check = machine_check_generic, 1216 .platform = "ppc603", 1217 }, 1218 #endif /* CONFIG_PPC_BOOK3S_32 */ 1219 #ifdef CONFIG_8xx 1220 { /* 8xx */ 1221 .pvr_mask = 0xffff0000, 1222 .pvr_value = 0x00500000, 1223 .cpu_name = "8xx", 1224 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1225 * if the 8xx code is there.... */ 1226 .cpu_features = CPU_FTRS_8XX, 1227 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1228 .mmu_features = MMU_FTR_TYPE_8xx, 1229 .icache_bsize = 16, 1230 .dcache_bsize = 16, 1231 .platform = "ppc823", 1232 }, 1233 #endif /* CONFIG_8xx */ 1234 #ifdef CONFIG_40x 1235 { /* 403GC */ 1236 .pvr_mask = 0xffffff00, 1237 .pvr_value = 0x00200200, 1238 .cpu_name = "403GC", 1239 .cpu_features = CPU_FTRS_40X, 1240 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1241 .mmu_features = MMU_FTR_TYPE_40x, 1242 .icache_bsize = 16, 1243 .dcache_bsize = 16, 1244 .machine_check = machine_check_4xx, 1245 .platform = "ppc403", 1246 }, 1247 { /* 403GCX */ 1248 .pvr_mask = 0xffffff00, 1249 .pvr_value = 0x00201400, 1250 .cpu_name = "403GCX", 1251 .cpu_features = CPU_FTRS_40X, 1252 .cpu_user_features = PPC_FEATURE_32 | 1253 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1254 .mmu_features = MMU_FTR_TYPE_40x, 1255 .icache_bsize = 16, 1256 .dcache_bsize = 16, 1257 .machine_check = machine_check_4xx, 1258 .platform = "ppc403", 1259 }, 1260 { /* 403G ?? */ 1261 .pvr_mask = 0xffff0000, 1262 .pvr_value = 0x00200000, 1263 .cpu_name = "403G ??", 1264 .cpu_features = CPU_FTRS_40X, 1265 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1266 .mmu_features = MMU_FTR_TYPE_40x, 1267 .icache_bsize = 16, 1268 .dcache_bsize = 16, 1269 .machine_check = machine_check_4xx, 1270 .platform = "ppc403", 1271 }, 1272 { /* 405GP */ 1273 .pvr_mask = 0xffff0000, 1274 .pvr_value = 0x40110000, 1275 .cpu_name = "405GP", 1276 .cpu_features = CPU_FTRS_40X, 1277 .cpu_user_features = PPC_FEATURE_32 | 1278 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1279 .mmu_features = MMU_FTR_TYPE_40x, 1280 .icache_bsize = 32, 1281 .dcache_bsize = 32, 1282 .machine_check = machine_check_4xx, 1283 .platform = "ppc405", 1284 }, 1285 { /* STB 03xxx */ 1286 .pvr_mask = 0xffff0000, 1287 .pvr_value = 0x40130000, 1288 .cpu_name = "STB03xxx", 1289 .cpu_features = CPU_FTRS_40X, 1290 .cpu_user_features = PPC_FEATURE_32 | 1291 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1292 .mmu_features = MMU_FTR_TYPE_40x, 1293 .icache_bsize = 32, 1294 .dcache_bsize = 32, 1295 .machine_check = machine_check_4xx, 1296 .platform = "ppc405", 1297 }, 1298 { /* STB 04xxx */ 1299 .pvr_mask = 0xffff0000, 1300 .pvr_value = 0x41810000, 1301 .cpu_name = "STB04xxx", 1302 .cpu_features = CPU_FTRS_40X, 1303 .cpu_user_features = PPC_FEATURE_32 | 1304 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1305 .mmu_features = MMU_FTR_TYPE_40x, 1306 .icache_bsize = 32, 1307 .dcache_bsize = 32, 1308 .machine_check = machine_check_4xx, 1309 .platform = "ppc405", 1310 }, 1311 { /* NP405L */ 1312 .pvr_mask = 0xffff0000, 1313 .pvr_value = 0x41610000, 1314 .cpu_name = "NP405L", 1315 .cpu_features = CPU_FTRS_40X, 1316 .cpu_user_features = PPC_FEATURE_32 | 1317 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1318 .mmu_features = MMU_FTR_TYPE_40x, 1319 .icache_bsize = 32, 1320 .dcache_bsize = 32, 1321 .machine_check = machine_check_4xx, 1322 .platform = "ppc405", 1323 }, 1324 { /* NP4GS3 */ 1325 .pvr_mask = 0xffff0000, 1326 .pvr_value = 0x40B10000, 1327 .cpu_name = "NP4GS3", 1328 .cpu_features = CPU_FTRS_40X, 1329 .cpu_user_features = PPC_FEATURE_32 | 1330 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1331 .mmu_features = MMU_FTR_TYPE_40x, 1332 .icache_bsize = 32, 1333 .dcache_bsize = 32, 1334 .machine_check = machine_check_4xx, 1335 .platform = "ppc405", 1336 }, 1337 { /* NP405H */ 1338 .pvr_mask = 0xffff0000, 1339 .pvr_value = 0x41410000, 1340 .cpu_name = "NP405H", 1341 .cpu_features = CPU_FTRS_40X, 1342 .cpu_user_features = PPC_FEATURE_32 | 1343 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1344 .mmu_features = MMU_FTR_TYPE_40x, 1345 .icache_bsize = 32, 1346 .dcache_bsize = 32, 1347 .machine_check = machine_check_4xx, 1348 .platform = "ppc405", 1349 }, 1350 { /* 405GPr */ 1351 .pvr_mask = 0xffff0000, 1352 .pvr_value = 0x50910000, 1353 .cpu_name = "405GPr", 1354 .cpu_features = CPU_FTRS_40X, 1355 .cpu_user_features = PPC_FEATURE_32 | 1356 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1357 .mmu_features = MMU_FTR_TYPE_40x, 1358 .icache_bsize = 32, 1359 .dcache_bsize = 32, 1360 .machine_check = machine_check_4xx, 1361 .platform = "ppc405", 1362 }, 1363 { /* STBx25xx */ 1364 .pvr_mask = 0xffff0000, 1365 .pvr_value = 0x51510000, 1366 .cpu_name = "STBx25xx", 1367 .cpu_features = CPU_FTRS_40X, 1368 .cpu_user_features = PPC_FEATURE_32 | 1369 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1370 .mmu_features = MMU_FTR_TYPE_40x, 1371 .icache_bsize = 32, 1372 .dcache_bsize = 32, 1373 .machine_check = machine_check_4xx, 1374 .platform = "ppc405", 1375 }, 1376 { /* 405LP */ 1377 .pvr_mask = 0xffff0000, 1378 .pvr_value = 0x41F10000, 1379 .cpu_name = "405LP", 1380 .cpu_features = CPU_FTRS_40X, 1381 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1382 .mmu_features = MMU_FTR_TYPE_40x, 1383 .icache_bsize = 32, 1384 .dcache_bsize = 32, 1385 .machine_check = machine_check_4xx, 1386 .platform = "ppc405", 1387 }, 1388 { /* Xilinx Virtex-II Pro */ 1389 .pvr_mask = 0xfffff000, 1390 .pvr_value = 0x20010000, 1391 .cpu_name = "Virtex-II Pro", 1392 .cpu_features = CPU_FTRS_40X, 1393 .cpu_user_features = PPC_FEATURE_32 | 1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1395 .mmu_features = MMU_FTR_TYPE_40x, 1396 .icache_bsize = 32, 1397 .dcache_bsize = 32, 1398 .machine_check = machine_check_4xx, 1399 .platform = "ppc405", 1400 }, 1401 { /* Xilinx Virtex-4 FX */ 1402 .pvr_mask = 0xfffff000, 1403 .pvr_value = 0x20011000, 1404 .cpu_name = "Virtex-4 FX", 1405 .cpu_features = CPU_FTRS_40X, 1406 .cpu_user_features = PPC_FEATURE_32 | 1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1408 .mmu_features = MMU_FTR_TYPE_40x, 1409 .icache_bsize = 32, 1410 .dcache_bsize = 32, 1411 .machine_check = machine_check_4xx, 1412 .platform = "ppc405", 1413 }, 1414 { /* 405EP */ 1415 .pvr_mask = 0xffff0000, 1416 .pvr_value = 0x51210000, 1417 .cpu_name = "405EP", 1418 .cpu_features = CPU_FTRS_40X, 1419 .cpu_user_features = PPC_FEATURE_32 | 1420 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1421 .mmu_features = MMU_FTR_TYPE_40x, 1422 .icache_bsize = 32, 1423 .dcache_bsize = 32, 1424 .machine_check = machine_check_4xx, 1425 .platform = "ppc405", 1426 }, 1427 { /* 405EX Rev. A/B with Security */ 1428 .pvr_mask = 0xffff000f, 1429 .pvr_value = 0x12910007, 1430 .cpu_name = "405EX Rev. A/B", 1431 .cpu_features = CPU_FTRS_40X, 1432 .cpu_user_features = PPC_FEATURE_32 | 1433 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1434 .mmu_features = MMU_FTR_TYPE_40x, 1435 .icache_bsize = 32, 1436 .dcache_bsize = 32, 1437 .machine_check = machine_check_4xx, 1438 .platform = "ppc405", 1439 }, 1440 { /* 405EX Rev. C without Security */ 1441 .pvr_mask = 0xffff000f, 1442 .pvr_value = 0x1291000d, 1443 .cpu_name = "405EX Rev. C", 1444 .cpu_features = CPU_FTRS_40X, 1445 .cpu_user_features = PPC_FEATURE_32 | 1446 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1447 .mmu_features = MMU_FTR_TYPE_40x, 1448 .icache_bsize = 32, 1449 .dcache_bsize = 32, 1450 .machine_check = machine_check_4xx, 1451 .platform = "ppc405", 1452 }, 1453 { /* 405EX Rev. C with Security */ 1454 .pvr_mask = 0xffff000f, 1455 .pvr_value = 0x1291000f, 1456 .cpu_name = "405EX Rev. C", 1457 .cpu_features = CPU_FTRS_40X, 1458 .cpu_user_features = PPC_FEATURE_32 | 1459 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1460 .mmu_features = MMU_FTR_TYPE_40x, 1461 .icache_bsize = 32, 1462 .dcache_bsize = 32, 1463 .machine_check = machine_check_4xx, 1464 .platform = "ppc405", 1465 }, 1466 { /* 405EX Rev. D without Security */ 1467 .pvr_mask = 0xffff000f, 1468 .pvr_value = 0x12910003, 1469 .cpu_name = "405EX Rev. D", 1470 .cpu_features = CPU_FTRS_40X, 1471 .cpu_user_features = PPC_FEATURE_32 | 1472 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1473 .mmu_features = MMU_FTR_TYPE_40x, 1474 .icache_bsize = 32, 1475 .dcache_bsize = 32, 1476 .machine_check = machine_check_4xx, 1477 .platform = "ppc405", 1478 }, 1479 { /* 405EX Rev. D with Security */ 1480 .pvr_mask = 0xffff000f, 1481 .pvr_value = 0x12910005, 1482 .cpu_name = "405EX Rev. D", 1483 .cpu_features = CPU_FTRS_40X, 1484 .cpu_user_features = PPC_FEATURE_32 | 1485 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1486 .mmu_features = MMU_FTR_TYPE_40x, 1487 .icache_bsize = 32, 1488 .dcache_bsize = 32, 1489 .machine_check = machine_check_4xx, 1490 .platform = "ppc405", 1491 }, 1492 { /* 405EXr Rev. A/B without Security */ 1493 .pvr_mask = 0xffff000f, 1494 .pvr_value = 0x12910001, 1495 .cpu_name = "405EXr Rev. A/B", 1496 .cpu_features = CPU_FTRS_40X, 1497 .cpu_user_features = PPC_FEATURE_32 | 1498 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1499 .mmu_features = MMU_FTR_TYPE_40x, 1500 .icache_bsize = 32, 1501 .dcache_bsize = 32, 1502 .machine_check = machine_check_4xx, 1503 .platform = "ppc405", 1504 }, 1505 { /* 405EXr Rev. C without Security */ 1506 .pvr_mask = 0xffff000f, 1507 .pvr_value = 0x12910009, 1508 .cpu_name = "405EXr Rev. C", 1509 .cpu_features = CPU_FTRS_40X, 1510 .cpu_user_features = PPC_FEATURE_32 | 1511 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1512 .mmu_features = MMU_FTR_TYPE_40x, 1513 .icache_bsize = 32, 1514 .dcache_bsize = 32, 1515 .machine_check = machine_check_4xx, 1516 .platform = "ppc405", 1517 }, 1518 { /* 405EXr Rev. C with Security */ 1519 .pvr_mask = 0xffff000f, 1520 .pvr_value = 0x1291000b, 1521 .cpu_name = "405EXr Rev. C", 1522 .cpu_features = CPU_FTRS_40X, 1523 .cpu_user_features = PPC_FEATURE_32 | 1524 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1525 .mmu_features = MMU_FTR_TYPE_40x, 1526 .icache_bsize = 32, 1527 .dcache_bsize = 32, 1528 .machine_check = machine_check_4xx, 1529 .platform = "ppc405", 1530 }, 1531 { /* 405EXr Rev. D without Security */ 1532 .pvr_mask = 0xffff000f, 1533 .pvr_value = 0x12910000, 1534 .cpu_name = "405EXr Rev. D", 1535 .cpu_features = CPU_FTRS_40X, 1536 .cpu_user_features = PPC_FEATURE_32 | 1537 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1538 .mmu_features = MMU_FTR_TYPE_40x, 1539 .icache_bsize = 32, 1540 .dcache_bsize = 32, 1541 .machine_check = machine_check_4xx, 1542 .platform = "ppc405", 1543 }, 1544 { /* 405EXr Rev. D with Security */ 1545 .pvr_mask = 0xffff000f, 1546 .pvr_value = 0x12910002, 1547 .cpu_name = "405EXr Rev. D", 1548 .cpu_features = CPU_FTRS_40X, 1549 .cpu_user_features = PPC_FEATURE_32 | 1550 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1551 .mmu_features = MMU_FTR_TYPE_40x, 1552 .icache_bsize = 32, 1553 .dcache_bsize = 32, 1554 .machine_check = machine_check_4xx, 1555 .platform = "ppc405", 1556 }, 1557 { 1558 /* 405EZ */ 1559 .pvr_mask = 0xffff0000, 1560 .pvr_value = 0x41510000, 1561 .cpu_name = "405EZ", 1562 .cpu_features = CPU_FTRS_40X, 1563 .cpu_user_features = PPC_FEATURE_32 | 1564 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1565 .mmu_features = MMU_FTR_TYPE_40x, 1566 .icache_bsize = 32, 1567 .dcache_bsize = 32, 1568 .machine_check = machine_check_4xx, 1569 .platform = "ppc405", 1570 }, 1571 { /* APM8018X */ 1572 .pvr_mask = 0xffff0000, 1573 .pvr_value = 0x7ff11432, 1574 .cpu_name = "APM8018X", 1575 .cpu_features = CPU_FTRS_40X, 1576 .cpu_user_features = PPC_FEATURE_32 | 1577 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1578 .mmu_features = MMU_FTR_TYPE_40x, 1579 .icache_bsize = 32, 1580 .dcache_bsize = 32, 1581 .machine_check = machine_check_4xx, 1582 .platform = "ppc405", 1583 }, 1584 { /* default match */ 1585 .pvr_mask = 0x00000000, 1586 .pvr_value = 0x00000000, 1587 .cpu_name = "(generic 40x PPC)", 1588 .cpu_features = CPU_FTRS_40X, 1589 .cpu_user_features = PPC_FEATURE_32 | 1590 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1591 .mmu_features = MMU_FTR_TYPE_40x, 1592 .icache_bsize = 32, 1593 .dcache_bsize = 32, 1594 .machine_check = machine_check_4xx, 1595 .platform = "ppc405", 1596 } 1597 1598 #endif /* CONFIG_40x */ 1599 #ifdef CONFIG_44x 1600 { 1601 .pvr_mask = 0xf0000fff, 1602 .pvr_value = 0x40000850, 1603 .cpu_name = "440GR Rev. A", 1604 .cpu_features = CPU_FTRS_44X, 1605 .cpu_user_features = COMMON_USER_BOOKE, 1606 .mmu_features = MMU_FTR_TYPE_44x, 1607 .icache_bsize = 32, 1608 .dcache_bsize = 32, 1609 .machine_check = machine_check_4xx, 1610 .platform = "ppc440", 1611 }, 1612 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1613 .pvr_mask = 0xf0000fff, 1614 .pvr_value = 0x40000858, 1615 .cpu_name = "440EP Rev. A", 1616 .cpu_features = CPU_FTRS_44X, 1617 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1618 .mmu_features = MMU_FTR_TYPE_44x, 1619 .icache_bsize = 32, 1620 .dcache_bsize = 32, 1621 .cpu_setup = __setup_cpu_440ep, 1622 .machine_check = machine_check_4xx, 1623 .platform = "ppc440", 1624 }, 1625 { 1626 .pvr_mask = 0xf0000fff, 1627 .pvr_value = 0x400008d3, 1628 .cpu_name = "440GR Rev. B", 1629 .cpu_features = CPU_FTRS_44X, 1630 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1631 .mmu_features = MMU_FTR_TYPE_44x, 1632 .icache_bsize = 32, 1633 .dcache_bsize = 32, 1634 .machine_check = machine_check_4xx, 1635 .platform = "ppc440", 1636 }, 1637 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1638 .pvr_mask = 0xf0000ff7, 1639 .pvr_value = 0x400008d4, 1640 .cpu_name = "440EP Rev. C", 1641 .cpu_features = CPU_FTRS_44X, 1642 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1643 .mmu_features = MMU_FTR_TYPE_44x, 1644 .icache_bsize = 32, 1645 .dcache_bsize = 32, 1646 .cpu_setup = __setup_cpu_440ep, 1647 .machine_check = machine_check_4xx, 1648 .platform = "ppc440", 1649 }, 1650 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1651 .pvr_mask = 0xf0000fff, 1652 .pvr_value = 0x400008db, 1653 .cpu_name = "440EP Rev. B", 1654 .cpu_features = CPU_FTRS_44X, 1655 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1656 .mmu_features = MMU_FTR_TYPE_44x, 1657 .icache_bsize = 32, 1658 .dcache_bsize = 32, 1659 .cpu_setup = __setup_cpu_440ep, 1660 .machine_check = machine_check_4xx, 1661 .platform = "ppc440", 1662 }, 1663 { /* 440GRX */ 1664 .pvr_mask = 0xf0000ffb, 1665 .pvr_value = 0x200008D0, 1666 .cpu_name = "440GRX", 1667 .cpu_features = CPU_FTRS_44X, 1668 .cpu_user_features = COMMON_USER_BOOKE, 1669 .mmu_features = MMU_FTR_TYPE_44x, 1670 .icache_bsize = 32, 1671 .dcache_bsize = 32, 1672 .cpu_setup = __setup_cpu_440grx, 1673 .machine_check = machine_check_440A, 1674 .platform = "ppc440", 1675 }, 1676 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1677 .pvr_mask = 0xf0000ffb, 1678 .pvr_value = 0x200008D8, 1679 .cpu_name = "440EPX", 1680 .cpu_features = CPU_FTRS_44X, 1681 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1682 .mmu_features = MMU_FTR_TYPE_44x, 1683 .icache_bsize = 32, 1684 .dcache_bsize = 32, 1685 .cpu_setup = __setup_cpu_440epx, 1686 .machine_check = machine_check_440A, 1687 .platform = "ppc440", 1688 }, 1689 { /* 440GP Rev. B */ 1690 .pvr_mask = 0xf0000fff, 1691 .pvr_value = 0x40000440, 1692 .cpu_name = "440GP Rev. B", 1693 .cpu_features = CPU_FTRS_44X, 1694 .cpu_user_features = COMMON_USER_BOOKE, 1695 .mmu_features = MMU_FTR_TYPE_44x, 1696 .icache_bsize = 32, 1697 .dcache_bsize = 32, 1698 .machine_check = machine_check_4xx, 1699 .platform = "ppc440gp", 1700 }, 1701 { /* 440GP Rev. C */ 1702 .pvr_mask = 0xf0000fff, 1703 .pvr_value = 0x40000481, 1704 .cpu_name = "440GP Rev. C", 1705 .cpu_features = CPU_FTRS_44X, 1706 .cpu_user_features = COMMON_USER_BOOKE, 1707 .mmu_features = MMU_FTR_TYPE_44x, 1708 .icache_bsize = 32, 1709 .dcache_bsize = 32, 1710 .machine_check = machine_check_4xx, 1711 .platform = "ppc440gp", 1712 }, 1713 { /* 440GX Rev. A */ 1714 .pvr_mask = 0xf0000fff, 1715 .pvr_value = 0x50000850, 1716 .cpu_name = "440GX Rev. A", 1717 .cpu_features = CPU_FTRS_44X, 1718 .cpu_user_features = COMMON_USER_BOOKE, 1719 .mmu_features = MMU_FTR_TYPE_44x, 1720 .icache_bsize = 32, 1721 .dcache_bsize = 32, 1722 .cpu_setup = __setup_cpu_440gx, 1723 .machine_check = machine_check_440A, 1724 .platform = "ppc440", 1725 }, 1726 { /* 440GX Rev. B */ 1727 .pvr_mask = 0xf0000fff, 1728 .pvr_value = 0x50000851, 1729 .cpu_name = "440GX Rev. B", 1730 .cpu_features = CPU_FTRS_44X, 1731 .cpu_user_features = COMMON_USER_BOOKE, 1732 .mmu_features = MMU_FTR_TYPE_44x, 1733 .icache_bsize = 32, 1734 .dcache_bsize = 32, 1735 .cpu_setup = __setup_cpu_440gx, 1736 .machine_check = machine_check_440A, 1737 .platform = "ppc440", 1738 }, 1739 { /* 440GX Rev. C */ 1740 .pvr_mask = 0xf0000fff, 1741 .pvr_value = 0x50000892, 1742 .cpu_name = "440GX Rev. C", 1743 .cpu_features = CPU_FTRS_44X, 1744 .cpu_user_features = COMMON_USER_BOOKE, 1745 .mmu_features = MMU_FTR_TYPE_44x, 1746 .icache_bsize = 32, 1747 .dcache_bsize = 32, 1748 .cpu_setup = __setup_cpu_440gx, 1749 .machine_check = machine_check_440A, 1750 .platform = "ppc440", 1751 }, 1752 { /* 440GX Rev. F */ 1753 .pvr_mask = 0xf0000fff, 1754 .pvr_value = 0x50000894, 1755 .cpu_name = "440GX Rev. F", 1756 .cpu_features = CPU_FTRS_44X, 1757 .cpu_user_features = COMMON_USER_BOOKE, 1758 .mmu_features = MMU_FTR_TYPE_44x, 1759 .icache_bsize = 32, 1760 .dcache_bsize = 32, 1761 .cpu_setup = __setup_cpu_440gx, 1762 .machine_check = machine_check_440A, 1763 .platform = "ppc440", 1764 }, 1765 { /* 440SP Rev. A */ 1766 .pvr_mask = 0xfff00fff, 1767 .pvr_value = 0x53200891, 1768 .cpu_name = "440SP Rev. A", 1769 .cpu_features = CPU_FTRS_44X, 1770 .cpu_user_features = COMMON_USER_BOOKE, 1771 .mmu_features = MMU_FTR_TYPE_44x, 1772 .icache_bsize = 32, 1773 .dcache_bsize = 32, 1774 .machine_check = machine_check_4xx, 1775 .platform = "ppc440", 1776 }, 1777 { /* 440SPe Rev. A */ 1778 .pvr_mask = 0xfff00fff, 1779 .pvr_value = 0x53400890, 1780 .cpu_name = "440SPe Rev. A", 1781 .cpu_features = CPU_FTRS_44X, 1782 .cpu_user_features = COMMON_USER_BOOKE, 1783 .mmu_features = MMU_FTR_TYPE_44x, 1784 .icache_bsize = 32, 1785 .dcache_bsize = 32, 1786 .cpu_setup = __setup_cpu_440spe, 1787 .machine_check = machine_check_440A, 1788 .platform = "ppc440", 1789 }, 1790 { /* 440SPe Rev. B */ 1791 .pvr_mask = 0xfff00fff, 1792 .pvr_value = 0x53400891, 1793 .cpu_name = "440SPe Rev. B", 1794 .cpu_features = CPU_FTRS_44X, 1795 .cpu_user_features = COMMON_USER_BOOKE, 1796 .mmu_features = MMU_FTR_TYPE_44x, 1797 .icache_bsize = 32, 1798 .dcache_bsize = 32, 1799 .cpu_setup = __setup_cpu_440spe, 1800 .machine_check = machine_check_440A, 1801 .platform = "ppc440", 1802 }, 1803 { /* 440 in Xilinx Virtex-5 FXT */ 1804 .pvr_mask = 0xfffffff0, 1805 .pvr_value = 0x7ff21910, 1806 .cpu_name = "440 in Virtex-5 FXT", 1807 .cpu_features = CPU_FTRS_44X, 1808 .cpu_user_features = COMMON_USER_BOOKE, 1809 .mmu_features = MMU_FTR_TYPE_44x, 1810 .icache_bsize = 32, 1811 .dcache_bsize = 32, 1812 .cpu_setup = __setup_cpu_440x5, 1813 .machine_check = machine_check_440A, 1814 .platform = "ppc440", 1815 }, 1816 { /* 460EX */ 1817 .pvr_mask = 0xffff0006, 1818 .pvr_value = 0x13020002, 1819 .cpu_name = "460EX", 1820 .cpu_features = CPU_FTRS_440x6, 1821 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1822 .mmu_features = MMU_FTR_TYPE_44x, 1823 .icache_bsize = 32, 1824 .dcache_bsize = 32, 1825 .cpu_setup = __setup_cpu_460ex, 1826 .machine_check = machine_check_440A, 1827 .platform = "ppc440", 1828 }, 1829 { /* 460EX Rev B */ 1830 .pvr_mask = 0xffff0007, 1831 .pvr_value = 0x13020004, 1832 .cpu_name = "460EX Rev. B", 1833 .cpu_features = CPU_FTRS_440x6, 1834 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1835 .mmu_features = MMU_FTR_TYPE_44x, 1836 .icache_bsize = 32, 1837 .dcache_bsize = 32, 1838 .cpu_setup = __setup_cpu_460ex, 1839 .machine_check = machine_check_440A, 1840 .platform = "ppc440", 1841 }, 1842 { /* 460GT */ 1843 .pvr_mask = 0xffff0006, 1844 .pvr_value = 0x13020000, 1845 .cpu_name = "460GT", 1846 .cpu_features = CPU_FTRS_440x6, 1847 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1848 .mmu_features = MMU_FTR_TYPE_44x, 1849 .icache_bsize = 32, 1850 .dcache_bsize = 32, 1851 .cpu_setup = __setup_cpu_460gt, 1852 .machine_check = machine_check_440A, 1853 .platform = "ppc440", 1854 }, 1855 { /* 460GT Rev B */ 1856 .pvr_mask = 0xffff0007, 1857 .pvr_value = 0x13020005, 1858 .cpu_name = "460GT Rev. B", 1859 .cpu_features = CPU_FTRS_440x6, 1860 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1861 .mmu_features = MMU_FTR_TYPE_44x, 1862 .icache_bsize = 32, 1863 .dcache_bsize = 32, 1864 .cpu_setup = __setup_cpu_460gt, 1865 .machine_check = machine_check_440A, 1866 .platform = "ppc440", 1867 }, 1868 { /* 460SX */ 1869 .pvr_mask = 0xffffff00, 1870 .pvr_value = 0x13541800, 1871 .cpu_name = "460SX", 1872 .cpu_features = CPU_FTRS_44X, 1873 .cpu_user_features = COMMON_USER_BOOKE, 1874 .mmu_features = MMU_FTR_TYPE_44x, 1875 .icache_bsize = 32, 1876 .dcache_bsize = 32, 1877 .cpu_setup = __setup_cpu_460sx, 1878 .machine_check = machine_check_440A, 1879 .platform = "ppc440", 1880 }, 1881 { /* 464 in APM821xx */ 1882 .pvr_mask = 0xfffffff0, 1883 .pvr_value = 0x12C41C80, 1884 .cpu_name = "APM821XX", 1885 .cpu_features = CPU_FTRS_44X, 1886 .cpu_user_features = COMMON_USER_BOOKE | 1887 PPC_FEATURE_HAS_FPU, 1888 .mmu_features = MMU_FTR_TYPE_44x, 1889 .icache_bsize = 32, 1890 .dcache_bsize = 32, 1891 .cpu_setup = __setup_cpu_apm821xx, 1892 .machine_check = machine_check_440A, 1893 .platform = "ppc440", 1894 }, 1895 { /* 476 DD2 core */ 1896 .pvr_mask = 0xffffffff, 1897 .pvr_value = 0x11a52080, 1898 .cpu_name = "476", 1899 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1900 .cpu_user_features = COMMON_USER_BOOKE | 1901 PPC_FEATURE_HAS_FPU, 1902 .mmu_features = MMU_FTR_TYPE_47x | 1903 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1904 .icache_bsize = 32, 1905 .dcache_bsize = 128, 1906 .machine_check = machine_check_47x, 1907 .platform = "ppc470", 1908 }, 1909 { /* 476fpe */ 1910 .pvr_mask = 0xffff0000, 1911 .pvr_value = 0x7ff50000, 1912 .cpu_name = "476fpe", 1913 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1914 .cpu_user_features = COMMON_USER_BOOKE | 1915 PPC_FEATURE_HAS_FPU, 1916 .mmu_features = MMU_FTR_TYPE_47x | 1917 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1918 .icache_bsize = 32, 1919 .dcache_bsize = 128, 1920 .machine_check = machine_check_47x, 1921 .platform = "ppc470", 1922 }, 1923 { /* 476 iss */ 1924 .pvr_mask = 0xffff0000, 1925 .pvr_value = 0x00050000, 1926 .cpu_name = "476", 1927 .cpu_features = CPU_FTRS_47X, 1928 .cpu_user_features = COMMON_USER_BOOKE | 1929 PPC_FEATURE_HAS_FPU, 1930 .mmu_features = MMU_FTR_TYPE_47x | 1931 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1932 .icache_bsize = 32, 1933 .dcache_bsize = 128, 1934 .machine_check = machine_check_47x, 1935 .platform = "ppc470", 1936 }, 1937 { /* 476 others */ 1938 .pvr_mask = 0xffff0000, 1939 .pvr_value = 0x11a50000, 1940 .cpu_name = "476", 1941 .cpu_features = CPU_FTRS_47X, 1942 .cpu_user_features = COMMON_USER_BOOKE | 1943 PPC_FEATURE_HAS_FPU, 1944 .mmu_features = MMU_FTR_TYPE_47x | 1945 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1946 .icache_bsize = 32, 1947 .dcache_bsize = 128, 1948 .machine_check = machine_check_47x, 1949 .platform = "ppc470", 1950 }, 1951 { /* default match */ 1952 .pvr_mask = 0x00000000, 1953 .pvr_value = 0x00000000, 1954 .cpu_name = "(generic 44x PPC)", 1955 .cpu_features = CPU_FTRS_44X, 1956 .cpu_user_features = COMMON_USER_BOOKE, 1957 .mmu_features = MMU_FTR_TYPE_44x, 1958 .icache_bsize = 32, 1959 .dcache_bsize = 32, 1960 .machine_check = machine_check_4xx, 1961 .platform = "ppc440", 1962 } 1963 #endif /* CONFIG_44x */ 1964 #ifdef CONFIG_E200 1965 { /* e200z5 */ 1966 .pvr_mask = 0xfff00000, 1967 .pvr_value = 0x81000000, 1968 .cpu_name = "e200z5", 1969 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1970 .cpu_features = CPU_FTRS_E200, 1971 .cpu_user_features = COMMON_USER_BOOKE | 1972 PPC_FEATURE_HAS_EFP_SINGLE | 1973 PPC_FEATURE_UNIFIED_CACHE, 1974 .mmu_features = MMU_FTR_TYPE_FSL_E, 1975 .dcache_bsize = 32, 1976 .machine_check = machine_check_e200, 1977 .platform = "ppc5554", 1978 }, 1979 { /* e200z6 */ 1980 .pvr_mask = 0xfff00000, 1981 .pvr_value = 0x81100000, 1982 .cpu_name = "e200z6", 1983 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1984 .cpu_features = CPU_FTRS_E200, 1985 .cpu_user_features = COMMON_USER_BOOKE | 1986 PPC_FEATURE_HAS_SPE_COMP | 1987 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1988 PPC_FEATURE_UNIFIED_CACHE, 1989 .mmu_features = MMU_FTR_TYPE_FSL_E, 1990 .dcache_bsize = 32, 1991 .machine_check = machine_check_e200, 1992 .platform = "ppc5554", 1993 }, 1994 { /* default match */ 1995 .pvr_mask = 0x00000000, 1996 .pvr_value = 0x00000000, 1997 .cpu_name = "(generic E200 PPC)", 1998 .cpu_features = CPU_FTRS_E200, 1999 .cpu_user_features = COMMON_USER_BOOKE | 2000 PPC_FEATURE_HAS_EFP_SINGLE | 2001 PPC_FEATURE_UNIFIED_CACHE, 2002 .mmu_features = MMU_FTR_TYPE_FSL_E, 2003 .dcache_bsize = 32, 2004 .cpu_setup = __setup_cpu_e200, 2005 .machine_check = machine_check_e200, 2006 .platform = "ppc5554", 2007 } 2008 #endif /* CONFIG_E200 */ 2009 #endif /* CONFIG_PPC32 */ 2010 #ifdef CONFIG_E500 2011 #ifdef CONFIG_PPC32 2012 #ifndef CONFIG_PPC_E500MC 2013 { /* e500 */ 2014 .pvr_mask = 0xffff0000, 2015 .pvr_value = 0x80200000, 2016 .cpu_name = "e500", 2017 .cpu_features = CPU_FTRS_E500, 2018 .cpu_user_features = COMMON_USER_BOOKE | 2019 PPC_FEATURE_HAS_SPE_COMP | 2020 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2021 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2022 .mmu_features = MMU_FTR_TYPE_FSL_E, 2023 .icache_bsize = 32, 2024 .dcache_bsize = 32, 2025 .num_pmcs = 4, 2026 .oprofile_cpu_type = "ppc/e500", 2027 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2028 .cpu_setup = __setup_cpu_e500v1, 2029 .machine_check = machine_check_e500, 2030 .platform = "ppc8540", 2031 }, 2032 { /* e500v2 */ 2033 .pvr_mask = 0xffff0000, 2034 .pvr_value = 0x80210000, 2035 .cpu_name = "e500v2", 2036 .cpu_features = CPU_FTRS_E500_2, 2037 .cpu_user_features = COMMON_USER_BOOKE | 2038 PPC_FEATURE_HAS_SPE_COMP | 2039 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2040 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2041 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2042 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2043 .icache_bsize = 32, 2044 .dcache_bsize = 32, 2045 .num_pmcs = 4, 2046 .oprofile_cpu_type = "ppc/e500", 2047 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2048 .cpu_setup = __setup_cpu_e500v2, 2049 .machine_check = machine_check_e500, 2050 .platform = "ppc8548", 2051 .cpu_down_flush = cpu_down_flush_e500v2, 2052 }, 2053 #else 2054 { /* e500mc */ 2055 .pvr_mask = 0xffff0000, 2056 .pvr_value = 0x80230000, 2057 .cpu_name = "e500mc", 2058 .cpu_features = CPU_FTRS_E500MC, 2059 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2060 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2061 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2062 MMU_FTR_USE_TLBILX, 2063 .icache_bsize = 64, 2064 .dcache_bsize = 64, 2065 .num_pmcs = 4, 2066 .oprofile_cpu_type = "ppc/e500mc", 2067 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2068 .cpu_setup = __setup_cpu_e500mc, 2069 .machine_check = machine_check_e500mc, 2070 .platform = "ppce500mc", 2071 .cpu_down_flush = cpu_down_flush_e500mc, 2072 }, 2073 #endif /* CONFIG_PPC_E500MC */ 2074 #endif /* CONFIG_PPC32 */ 2075 #ifdef CONFIG_PPC_E500MC 2076 { /* e5500 */ 2077 .pvr_mask = 0xffff0000, 2078 .pvr_value = 0x80240000, 2079 .cpu_name = "e5500", 2080 .cpu_features = CPU_FTRS_E5500, 2081 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2082 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2083 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2084 MMU_FTR_USE_TLBILX, 2085 .icache_bsize = 64, 2086 .dcache_bsize = 64, 2087 .num_pmcs = 4, 2088 .oprofile_cpu_type = "ppc/e500mc", 2089 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2090 .cpu_setup = __setup_cpu_e5500, 2091 #ifndef CONFIG_PPC32 2092 .cpu_restore = __restore_cpu_e5500, 2093 #endif 2094 .machine_check = machine_check_e500mc, 2095 .platform = "ppce5500", 2096 .cpu_down_flush = cpu_down_flush_e5500, 2097 }, 2098 { /* e6500 */ 2099 .pvr_mask = 0xffff0000, 2100 .pvr_value = 0x80400000, 2101 .cpu_name = "e6500", 2102 .cpu_features = CPU_FTRS_E6500, 2103 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2104 PPC_FEATURE_HAS_ALTIVEC_COMP, 2105 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2106 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2107 MMU_FTR_USE_TLBILX, 2108 .icache_bsize = 64, 2109 .dcache_bsize = 64, 2110 .num_pmcs = 6, 2111 .oprofile_cpu_type = "ppc/e6500", 2112 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2113 .cpu_setup = __setup_cpu_e6500, 2114 #ifndef CONFIG_PPC32 2115 .cpu_restore = __restore_cpu_e6500, 2116 #endif 2117 .machine_check = machine_check_e500mc, 2118 .platform = "ppce6500", 2119 .cpu_down_flush = cpu_down_flush_e6500, 2120 }, 2121 #endif /* CONFIG_PPC_E500MC */ 2122 #ifdef CONFIG_PPC32 2123 { /* default match */ 2124 .pvr_mask = 0x00000000, 2125 .pvr_value = 0x00000000, 2126 .cpu_name = "(generic E500 PPC)", 2127 .cpu_features = CPU_FTRS_E500, 2128 .cpu_user_features = COMMON_USER_BOOKE | 2129 PPC_FEATURE_HAS_SPE_COMP | 2130 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2131 .mmu_features = MMU_FTR_TYPE_FSL_E, 2132 .icache_bsize = 32, 2133 .dcache_bsize = 32, 2134 .machine_check = machine_check_e500, 2135 .platform = "powerpc", 2136 } 2137 #endif /* CONFIG_PPC32 */ 2138 #endif /* CONFIG_E500 */ 2139 }; 2140 2141 static struct cpu_spec the_cpu_spec; 2142 2143 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2144 struct cpu_spec *s) 2145 { 2146 struct cpu_spec *t = &the_cpu_spec; 2147 struct cpu_spec old; 2148 2149 t = PTRRELOC(t); 2150 old = *t; 2151 2152 /* Copy everything, then do fixups */ 2153 *t = *s; 2154 2155 /* 2156 * If we are overriding a previous value derived from the real 2157 * PVR with a new value obtained using a logical PVR value, 2158 * don't modify the performance monitor fields. 2159 */ 2160 if (old.num_pmcs && !s->num_pmcs) { 2161 t->num_pmcs = old.num_pmcs; 2162 t->pmc_type = old.pmc_type; 2163 t->oprofile_type = old.oprofile_type; 2164 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2165 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2166 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2167 2168 /* 2169 * If we have passed through this logic once before and 2170 * have pulled the default case because the real PVR was 2171 * not found inside cpu_specs[], then we are possibly 2172 * running in compatibility mode. In that case, let the 2173 * oprofiler know which set of compatibility counters to 2174 * pull from by making sure the oprofile_cpu_type string 2175 * is set to that of compatibility mode. If the 2176 * oprofile_cpu_type already has a value, then we are 2177 * possibly overriding a real PVR with a logical one, 2178 * and, in that case, keep the current value for 2179 * oprofile_cpu_type. 2180 */ 2181 if (old.oprofile_cpu_type != NULL) { 2182 t->oprofile_cpu_type = old.oprofile_cpu_type; 2183 t->oprofile_type = old.oprofile_type; 2184 } 2185 } 2186 2187 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2188 2189 /* 2190 * Set the base platform string once; assumes 2191 * we're called with real pvr first. 2192 */ 2193 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2194 *PTRRELOC(&powerpc_base_platform) = t->platform; 2195 2196 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2197 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2198 * that processor. I will consolidate that at a later time, for now, 2199 * just use #ifdef. We also don't need to PTRRELOC the function 2200 * pointer on ppc64 and booke as we are running at 0 in real mode 2201 * on ppc64 and reloc_offset is always 0 on booke. 2202 */ 2203 if (t->cpu_setup) { 2204 t->cpu_setup(offset, t); 2205 } 2206 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2207 2208 return t; 2209 } 2210 2211 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2212 { 2213 struct cpu_spec *s = cpu_specs; 2214 int i; 2215 2216 s = PTRRELOC(s); 2217 2218 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2219 if ((pvr & s->pvr_mask) == s->pvr_value) 2220 return setup_cpu_spec(offset, s); 2221 } 2222 2223 BUG(); 2224 2225 return NULL; 2226 } 2227