1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 /* NOTE: 10 * Unlike ppc32, ppc64 will only call cpu_setup() for the boot CPU, it's 11 * the responsibility of the appropriate CPU save/restore functions to 12 * eventually copy these settings over. Those save/restore aren't yet 13 * part of the cputable though. That has to be fixed for both ppc32 14 * and ppc64 15 */ 16 #define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 17 PPC_FEATURE_HAS_MMU | PPC_FEATURE_64) 18 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 19 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 20 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 21 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 22 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 23 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 24 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 25 PPC_FEATURE_TRUE_LE | \ 26 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 27 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 28 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 29 PPC_FEATURE_TRUE_LE | \ 30 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 31 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 32 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 33 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 34 PPC_FEATURE_TRUE_LE | \ 35 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 36 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 37 PPC_FEATURE2_HTM_COMP | \ 38 PPC_FEATURE2_HTM_NOSC_COMP | \ 39 PPC_FEATURE2_DSCR | \ 40 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 41 PPC_FEATURE2_VEC_CRYPTO) 42 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 43 PPC_FEATURE_TRUE_LE | \ 44 PPC_FEATURE_HAS_ALTIVEC_COMP) 45 #define COMMON_USER_POWER9 COMMON_USER_POWER8 46 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 47 PPC_FEATURE2_ARCH_3_00 | \ 48 PPC_FEATURE2_HAS_IEEE128 | \ 49 PPC_FEATURE2_DARN | \ 50 PPC_FEATURE2_SCV) 51 #define COMMON_USER_POWER10 COMMON_USER_POWER9 52 #define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 53 PPC_FEATURE2_MMA | \ 54 PPC_FEATURE2_ARCH_3_00 | \ 55 PPC_FEATURE2_HAS_IEEE128 | \ 56 PPC_FEATURE2_DARN | \ 57 PPC_FEATURE2_SCV | \ 58 PPC_FEATURE2_ARCH_2_07 | \ 59 PPC_FEATURE2_DSCR | \ 60 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 61 PPC_FEATURE2_VEC_CRYPTO) 62 63 #define COMMON_USER_POWER11 COMMON_USER_POWER10 64 #define COMMON_USER2_POWER11 COMMON_USER2_POWER10 65 66 static struct cpu_spec cpu_specs[] __initdata = { 67 { /* PPC970 */ 68 .pvr_mask = 0xffff0000, 69 .pvr_value = 0x00390000, 70 .cpu_name = "PPC970", 71 .cpu_features = CPU_FTRS_PPC970, 72 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 73 .mmu_features = MMU_FTRS_PPC970, 74 .icache_bsize = 128, 75 .dcache_bsize = 128, 76 .num_pmcs = 8, 77 .pmc_type = PPC_PMC_IBM, 78 .cpu_setup = __setup_cpu_ppc970, 79 .cpu_restore = __restore_cpu_ppc970, 80 .platform = "ppc970", 81 }, 82 { /* PPC970FX */ 83 .pvr_mask = 0xffff0000, 84 .pvr_value = 0x003c0000, 85 .cpu_name = "PPC970FX", 86 .cpu_features = CPU_FTRS_PPC970, 87 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 88 .mmu_features = MMU_FTRS_PPC970, 89 .icache_bsize = 128, 90 .dcache_bsize = 128, 91 .num_pmcs = 8, 92 .pmc_type = PPC_PMC_IBM, 93 .cpu_setup = __setup_cpu_ppc970, 94 .cpu_restore = __restore_cpu_ppc970, 95 .platform = "ppc970", 96 }, 97 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 98 .pvr_mask = 0xffffffff, 99 .pvr_value = 0x00440100, 100 .cpu_name = "PPC970MP", 101 .cpu_features = CPU_FTRS_PPC970, 102 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 103 .mmu_features = MMU_FTRS_PPC970, 104 .icache_bsize = 128, 105 .dcache_bsize = 128, 106 .num_pmcs = 8, 107 .pmc_type = PPC_PMC_IBM, 108 .cpu_setup = __setup_cpu_ppc970, 109 .cpu_restore = __restore_cpu_ppc970, 110 .platform = "ppc970", 111 }, 112 { /* PPC970MP */ 113 .pvr_mask = 0xffff0000, 114 .pvr_value = 0x00440000, 115 .cpu_name = "PPC970MP", 116 .cpu_features = CPU_FTRS_PPC970, 117 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 118 .mmu_features = MMU_FTRS_PPC970, 119 .icache_bsize = 128, 120 .dcache_bsize = 128, 121 .num_pmcs = 8, 122 .pmc_type = PPC_PMC_IBM, 123 .cpu_setup = __setup_cpu_ppc970MP, 124 .cpu_restore = __restore_cpu_ppc970, 125 .platform = "ppc970", 126 }, 127 { /* PPC970GX */ 128 .pvr_mask = 0xffff0000, 129 .pvr_value = 0x00450000, 130 .cpu_name = "PPC970GX", 131 .cpu_features = CPU_FTRS_PPC970, 132 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 133 .mmu_features = MMU_FTRS_PPC970, 134 .icache_bsize = 128, 135 .dcache_bsize = 128, 136 .num_pmcs = 8, 137 .pmc_type = PPC_PMC_IBM, 138 .cpu_setup = __setup_cpu_ppc970, 139 .platform = "ppc970", 140 }, 141 { /* Power5 GR */ 142 .pvr_mask = 0xffff0000, 143 .pvr_value = 0x003a0000, 144 .cpu_name = "POWER5 (gr)", 145 .cpu_features = CPU_FTRS_POWER5, 146 .cpu_user_features = COMMON_USER_POWER5, 147 .mmu_features = MMU_FTRS_POWER5, 148 .icache_bsize = 128, 149 .dcache_bsize = 128, 150 .num_pmcs = 6, 151 .pmc_type = PPC_PMC_IBM, 152 .platform = "power5", 153 }, 154 { /* Power5++ */ 155 .pvr_mask = 0xffffff00, 156 .pvr_value = 0x003b0300, 157 .cpu_name = "POWER5+ (gs)", 158 .cpu_features = CPU_FTRS_POWER5, 159 .cpu_user_features = COMMON_USER_POWER5_PLUS, 160 .mmu_features = MMU_FTRS_POWER5, 161 .icache_bsize = 128, 162 .dcache_bsize = 128, 163 .num_pmcs = 6, 164 .platform = "power5+", 165 }, 166 { /* Power5 GS */ 167 .pvr_mask = 0xffff0000, 168 .pvr_value = 0x003b0000, 169 .cpu_name = "POWER5+ (gs)", 170 .cpu_features = CPU_FTRS_POWER5, 171 .cpu_user_features = COMMON_USER_POWER5_PLUS, 172 .mmu_features = MMU_FTRS_POWER5, 173 .icache_bsize = 128, 174 .dcache_bsize = 128, 175 .num_pmcs = 6, 176 .pmc_type = PPC_PMC_IBM, 177 .platform = "power5+", 178 }, 179 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 180 .pvr_mask = 0xffffffff, 181 .pvr_value = 0x0f000001, 182 .cpu_name = "POWER5+", 183 .cpu_features = CPU_FTRS_POWER5, 184 .cpu_user_features = COMMON_USER_POWER5_PLUS, 185 .mmu_features = MMU_FTRS_POWER5, 186 .icache_bsize = 128, 187 .dcache_bsize = 128, 188 .platform = "power5+", 189 }, 190 { /* Power6 */ 191 .pvr_mask = 0xffff0000, 192 .pvr_value = 0x003e0000, 193 .cpu_name = "POWER6 (raw)", 194 .cpu_features = CPU_FTRS_POWER6, 195 .cpu_user_features = COMMON_USER_POWER6 | PPC_FEATURE_POWER6_EXT, 196 .mmu_features = MMU_FTRS_POWER6, 197 .icache_bsize = 128, 198 .dcache_bsize = 128, 199 .num_pmcs = 6, 200 .pmc_type = PPC_PMC_IBM, 201 .platform = "power6x", 202 }, 203 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 204 .pvr_mask = 0xffffffff, 205 .pvr_value = 0x0f000002, 206 .cpu_name = "POWER6 (architected)", 207 .cpu_features = CPU_FTRS_POWER6, 208 .cpu_user_features = COMMON_USER_POWER6, 209 .mmu_features = MMU_FTRS_POWER6, 210 .icache_bsize = 128, 211 .dcache_bsize = 128, 212 .platform = "power6", 213 }, 214 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 215 .pvr_mask = 0xffffffff, 216 .pvr_value = 0x0f000003, 217 .cpu_name = "POWER7 (architected)", 218 .cpu_features = CPU_FTRS_POWER7, 219 .cpu_user_features = COMMON_USER_POWER7, 220 .cpu_user_features2 = COMMON_USER2_POWER7, 221 .mmu_features = MMU_FTRS_POWER7, 222 .icache_bsize = 128, 223 .dcache_bsize = 128, 224 .cpu_setup = __setup_cpu_power7, 225 .cpu_restore = __restore_cpu_power7, 226 .machine_check_early = __machine_check_early_realmode_p7, 227 .platform = "power7", 228 }, 229 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 230 .pvr_mask = 0xffffffff, 231 .pvr_value = 0x0f000004, 232 .cpu_name = "POWER8 (architected)", 233 .cpu_features = CPU_FTRS_POWER8, 234 .cpu_user_features = COMMON_USER_POWER8, 235 .cpu_user_features2 = COMMON_USER2_POWER8, 236 .mmu_features = MMU_FTRS_POWER8, 237 .icache_bsize = 128, 238 .dcache_bsize = 128, 239 .cpu_setup = __setup_cpu_power8, 240 .cpu_restore = __restore_cpu_power8, 241 .machine_check_early = __machine_check_early_realmode_p8, 242 .platform = "power8", 243 }, 244 { /* 2.07-compliant processor, HeXin C2000 processor */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x00660000, 247 .cpu_name = "HX-C2000", 248 .cpu_features = CPU_FTRS_POWER8, 249 .cpu_user_features = COMMON_USER_POWER8, 250 .cpu_user_features2 = COMMON_USER2_POWER8, 251 .mmu_features = MMU_FTRS_POWER8, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .cpu_setup = __setup_cpu_power8, 255 .cpu_restore = __restore_cpu_power8, 256 .machine_check_early = __machine_check_early_realmode_p8, 257 .platform = "power8", 258 }, 259 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 260 .pvr_mask = 0xffffffff, 261 .pvr_value = 0x0f000005, 262 .cpu_name = "POWER9 (architected)", 263 .cpu_features = CPU_FTRS_POWER9, 264 .cpu_user_features = COMMON_USER_POWER9, 265 .cpu_user_features2 = COMMON_USER2_POWER9, 266 .mmu_features = MMU_FTRS_POWER9, 267 .icache_bsize = 128, 268 .dcache_bsize = 128, 269 .cpu_setup = __setup_cpu_power9, 270 .cpu_restore = __restore_cpu_power9, 271 .platform = "power9", 272 }, 273 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 274 .pvr_mask = 0xffffffff, 275 .pvr_value = 0x0f000006, 276 .cpu_name = "POWER10 (architected)", 277 .cpu_features = CPU_FTRS_POWER10, 278 .cpu_user_features = COMMON_USER_POWER10, 279 .cpu_user_features2 = COMMON_USER2_POWER10, 280 .mmu_features = MMU_FTRS_POWER10, 281 .icache_bsize = 128, 282 .dcache_bsize = 128, 283 .cpu_setup = __setup_cpu_power10, 284 .cpu_restore = __restore_cpu_power10, 285 .platform = "power10", 286 }, 287 { /* 3.1-compliant processor, i.e. Power11 "architected" mode */ 288 .pvr_mask = 0xffffffff, 289 .pvr_value = 0x0f000007, 290 .cpu_name = "Power11 (architected)", 291 .cpu_features = CPU_FTRS_POWER11, 292 .cpu_user_features = COMMON_USER_POWER11, 293 .cpu_user_features2 = COMMON_USER2_POWER11, 294 .mmu_features = MMU_FTRS_POWER11, 295 .icache_bsize = 128, 296 .dcache_bsize = 128, 297 .cpu_setup = __setup_cpu_power10, 298 .cpu_restore = __restore_cpu_power10, 299 .platform = "power11", 300 }, 301 { /* Power7 */ 302 .pvr_mask = 0xffff0000, 303 .pvr_value = 0x003f0000, 304 .cpu_name = "POWER7 (raw)", 305 .cpu_features = CPU_FTRS_POWER7, 306 .cpu_user_features = COMMON_USER_POWER7, 307 .cpu_user_features2 = COMMON_USER2_POWER7, 308 .mmu_features = MMU_FTRS_POWER7, 309 .icache_bsize = 128, 310 .dcache_bsize = 128, 311 .num_pmcs = 6, 312 .pmc_type = PPC_PMC_IBM, 313 .cpu_setup = __setup_cpu_power7, 314 .cpu_restore = __restore_cpu_power7, 315 .machine_check_early = __machine_check_early_realmode_p7, 316 .platform = "power7", 317 }, 318 { /* Power7+ */ 319 .pvr_mask = 0xffff0000, 320 .pvr_value = 0x004A0000, 321 .cpu_name = "POWER7+ (raw)", 322 .cpu_features = CPU_FTRS_POWER7, 323 .cpu_user_features = COMMON_USER_POWER7, 324 .cpu_user_features2 = COMMON_USER2_POWER7, 325 .mmu_features = MMU_FTRS_POWER7, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .num_pmcs = 6, 329 .pmc_type = PPC_PMC_IBM, 330 .cpu_setup = __setup_cpu_power7, 331 .cpu_restore = __restore_cpu_power7, 332 .machine_check_early = __machine_check_early_realmode_p7, 333 .platform = "power7+", 334 }, 335 { /* Power8E */ 336 .pvr_mask = 0xffff0000, 337 .pvr_value = 0x004b0000, 338 .cpu_name = "POWER8E (raw)", 339 .cpu_features = CPU_FTRS_POWER8E, 340 .cpu_user_features = COMMON_USER_POWER8, 341 .cpu_user_features2 = COMMON_USER2_POWER8, 342 .mmu_features = MMU_FTRS_POWER8, 343 .icache_bsize = 128, 344 .dcache_bsize = 128, 345 .num_pmcs = 6, 346 .pmc_type = PPC_PMC_IBM, 347 .cpu_setup = __setup_cpu_power8, 348 .cpu_restore = __restore_cpu_power8, 349 .machine_check_early = __machine_check_early_realmode_p8, 350 .platform = "power8", 351 }, 352 { /* Power8NVL */ 353 .pvr_mask = 0xffff0000, 354 .pvr_value = 0x004c0000, 355 .cpu_name = "POWER8NVL (raw)", 356 .cpu_features = CPU_FTRS_POWER8, 357 .cpu_user_features = COMMON_USER_POWER8, 358 .cpu_user_features2 = COMMON_USER2_POWER8, 359 .mmu_features = MMU_FTRS_POWER8, 360 .icache_bsize = 128, 361 .dcache_bsize = 128, 362 .num_pmcs = 6, 363 .pmc_type = PPC_PMC_IBM, 364 .cpu_setup = __setup_cpu_power8, 365 .cpu_restore = __restore_cpu_power8, 366 .machine_check_early = __machine_check_early_realmode_p8, 367 .platform = "power8", 368 }, 369 { /* Power8 */ 370 .pvr_mask = 0xffff0000, 371 .pvr_value = 0x004d0000, 372 .cpu_name = "POWER8 (raw)", 373 .cpu_features = CPU_FTRS_POWER8, 374 .cpu_user_features = COMMON_USER_POWER8, 375 .cpu_user_features2 = COMMON_USER2_POWER8, 376 .mmu_features = MMU_FTRS_POWER8, 377 .icache_bsize = 128, 378 .dcache_bsize = 128, 379 .num_pmcs = 6, 380 .pmc_type = PPC_PMC_IBM, 381 .cpu_setup = __setup_cpu_power8, 382 .cpu_restore = __restore_cpu_power8, 383 .machine_check_early = __machine_check_early_realmode_p8, 384 .platform = "power8", 385 }, 386 { /* Power9 DD2.0 */ 387 .pvr_mask = 0xffffefff, 388 .pvr_value = 0x004e0200, 389 .cpu_name = "POWER9 (raw)", 390 .cpu_features = CPU_FTRS_POWER9_DD2_0, 391 .cpu_user_features = COMMON_USER_POWER9, 392 .cpu_user_features2 = COMMON_USER2_POWER9, 393 .mmu_features = MMU_FTRS_POWER9, 394 .icache_bsize = 128, 395 .dcache_bsize = 128, 396 .num_pmcs = 6, 397 .pmc_type = PPC_PMC_IBM, 398 .cpu_setup = __setup_cpu_power9, 399 .cpu_restore = __restore_cpu_power9, 400 .machine_check_early = __machine_check_early_realmode_p9, 401 .platform = "power9", 402 }, 403 { /* Power9 DD 2.1 */ 404 .pvr_mask = 0xffffefff, 405 .pvr_value = 0x004e0201, 406 .cpu_name = "POWER9 (raw)", 407 .cpu_features = CPU_FTRS_POWER9_DD2_1, 408 .cpu_user_features = COMMON_USER_POWER9, 409 .cpu_user_features2 = COMMON_USER2_POWER9, 410 .mmu_features = MMU_FTRS_POWER9, 411 .icache_bsize = 128, 412 .dcache_bsize = 128, 413 .num_pmcs = 6, 414 .pmc_type = PPC_PMC_IBM, 415 .cpu_setup = __setup_cpu_power9, 416 .cpu_restore = __restore_cpu_power9, 417 .machine_check_early = __machine_check_early_realmode_p9, 418 .platform = "power9", 419 }, 420 { /* Power9 DD2.2 */ 421 .pvr_mask = 0xffffefff, 422 .pvr_value = 0x004e0202, 423 .cpu_name = "POWER9 (raw)", 424 .cpu_features = CPU_FTRS_POWER9_DD2_2, 425 .cpu_user_features = COMMON_USER_POWER9, 426 .cpu_user_features2 = COMMON_USER2_POWER9, 427 .mmu_features = MMU_FTRS_POWER9, 428 .icache_bsize = 128, 429 .dcache_bsize = 128, 430 .num_pmcs = 6, 431 .pmc_type = PPC_PMC_IBM, 432 .cpu_setup = __setup_cpu_power9, 433 .cpu_restore = __restore_cpu_power9, 434 .machine_check_early = __machine_check_early_realmode_p9, 435 .platform = "power9", 436 }, 437 { /* Power9 DD2.3 or later */ 438 .pvr_mask = 0xffff0000, 439 .pvr_value = 0x004e0000, 440 .cpu_name = "POWER9 (raw)", 441 .cpu_features = CPU_FTRS_POWER9_DD2_3, 442 .cpu_user_features = COMMON_USER_POWER9, 443 .cpu_user_features2 = COMMON_USER2_POWER9, 444 .mmu_features = MMU_FTRS_POWER9, 445 .icache_bsize = 128, 446 .dcache_bsize = 128, 447 .num_pmcs = 6, 448 .pmc_type = PPC_PMC_IBM, 449 .cpu_setup = __setup_cpu_power9, 450 .cpu_restore = __restore_cpu_power9, 451 .machine_check_early = __machine_check_early_realmode_p9, 452 .platform = "power9", 453 }, 454 { /* Power10 */ 455 .pvr_mask = 0xffff0000, 456 .pvr_value = 0x00800000, 457 .cpu_name = "POWER10 (raw)", 458 .cpu_features = CPU_FTRS_POWER10, 459 .cpu_user_features = COMMON_USER_POWER10, 460 .cpu_user_features2 = COMMON_USER2_POWER10, 461 .mmu_features = MMU_FTRS_POWER10, 462 .icache_bsize = 128, 463 .dcache_bsize = 128, 464 .num_pmcs = 6, 465 .pmc_type = PPC_PMC_IBM, 466 .cpu_setup = __setup_cpu_power10, 467 .cpu_restore = __restore_cpu_power10, 468 .machine_check_early = __machine_check_early_realmode_p10, 469 .platform = "power10", 470 }, 471 { /* Power11 */ 472 .pvr_mask = 0xffff0000, 473 .pvr_value = 0x00820000, 474 .cpu_name = "Power11 (raw)", 475 .cpu_features = CPU_FTRS_POWER11, 476 .cpu_user_features = COMMON_USER_POWER11, 477 .cpu_user_features2 = COMMON_USER2_POWER11, 478 .mmu_features = MMU_FTRS_POWER11, 479 .icache_bsize = 128, 480 .dcache_bsize = 128, 481 .num_pmcs = 6, 482 .pmc_type = PPC_PMC_IBM, 483 .cpu_setup = __setup_cpu_power10, 484 .cpu_restore = __restore_cpu_power10, 485 .machine_check_early = __machine_check_early_realmode_p10, 486 .platform = "power11", 487 }, 488 { /* Cell Broadband Engine */ 489 .pvr_mask = 0xffff0000, 490 .pvr_value = 0x00700000, 491 .cpu_name = "Cell Broadband Engine", 492 .cpu_features = CPU_FTRS_CELL, 493 .cpu_user_features = COMMON_USER_PPC64 | PPC_FEATURE_CELL | 494 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_SMT, 495 .mmu_features = MMU_FTRS_CELL, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 4, 499 .pmc_type = PPC_PMC_IBM, 500 .platform = "ppc-cell-be", 501 }, 502 { /* PA Semi PA6T */ 503 .pvr_mask = 0x7fff0000, 504 .pvr_value = 0x00900000, 505 .cpu_name = "PA6T", 506 .cpu_features = CPU_FTRS_PA6T, 507 .cpu_user_features = COMMON_USER_PA6T, 508 .mmu_features = MMU_FTRS_PA6T, 509 .icache_bsize = 64, 510 .dcache_bsize = 64, 511 .num_pmcs = 6, 512 .pmc_type = PPC_PMC_PA6T, 513 .cpu_setup = __setup_cpu_pa6t, 514 .cpu_restore = __restore_cpu_pa6t, 515 .platform = "pa6t", 516 }, 517 { /* default match */ 518 .pvr_mask = 0x00000000, 519 .pvr_value = 0x00000000, 520 .cpu_name = "POWER5 (compatible)", 521 .cpu_features = CPU_FTRS_COMPATIBLE, 522 .cpu_user_features = COMMON_USER_PPC64, 523 .mmu_features = MMU_FTRS_POWER, 524 .icache_bsize = 128, 525 .dcache_bsize = 128, 526 .num_pmcs = 6, 527 .pmc_type = PPC_PMC_IBM, 528 .platform = "power5", 529 } 530 }; 531