1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 /* NOTE: 10 * Unlike ppc32, ppc64 will only call cpu_setup() for the boot CPU, it's 11 * the responsibility of the appropriate CPU save/restore functions to 12 * eventually copy these settings over. Those save/restore aren't yet 13 * part of the cputable though. That has to be fixed for both ppc32 14 * and ppc64 15 */ 16 #define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 17 PPC_FEATURE_HAS_MMU | PPC_FEATURE_64) 18 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 19 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 20 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 21 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 22 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 23 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 24 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 25 PPC_FEATURE_TRUE_LE | \ 26 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 27 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 28 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 29 PPC_FEATURE_TRUE_LE | \ 30 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 31 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 32 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 33 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 34 PPC_FEATURE_TRUE_LE | \ 35 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 36 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 37 PPC_FEATURE2_HTM_COMP | \ 38 PPC_FEATURE2_HTM_NOSC_COMP | \ 39 PPC_FEATURE2_DSCR | \ 40 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 41 PPC_FEATURE2_VEC_CRYPTO) 42 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 43 PPC_FEATURE_TRUE_LE | \ 44 PPC_FEATURE_HAS_ALTIVEC_COMP) 45 #define COMMON_USER_POWER9 COMMON_USER_POWER8 46 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 47 PPC_FEATURE2_ARCH_3_00 | \ 48 PPC_FEATURE2_HAS_IEEE128 | \ 49 PPC_FEATURE2_DARN | \ 50 PPC_FEATURE2_SCV) 51 #define COMMON_USER_POWER10 COMMON_USER_POWER9 52 #define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 53 PPC_FEATURE2_MMA | \ 54 PPC_FEATURE2_ARCH_3_00 | \ 55 PPC_FEATURE2_HAS_IEEE128 | \ 56 PPC_FEATURE2_DARN | \ 57 PPC_FEATURE2_SCV | \ 58 PPC_FEATURE2_ARCH_2_07 | \ 59 PPC_FEATURE2_DSCR | \ 60 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 61 PPC_FEATURE2_VEC_CRYPTO) 62 63 static struct cpu_spec cpu_specs[] __initdata = { 64 { /* PPC970 */ 65 .pvr_mask = 0xffff0000, 66 .pvr_value = 0x00390000, 67 .cpu_name = "PPC970", 68 .cpu_features = CPU_FTRS_PPC970, 69 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 70 .mmu_features = MMU_FTRS_PPC970, 71 .icache_bsize = 128, 72 .dcache_bsize = 128, 73 .num_pmcs = 8, 74 .pmc_type = PPC_PMC_IBM, 75 .cpu_setup = __setup_cpu_ppc970, 76 .cpu_restore = __restore_cpu_ppc970, 77 .platform = "ppc970", 78 }, 79 { /* PPC970FX */ 80 .pvr_mask = 0xffff0000, 81 .pvr_value = 0x003c0000, 82 .cpu_name = "PPC970FX", 83 .cpu_features = CPU_FTRS_PPC970, 84 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 85 .mmu_features = MMU_FTRS_PPC970, 86 .icache_bsize = 128, 87 .dcache_bsize = 128, 88 .num_pmcs = 8, 89 .pmc_type = PPC_PMC_IBM, 90 .cpu_setup = __setup_cpu_ppc970, 91 .cpu_restore = __restore_cpu_ppc970, 92 .platform = "ppc970", 93 }, 94 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 95 .pvr_mask = 0xffffffff, 96 .pvr_value = 0x00440100, 97 .cpu_name = "PPC970MP", 98 .cpu_features = CPU_FTRS_PPC970, 99 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 100 .mmu_features = MMU_FTRS_PPC970, 101 .icache_bsize = 128, 102 .dcache_bsize = 128, 103 .num_pmcs = 8, 104 .pmc_type = PPC_PMC_IBM, 105 .cpu_setup = __setup_cpu_ppc970, 106 .cpu_restore = __restore_cpu_ppc970, 107 .platform = "ppc970", 108 }, 109 { /* PPC970MP */ 110 .pvr_mask = 0xffff0000, 111 .pvr_value = 0x00440000, 112 .cpu_name = "PPC970MP", 113 .cpu_features = CPU_FTRS_PPC970, 114 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 115 .mmu_features = MMU_FTRS_PPC970, 116 .icache_bsize = 128, 117 .dcache_bsize = 128, 118 .num_pmcs = 8, 119 .pmc_type = PPC_PMC_IBM, 120 .cpu_setup = __setup_cpu_ppc970MP, 121 .cpu_restore = __restore_cpu_ppc970, 122 .platform = "ppc970", 123 }, 124 { /* PPC970GX */ 125 .pvr_mask = 0xffff0000, 126 .pvr_value = 0x00450000, 127 .cpu_name = "PPC970GX", 128 .cpu_features = CPU_FTRS_PPC970, 129 .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, 130 .mmu_features = MMU_FTRS_PPC970, 131 .icache_bsize = 128, 132 .dcache_bsize = 128, 133 .num_pmcs = 8, 134 .pmc_type = PPC_PMC_IBM, 135 .cpu_setup = __setup_cpu_ppc970, 136 .platform = "ppc970", 137 }, 138 { /* Power5 GR */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x003a0000, 141 .cpu_name = "POWER5 (gr)", 142 .cpu_features = CPU_FTRS_POWER5, 143 .cpu_user_features = COMMON_USER_POWER5, 144 .mmu_features = MMU_FTRS_POWER5, 145 .icache_bsize = 128, 146 .dcache_bsize = 128, 147 .num_pmcs = 6, 148 .pmc_type = PPC_PMC_IBM, 149 .platform = "power5", 150 }, 151 { /* Power5++ */ 152 .pvr_mask = 0xffffff00, 153 .pvr_value = 0x003b0300, 154 .cpu_name = "POWER5+ (gs)", 155 .cpu_features = CPU_FTRS_POWER5, 156 .cpu_user_features = COMMON_USER_POWER5_PLUS, 157 .mmu_features = MMU_FTRS_POWER5, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 6, 161 .platform = "power5+", 162 }, 163 { /* Power5 GS */ 164 .pvr_mask = 0xffff0000, 165 .pvr_value = 0x003b0000, 166 .cpu_name = "POWER5+ (gs)", 167 .cpu_features = CPU_FTRS_POWER5, 168 .cpu_user_features = COMMON_USER_POWER5_PLUS, 169 .mmu_features = MMU_FTRS_POWER5, 170 .icache_bsize = 128, 171 .dcache_bsize = 128, 172 .num_pmcs = 6, 173 .pmc_type = PPC_PMC_IBM, 174 .platform = "power5+", 175 }, 176 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 177 .pvr_mask = 0xffffffff, 178 .pvr_value = 0x0f000001, 179 .cpu_name = "POWER5+", 180 .cpu_features = CPU_FTRS_POWER5, 181 .cpu_user_features = COMMON_USER_POWER5_PLUS, 182 .mmu_features = MMU_FTRS_POWER5, 183 .icache_bsize = 128, 184 .dcache_bsize = 128, 185 .platform = "power5+", 186 }, 187 { /* Power6 */ 188 .pvr_mask = 0xffff0000, 189 .pvr_value = 0x003e0000, 190 .cpu_name = "POWER6 (raw)", 191 .cpu_features = CPU_FTRS_POWER6, 192 .cpu_user_features = COMMON_USER_POWER6 | PPC_FEATURE_POWER6_EXT, 193 .mmu_features = MMU_FTRS_POWER6, 194 .icache_bsize = 128, 195 .dcache_bsize = 128, 196 .num_pmcs = 6, 197 .pmc_type = PPC_PMC_IBM, 198 .platform = "power6x", 199 }, 200 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 201 .pvr_mask = 0xffffffff, 202 .pvr_value = 0x0f000002, 203 .cpu_name = "POWER6 (architected)", 204 .cpu_features = CPU_FTRS_POWER6, 205 .cpu_user_features = COMMON_USER_POWER6, 206 .mmu_features = MMU_FTRS_POWER6, 207 .icache_bsize = 128, 208 .dcache_bsize = 128, 209 .platform = "power6", 210 }, 211 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 212 .pvr_mask = 0xffffffff, 213 .pvr_value = 0x0f000003, 214 .cpu_name = "POWER7 (architected)", 215 .cpu_features = CPU_FTRS_POWER7, 216 .cpu_user_features = COMMON_USER_POWER7, 217 .cpu_user_features2 = COMMON_USER2_POWER7, 218 .mmu_features = MMU_FTRS_POWER7, 219 .icache_bsize = 128, 220 .dcache_bsize = 128, 221 .cpu_setup = __setup_cpu_power7, 222 .cpu_restore = __restore_cpu_power7, 223 .machine_check_early = __machine_check_early_realmode_p7, 224 .platform = "power7", 225 }, 226 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 227 .pvr_mask = 0xffffffff, 228 .pvr_value = 0x0f000004, 229 .cpu_name = "POWER8 (architected)", 230 .cpu_features = CPU_FTRS_POWER8, 231 .cpu_user_features = COMMON_USER_POWER8, 232 .cpu_user_features2 = COMMON_USER2_POWER8, 233 .mmu_features = MMU_FTRS_POWER8, 234 .icache_bsize = 128, 235 .dcache_bsize = 128, 236 .cpu_setup = __setup_cpu_power8, 237 .cpu_restore = __restore_cpu_power8, 238 .machine_check_early = __machine_check_early_realmode_p8, 239 .platform = "power8", 240 }, 241 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 242 .pvr_mask = 0xffffffff, 243 .pvr_value = 0x0f000005, 244 .cpu_name = "POWER9 (architected)", 245 .cpu_features = CPU_FTRS_POWER9, 246 .cpu_user_features = COMMON_USER_POWER9, 247 .cpu_user_features2 = COMMON_USER2_POWER9, 248 .mmu_features = MMU_FTRS_POWER9, 249 .icache_bsize = 128, 250 .dcache_bsize = 128, 251 .cpu_setup = __setup_cpu_power9, 252 .cpu_restore = __restore_cpu_power9, 253 .platform = "power9", 254 }, 255 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 256 .pvr_mask = 0xffffffff, 257 .pvr_value = 0x0f000006, 258 .cpu_name = "POWER10 (architected)", 259 .cpu_features = CPU_FTRS_POWER10, 260 .cpu_user_features = COMMON_USER_POWER10, 261 .cpu_user_features2 = COMMON_USER2_POWER10, 262 .mmu_features = MMU_FTRS_POWER10, 263 .icache_bsize = 128, 264 .dcache_bsize = 128, 265 .cpu_setup = __setup_cpu_power10, 266 .cpu_restore = __restore_cpu_power10, 267 .platform = "power10", 268 }, 269 { /* Power7 */ 270 .pvr_mask = 0xffff0000, 271 .pvr_value = 0x003f0000, 272 .cpu_name = "POWER7 (raw)", 273 .cpu_features = CPU_FTRS_POWER7, 274 .cpu_user_features = COMMON_USER_POWER7, 275 .cpu_user_features2 = COMMON_USER2_POWER7, 276 .mmu_features = MMU_FTRS_POWER7, 277 .icache_bsize = 128, 278 .dcache_bsize = 128, 279 .num_pmcs = 6, 280 .pmc_type = PPC_PMC_IBM, 281 .cpu_setup = __setup_cpu_power7, 282 .cpu_restore = __restore_cpu_power7, 283 .machine_check_early = __machine_check_early_realmode_p7, 284 .platform = "power7", 285 }, 286 { /* Power7+ */ 287 .pvr_mask = 0xffff0000, 288 .pvr_value = 0x004A0000, 289 .cpu_name = "POWER7+ (raw)", 290 .cpu_features = CPU_FTRS_POWER7, 291 .cpu_user_features = COMMON_USER_POWER7, 292 .cpu_user_features2 = COMMON_USER2_POWER7, 293 .mmu_features = MMU_FTRS_POWER7, 294 .icache_bsize = 128, 295 .dcache_bsize = 128, 296 .num_pmcs = 6, 297 .pmc_type = PPC_PMC_IBM, 298 .cpu_setup = __setup_cpu_power7, 299 .cpu_restore = __restore_cpu_power7, 300 .machine_check_early = __machine_check_early_realmode_p7, 301 .platform = "power7+", 302 }, 303 { /* Power8E */ 304 .pvr_mask = 0xffff0000, 305 .pvr_value = 0x004b0000, 306 .cpu_name = "POWER8E (raw)", 307 .cpu_features = CPU_FTRS_POWER8E, 308 .cpu_user_features = COMMON_USER_POWER8, 309 .cpu_user_features2 = COMMON_USER2_POWER8, 310 .mmu_features = MMU_FTRS_POWER8, 311 .icache_bsize = 128, 312 .dcache_bsize = 128, 313 .num_pmcs = 6, 314 .pmc_type = PPC_PMC_IBM, 315 .cpu_setup = __setup_cpu_power8, 316 .cpu_restore = __restore_cpu_power8, 317 .machine_check_early = __machine_check_early_realmode_p8, 318 .platform = "power8", 319 }, 320 { /* Power8NVL */ 321 .pvr_mask = 0xffff0000, 322 .pvr_value = 0x004c0000, 323 .cpu_name = "POWER8NVL (raw)", 324 .cpu_features = CPU_FTRS_POWER8, 325 .cpu_user_features = COMMON_USER_POWER8, 326 .cpu_user_features2 = COMMON_USER2_POWER8, 327 .mmu_features = MMU_FTRS_POWER8, 328 .icache_bsize = 128, 329 .dcache_bsize = 128, 330 .num_pmcs = 6, 331 .pmc_type = PPC_PMC_IBM, 332 .cpu_setup = __setup_cpu_power8, 333 .cpu_restore = __restore_cpu_power8, 334 .machine_check_early = __machine_check_early_realmode_p8, 335 .platform = "power8", 336 }, 337 { /* Power8 */ 338 .pvr_mask = 0xffff0000, 339 .pvr_value = 0x004d0000, 340 .cpu_name = "POWER8 (raw)", 341 .cpu_features = CPU_FTRS_POWER8, 342 .cpu_user_features = COMMON_USER_POWER8, 343 .cpu_user_features2 = COMMON_USER2_POWER8, 344 .mmu_features = MMU_FTRS_POWER8, 345 .icache_bsize = 128, 346 .dcache_bsize = 128, 347 .num_pmcs = 6, 348 .pmc_type = PPC_PMC_IBM, 349 .cpu_setup = __setup_cpu_power8, 350 .cpu_restore = __restore_cpu_power8, 351 .machine_check_early = __machine_check_early_realmode_p8, 352 .platform = "power8", 353 }, 354 { /* Power9 DD2.0 */ 355 .pvr_mask = 0xffffefff, 356 .pvr_value = 0x004e0200, 357 .cpu_name = "POWER9 (raw)", 358 .cpu_features = CPU_FTRS_POWER9_DD2_0, 359 .cpu_user_features = COMMON_USER_POWER9, 360 .cpu_user_features2 = COMMON_USER2_POWER9, 361 .mmu_features = MMU_FTRS_POWER9, 362 .icache_bsize = 128, 363 .dcache_bsize = 128, 364 .num_pmcs = 6, 365 .pmc_type = PPC_PMC_IBM, 366 .cpu_setup = __setup_cpu_power9, 367 .cpu_restore = __restore_cpu_power9, 368 .machine_check_early = __machine_check_early_realmode_p9, 369 .platform = "power9", 370 }, 371 { /* Power9 DD 2.1 */ 372 .pvr_mask = 0xffffefff, 373 .pvr_value = 0x004e0201, 374 .cpu_name = "POWER9 (raw)", 375 .cpu_features = CPU_FTRS_POWER9_DD2_1, 376 .cpu_user_features = COMMON_USER_POWER9, 377 .cpu_user_features2 = COMMON_USER2_POWER9, 378 .mmu_features = MMU_FTRS_POWER9, 379 .icache_bsize = 128, 380 .dcache_bsize = 128, 381 .num_pmcs = 6, 382 .pmc_type = PPC_PMC_IBM, 383 .cpu_setup = __setup_cpu_power9, 384 .cpu_restore = __restore_cpu_power9, 385 .machine_check_early = __machine_check_early_realmode_p9, 386 .platform = "power9", 387 }, 388 { /* Power9 DD2.2 */ 389 .pvr_mask = 0xffffefff, 390 .pvr_value = 0x004e0202, 391 .cpu_name = "POWER9 (raw)", 392 .cpu_features = CPU_FTRS_POWER9_DD2_2, 393 .cpu_user_features = COMMON_USER_POWER9, 394 .cpu_user_features2 = COMMON_USER2_POWER9, 395 .mmu_features = MMU_FTRS_POWER9, 396 .icache_bsize = 128, 397 .dcache_bsize = 128, 398 .num_pmcs = 6, 399 .pmc_type = PPC_PMC_IBM, 400 .cpu_setup = __setup_cpu_power9, 401 .cpu_restore = __restore_cpu_power9, 402 .machine_check_early = __machine_check_early_realmode_p9, 403 .platform = "power9", 404 }, 405 { /* Power9 DD2.3 or later */ 406 .pvr_mask = 0xffff0000, 407 .pvr_value = 0x004e0000, 408 .cpu_name = "POWER9 (raw)", 409 .cpu_features = CPU_FTRS_POWER9_DD2_3, 410 .cpu_user_features = COMMON_USER_POWER9, 411 .cpu_user_features2 = COMMON_USER2_POWER9, 412 .mmu_features = MMU_FTRS_POWER9, 413 .icache_bsize = 128, 414 .dcache_bsize = 128, 415 .num_pmcs = 6, 416 .pmc_type = PPC_PMC_IBM, 417 .cpu_setup = __setup_cpu_power9, 418 .cpu_restore = __restore_cpu_power9, 419 .machine_check_early = __machine_check_early_realmode_p9, 420 .platform = "power9", 421 }, 422 { /* Power10 */ 423 .pvr_mask = 0xffff0000, 424 .pvr_value = 0x00800000, 425 .cpu_name = "POWER10 (raw)", 426 .cpu_features = CPU_FTRS_POWER10, 427 .cpu_user_features = COMMON_USER_POWER10, 428 .cpu_user_features2 = COMMON_USER2_POWER10, 429 .mmu_features = MMU_FTRS_POWER10, 430 .icache_bsize = 128, 431 .dcache_bsize = 128, 432 .num_pmcs = 6, 433 .pmc_type = PPC_PMC_IBM, 434 .cpu_setup = __setup_cpu_power10, 435 .cpu_restore = __restore_cpu_power10, 436 .machine_check_early = __machine_check_early_realmode_p10, 437 .platform = "power10", 438 }, 439 { /* Cell Broadband Engine */ 440 .pvr_mask = 0xffff0000, 441 .pvr_value = 0x00700000, 442 .cpu_name = "Cell Broadband Engine", 443 .cpu_features = CPU_FTRS_CELL, 444 .cpu_user_features = COMMON_USER_PPC64 | PPC_FEATURE_CELL | 445 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_SMT, 446 .mmu_features = MMU_FTRS_CELL, 447 .icache_bsize = 128, 448 .dcache_bsize = 128, 449 .num_pmcs = 4, 450 .pmc_type = PPC_PMC_IBM, 451 .platform = "ppc-cell-be", 452 }, 453 { /* PA Semi PA6T */ 454 .pvr_mask = 0x7fff0000, 455 .pvr_value = 0x00900000, 456 .cpu_name = "PA6T", 457 .cpu_features = CPU_FTRS_PA6T, 458 .cpu_user_features = COMMON_USER_PA6T, 459 .mmu_features = MMU_FTRS_PA6T, 460 .icache_bsize = 64, 461 .dcache_bsize = 64, 462 .num_pmcs = 6, 463 .pmc_type = PPC_PMC_PA6T, 464 .cpu_setup = __setup_cpu_pa6t, 465 .cpu_restore = __restore_cpu_pa6t, 466 .platform = "pa6t", 467 }, 468 { /* default match */ 469 .pvr_mask = 0x00000000, 470 .pvr_value = 0x00000000, 471 .cpu_name = "POWER5 (compatible)", 472 .cpu_features = CPU_FTRS_COMPATIBLE, 473 .cpu_user_features = COMMON_USER_PPC64, 474 .mmu_features = MMU_FTRS_POWER, 475 .icache_bsize = 128, 476 .dcache_bsize = 128, 477 .num_pmcs = 6, 478 .pmc_type = PPC_PMC_IBM, 479 .platform = "power5", 480 } 481 }; 482