xref: /linux/arch/powerpc/include/asm/xics.h (revision 827634added7f38b7d724cab1dccdb2b004c13c3)
1 /*
2  * Common definitions accross all variants of ICP and ICS interrupt
3  * controllers.
4  */
5 
6 #ifndef _XICS_H
7 #define _XICS_H
8 
9 #include <linux/interrupt.h>
10 
11 #define XICS_IPI		2
12 #define XICS_IRQ_SPURIOUS	0
13 
14 /* Want a priority other than 0.  Various HW issues require this. */
15 #define	DEFAULT_PRIORITY	5
16 
17 /*
18  * Mark IPIs as higher priority so we can take them inside interrupts
19  * FIXME: still true now?
20  */
21 #define IPI_PRIORITY		4
22 
23 /* The least favored priority */
24 #define LOWEST_PRIORITY		0xFF
25 
26 /* The number of priorities defined above */
27 #define MAX_NUM_PRIORITIES	3
28 
29 /* Native ICP */
30 #ifdef CONFIG_PPC_ICP_NATIVE
31 extern int icp_native_init(void);
32 extern void icp_native_flush_interrupt(void);
33 #else
34 static inline int icp_native_init(void) { return -ENODEV; }
35 #endif
36 
37 /* PAPR ICP */
38 #ifdef CONFIG_PPC_ICP_HV
39 extern int icp_hv_init(void);
40 #else
41 static inline int icp_hv_init(void) { return -ENODEV; }
42 #endif
43 
44 /* ICP ops */
45 struct icp_ops {
46 	unsigned int (*get_irq)(void);
47 	void (*eoi)(struct irq_data *d);
48 	void (*set_priority)(unsigned char prio);
49 	void (*teardown_cpu)(void);
50 	void (*flush_ipi)(void);
51 #ifdef CONFIG_SMP
52 	void (*cause_ipi)(int cpu, unsigned long data);
53 	irq_handler_t ipi_action;
54 #endif
55 };
56 
57 extern const struct icp_ops *icp_ops;
58 
59 /* Native ICS */
60 extern int ics_native_init(void);
61 
62 /* RTAS ICS */
63 #ifdef CONFIG_PPC_ICS_RTAS
64 extern int ics_rtas_init(void);
65 #else
66 static inline int ics_rtas_init(void) { return -ENODEV; }
67 #endif
68 
69 /* HAL ICS */
70 #ifdef CONFIG_PPC_POWERNV
71 extern int ics_opal_init(void);
72 #else
73 static inline int ics_opal_init(void) { return -ENODEV; }
74 #endif
75 
76 /* ICS instance, hooked up to chip_data of an irq */
77 struct ics {
78 	struct list_head link;
79 	int (*map)(struct ics *ics, unsigned int virq);
80 	void (*mask_unknown)(struct ics *ics, unsigned long vec);
81 	long (*get_server)(struct ics *ics, unsigned long vec);
82 	int (*host_match)(struct ics *ics, struct device_node *node);
83 	char data[];
84 };
85 
86 /* Commons */
87 extern unsigned int xics_default_server;
88 extern unsigned int xics_default_distrib_server;
89 extern unsigned int xics_interrupt_server_size;
90 extern struct irq_domain *xics_host;
91 
92 struct xics_cppr {
93 	unsigned char stack[MAX_NUM_PRIORITIES];
94 	int index;
95 };
96 
97 DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
98 
99 static inline void xics_push_cppr(unsigned int vec)
100 {
101 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
102 
103 	if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
104 		return;
105 
106 	if (vec == XICS_IPI)
107 		os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
108 	else
109 		os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
110 }
111 
112 static inline unsigned char xics_pop_cppr(void)
113 {
114 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
115 
116 	if (WARN_ON(os_cppr->index < 1))
117 		return LOWEST_PRIORITY;
118 
119 	return os_cppr->stack[--os_cppr->index];
120 }
121 
122 static inline void xics_set_base_cppr(unsigned char cppr)
123 {
124 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
125 
126 	/* we only really want to set the priority when there's
127 	 * just one cppr value on the stack
128 	 */
129 	WARN_ON(os_cppr->index != 0);
130 
131 	os_cppr->stack[0] = cppr;
132 }
133 
134 static inline unsigned char xics_cppr_top(void)
135 {
136 	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
137 
138 	return os_cppr->stack[os_cppr->index];
139 }
140 
141 DECLARE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
142 
143 extern void xics_init(void);
144 extern void xics_setup_cpu(void);
145 extern void xics_update_irq_servers(void);
146 extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
147 extern void xics_mask_unknown_vec(unsigned int vec);
148 extern irqreturn_t xics_ipi_dispatch(int cpu);
149 extern void xics_smp_probe(void);
150 extern void xics_register_ics(struct ics *ics);
151 extern void xics_teardown_cpu(void);
152 extern void xics_kexec_teardown_cpu(int secondary);
153 extern void xics_migrate_irqs_away(void);
154 extern void icp_native_eoi(struct irq_data *d);
155 #ifdef CONFIG_SMP
156 extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
157 			       unsigned int strict_check);
158 #else
159 #define xics_get_irq_server(virq, cpumask, strict_check) (xics_default_server)
160 #endif
161 
162 
163 #endif /* _XICS_H */
164