1 /* 2 * Common time prototypes and such for all ppc machines. 3 * 4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge 5 * Paul Mackerras' version and mine for PReP and Pmac. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #ifndef __POWERPC_TIME_H 14 #define __POWERPC_TIME_H 15 16 #ifdef __KERNEL__ 17 #include <linux/types.h> 18 #include <linux/percpu.h> 19 20 #include <asm/processor.h> 21 #ifdef CONFIG_PPC_ISERIES 22 #include <asm/paca.h> 23 #include <asm/firmware.h> 24 #include <asm/iseries/hv_call.h> 25 #endif 26 27 /* time.c */ 28 extern unsigned long tb_ticks_per_jiffy; 29 extern unsigned long tb_ticks_per_usec; 30 extern unsigned long tb_ticks_per_sec; 31 32 struct rtc_time; 33 extern void to_tm(int tim, struct rtc_time * tm); 34 extern void GregorianDay(struct rtc_time *tm); 35 36 extern void generic_calibrate_decr(void); 37 extern void snapshot_timebase(void); 38 39 extern void set_dec_cpu6(unsigned int val); 40 41 /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 42 extern unsigned long ppc_proc_freq; 43 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 44 extern unsigned long ppc_tb_freq; 45 #define DEFAULT_TB_FREQ 125000000UL 46 47 struct div_result { 48 u64 result_high; 49 u64 result_low; 50 }; 51 52 /* Accessor functions for the timebase (RTC on 601) registers. */ 53 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ 54 #ifdef CONFIG_6xx 55 #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB)) 56 #else 57 #define __USE_RTC() 0 58 #endif 59 60 #ifdef CONFIG_PPC64 61 62 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ 63 #define get_tbl get_tb 64 65 #else 66 67 static inline unsigned long get_tbl(void) 68 { 69 #if defined(CONFIG_403GCX) 70 unsigned long tbl; 71 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); 72 return tbl; 73 #else 74 return mftbl(); 75 #endif 76 } 77 78 static inline unsigned int get_tbu(void) 79 { 80 #ifdef CONFIG_403GCX 81 unsigned int tbu; 82 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); 83 return tbu; 84 #else 85 return mftbu(); 86 #endif 87 } 88 #endif /* !CONFIG_PPC64 */ 89 90 static inline unsigned int get_rtcl(void) 91 { 92 unsigned int rtcl; 93 94 asm volatile("mfrtcl %0" : "=r" (rtcl)); 95 return rtcl; 96 } 97 98 static inline u64 get_rtc(void) 99 { 100 unsigned int hi, lo, hi2; 101 102 do { 103 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2" 104 : "=r" (hi), "=r" (lo), "=r" (hi2)); 105 } while (hi2 != hi); 106 return (u64)hi * 1000000000 + lo; 107 } 108 109 #ifdef CONFIG_PPC64 110 static inline u64 get_tb(void) 111 { 112 return mftb(); 113 } 114 #else /* CONFIG_PPC64 */ 115 static inline u64 get_tb(void) 116 { 117 unsigned int tbhi, tblo, tbhi2; 118 119 do { 120 tbhi = get_tbu(); 121 tblo = get_tbl(); 122 tbhi2 = get_tbu(); 123 } while (tbhi != tbhi2); 124 125 return ((u64)tbhi << 32) | tblo; 126 } 127 #endif /* !CONFIG_PPC64 */ 128 129 static inline u64 get_tb_or_rtc(void) 130 { 131 return __USE_RTC() ? get_rtc() : get_tb(); 132 } 133 134 static inline void set_tb(unsigned int upper, unsigned int lower) 135 { 136 mtspr(SPRN_TBWL, 0); 137 mtspr(SPRN_TBWU, upper); 138 mtspr(SPRN_TBWL, lower); 139 } 140 141 /* Accessor functions for the decrementer register. 142 * The 4xx doesn't even have a decrementer. I tried to use the 143 * generic timer interrupt code, which seems OK, with the 4xx PIT 144 * in auto-reload mode. The problem is PIT stops counting when it 145 * hits zero. If it would wrap, we could use it just like a decrementer. 146 */ 147 static inline unsigned int get_dec(void) 148 { 149 #if defined(CONFIG_40x) 150 return (mfspr(SPRN_PIT)); 151 #else 152 return (mfspr(SPRN_DEC)); 153 #endif 154 } 155 156 /* 157 * Note: Book E and 4xx processors differ from other PowerPC processors 158 * in when the decrementer generates its interrupt: on the 1 to 0 159 * transition for Book E/4xx, but on the 0 to -1 transition for others. 160 */ 161 static inline void set_dec(int val) 162 { 163 #if defined(CONFIG_40x) 164 mtspr(SPRN_PIT, val); 165 #elif defined(CONFIG_8xx_CPU6) 166 set_dec_cpu6(val - 1); 167 #else 168 #ifndef CONFIG_BOOKE 169 --val; 170 #endif 171 #ifdef CONFIG_PPC_ISERIES 172 if (firmware_has_feature(FW_FEATURE_ISERIES) && 173 get_lppaca()->shared_proc) { 174 get_lppaca()->virtual_decr = val; 175 if (get_dec() > val) 176 HvCall_setVirtualDecr(); 177 return; 178 } 179 #endif 180 mtspr(SPRN_DEC, val); 181 #endif /* not 40x or 8xx_CPU6 */ 182 } 183 184 static inline unsigned long tb_ticks_since(unsigned long tstamp) 185 { 186 if (__USE_RTC()) { 187 int delta = get_rtcl() - (unsigned int) tstamp; 188 return delta < 0 ? delta + 1000000000 : delta; 189 } 190 return get_tbl() - tstamp; 191 } 192 193 #define mulhwu(x,y) \ 194 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 195 196 #ifdef CONFIG_PPC64 197 #define mulhdu(x,y) \ 198 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 199 #else 200 extern u64 mulhdu(u64, u64); 201 #endif 202 203 extern void div128_by_32(u64 dividend_high, u64 dividend_low, 204 unsigned divisor, struct div_result *dr); 205 206 /* Used to store Processor Utilization register (purr) values */ 207 208 struct cpu_usage { 209 u64 current_tb; /* Holds the current purr register values */ 210 }; 211 212 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); 213 214 #if defined(CONFIG_VIRT_CPU_ACCOUNTING) 215 extern void calculate_steal_time(void); 216 extern void snapshot_timebases(void); 217 #define account_process_vtime(tsk) account_process_tick(tsk, 0) 218 #else 219 #define calculate_steal_time() do { } while (0) 220 #define snapshot_timebases() do { } while (0) 221 #define account_process_vtime(tsk) do { } while (0) 222 #endif 223 224 extern void secondary_cpu_time_init(void); 225 extern void iSeries_time_init_early(void); 226 227 #endif /* __KERNEL__ */ 228 #endif /* __POWERPC_TIME_H */ 229