1 /* 2 * Common time prototypes and such for all ppc machines. 3 * 4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge 5 * Paul Mackerras' version and mine for PReP and Pmac. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #ifndef __POWERPC_TIME_H 14 #define __POWERPC_TIME_H 15 16 #ifdef __KERNEL__ 17 #include <linux/types.h> 18 #include <linux/percpu.h> 19 20 #include <asm/processor.h> 21 22 /* time.c */ 23 extern unsigned long tb_ticks_per_jiffy; 24 extern unsigned long tb_ticks_per_usec; 25 extern unsigned long tb_ticks_per_sec; 26 extern struct clock_event_device decrementer_clockevent; 27 28 struct rtc_time; 29 extern void to_tm(int tim, struct rtc_time * tm); 30 extern void tick_broadcast_ipi_handler(void); 31 32 extern void generic_calibrate_decr(void); 33 34 extern void set_dec_cpu6(unsigned int val); 35 36 /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 37 extern unsigned long ppc_proc_freq; 38 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 39 extern unsigned long ppc_tb_freq; 40 #define DEFAULT_TB_FREQ 125000000UL 41 42 struct div_result { 43 u64 result_high; 44 u64 result_low; 45 }; 46 47 /* Accessor functions for the timebase (RTC on 601) registers. */ 48 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ 49 #ifdef CONFIG_6xx 50 #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB)) 51 #else 52 #define __USE_RTC() 0 53 #endif 54 55 #ifdef CONFIG_PPC64 56 57 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ 58 #define get_tbl get_tb 59 60 #else 61 62 static inline unsigned long get_tbl(void) 63 { 64 #if defined(CONFIG_403GCX) 65 unsigned long tbl; 66 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); 67 return tbl; 68 #else 69 return mftbl(); 70 #endif 71 } 72 73 static inline unsigned int get_tbu(void) 74 { 75 #ifdef CONFIG_403GCX 76 unsigned int tbu; 77 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); 78 return tbu; 79 #else 80 return mftbu(); 81 #endif 82 } 83 #endif /* !CONFIG_PPC64 */ 84 85 static inline unsigned int get_rtcl(void) 86 { 87 unsigned int rtcl; 88 89 asm volatile("mfrtcl %0" : "=r" (rtcl)); 90 return rtcl; 91 } 92 93 static inline u64 get_rtc(void) 94 { 95 unsigned int hi, lo, hi2; 96 97 do { 98 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2" 99 : "=r" (hi), "=r" (lo), "=r" (hi2)); 100 } while (hi2 != hi); 101 return (u64)hi * 1000000000 + lo; 102 } 103 104 static inline u64 get_vtb(void) 105 { 106 #ifdef CONFIG_PPC_BOOK3S_64 107 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 108 return mfvtb(); 109 #endif 110 return 0; 111 } 112 113 #ifdef CONFIG_PPC64 114 static inline u64 get_tb(void) 115 { 116 return mftb(); 117 } 118 #else /* CONFIG_PPC64 */ 119 static inline u64 get_tb(void) 120 { 121 unsigned int tbhi, tblo, tbhi2; 122 123 do { 124 tbhi = get_tbu(); 125 tblo = get_tbl(); 126 tbhi2 = get_tbu(); 127 } while (tbhi != tbhi2); 128 129 return ((u64)tbhi << 32) | tblo; 130 } 131 #endif /* !CONFIG_PPC64 */ 132 133 static inline u64 get_tb_or_rtc(void) 134 { 135 return __USE_RTC() ? get_rtc() : get_tb(); 136 } 137 138 static inline void set_tb(unsigned int upper, unsigned int lower) 139 { 140 mtspr(SPRN_TBWL, 0); 141 mtspr(SPRN_TBWU, upper); 142 mtspr(SPRN_TBWL, lower); 143 } 144 145 /* Accessor functions for the decrementer register. 146 * The 4xx doesn't even have a decrementer. I tried to use the 147 * generic timer interrupt code, which seems OK, with the 4xx PIT 148 * in auto-reload mode. The problem is PIT stops counting when it 149 * hits zero. If it would wrap, we could use it just like a decrementer. 150 */ 151 static inline unsigned int get_dec(void) 152 { 153 #if defined(CONFIG_40x) 154 return (mfspr(SPRN_PIT)); 155 #else 156 return (mfspr(SPRN_DEC)); 157 #endif 158 } 159 160 /* 161 * Note: Book E and 4xx processors differ from other PowerPC processors 162 * in when the decrementer generates its interrupt: on the 1 to 0 163 * transition for Book E/4xx, but on the 0 to -1 transition for others. 164 */ 165 static inline void set_dec(int val) 166 { 167 #if defined(CONFIG_40x) 168 mtspr(SPRN_PIT, val); 169 #elif defined(CONFIG_8xx_CPU6) 170 set_dec_cpu6(val - 1); 171 #else 172 #ifndef CONFIG_BOOKE 173 --val; 174 #endif 175 mtspr(SPRN_DEC, val); 176 #endif /* not 40x or 8xx_CPU6 */ 177 } 178 179 static inline unsigned long tb_ticks_since(unsigned long tstamp) 180 { 181 if (__USE_RTC()) { 182 int delta = get_rtcl() - (unsigned int) tstamp; 183 return delta < 0 ? delta + 1000000000 : delta; 184 } 185 return get_tbl() - tstamp; 186 } 187 188 #define mulhwu(x,y) \ 189 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 190 191 #ifdef CONFIG_PPC64 192 #define mulhdu(x,y) \ 193 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 194 #else 195 extern u64 mulhdu(u64, u64); 196 #endif 197 198 extern void div128_by_32(u64 dividend_high, u64 dividend_low, 199 unsigned divisor, struct div_result *dr); 200 201 /* Used to store Processor Utilization register (purr) values */ 202 203 struct cpu_usage { 204 u64 current_tb; /* Holds the current purr register values */ 205 }; 206 207 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); 208 209 extern void secondary_cpu_time_init(void); 210 211 DECLARE_PER_CPU(u64, decrementers_next_tb); 212 213 /* Convert timebase ticks to nanoseconds */ 214 unsigned long long tb_to_ns(unsigned long long tb_ticks); 215 216 #endif /* __KERNEL__ */ 217 #endif /* __POWERPC_TIME_H */ 218