1 /* 2 * Common time prototypes and such for all ppc machines. 3 * 4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge 5 * Paul Mackerras' version and mine for PReP and Pmac. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #ifndef __POWERPC_TIME_H 14 #define __POWERPC_TIME_H 15 16 #ifdef __KERNEL__ 17 #include <linux/types.h> 18 #include <linux/percpu.h> 19 20 #include <asm/processor.h> 21 22 /* time.c */ 23 extern unsigned long tb_ticks_per_jiffy; 24 extern unsigned long tb_ticks_per_usec; 25 extern unsigned long tb_ticks_per_sec; 26 extern struct clock_event_device decrementer_clockevent; 27 28 struct rtc_time; 29 extern void to_tm(int tim, struct rtc_time * tm); 30 extern void GregorianDay(struct rtc_time *tm); 31 extern void tick_broadcast_ipi_handler(void); 32 33 extern void generic_calibrate_decr(void); 34 35 extern void set_dec_cpu6(unsigned int val); 36 37 /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 38 extern unsigned long ppc_proc_freq; 39 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) 40 extern unsigned long ppc_tb_freq; 41 #define DEFAULT_TB_FREQ 125000000UL 42 43 struct div_result { 44 u64 result_high; 45 u64 result_low; 46 }; 47 48 /* Accessor functions for the timebase (RTC on 601) registers. */ 49 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ 50 #ifdef CONFIG_6xx 51 #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB)) 52 #else 53 #define __USE_RTC() 0 54 #endif 55 56 #ifdef CONFIG_PPC64 57 58 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ 59 #define get_tbl get_tb 60 61 #else 62 63 static inline unsigned long get_tbl(void) 64 { 65 #if defined(CONFIG_403GCX) 66 unsigned long tbl; 67 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); 68 return tbl; 69 #else 70 return mftbl(); 71 #endif 72 } 73 74 static inline unsigned int get_tbu(void) 75 { 76 #ifdef CONFIG_403GCX 77 unsigned int tbu; 78 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); 79 return tbu; 80 #else 81 return mftbu(); 82 #endif 83 } 84 #endif /* !CONFIG_PPC64 */ 85 86 static inline unsigned int get_rtcl(void) 87 { 88 unsigned int rtcl; 89 90 asm volatile("mfrtcl %0" : "=r" (rtcl)); 91 return rtcl; 92 } 93 94 static inline u64 get_rtc(void) 95 { 96 unsigned int hi, lo, hi2; 97 98 do { 99 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2" 100 : "=r" (hi), "=r" (lo), "=r" (hi2)); 101 } while (hi2 != hi); 102 return (u64)hi * 1000000000 + lo; 103 } 104 105 #ifdef CONFIG_PPC64 106 static inline u64 get_tb(void) 107 { 108 return mftb(); 109 } 110 #else /* CONFIG_PPC64 */ 111 static inline u64 get_tb(void) 112 { 113 unsigned int tbhi, tblo, tbhi2; 114 115 do { 116 tbhi = get_tbu(); 117 tblo = get_tbl(); 118 tbhi2 = get_tbu(); 119 } while (tbhi != tbhi2); 120 121 return ((u64)tbhi << 32) | tblo; 122 } 123 #endif /* !CONFIG_PPC64 */ 124 125 static inline u64 get_tb_or_rtc(void) 126 { 127 return __USE_RTC() ? get_rtc() : get_tb(); 128 } 129 130 static inline void set_tb(unsigned int upper, unsigned int lower) 131 { 132 mtspr(SPRN_TBWL, 0); 133 mtspr(SPRN_TBWU, upper); 134 mtspr(SPRN_TBWL, lower); 135 } 136 137 /* Accessor functions for the decrementer register. 138 * The 4xx doesn't even have a decrementer. I tried to use the 139 * generic timer interrupt code, which seems OK, with the 4xx PIT 140 * in auto-reload mode. The problem is PIT stops counting when it 141 * hits zero. If it would wrap, we could use it just like a decrementer. 142 */ 143 static inline unsigned int get_dec(void) 144 { 145 #if defined(CONFIG_40x) 146 return (mfspr(SPRN_PIT)); 147 #else 148 return (mfspr(SPRN_DEC)); 149 #endif 150 } 151 152 /* 153 * Note: Book E and 4xx processors differ from other PowerPC processors 154 * in when the decrementer generates its interrupt: on the 1 to 0 155 * transition for Book E/4xx, but on the 0 to -1 transition for others. 156 */ 157 static inline void set_dec(int val) 158 { 159 #if defined(CONFIG_40x) 160 mtspr(SPRN_PIT, val); 161 #elif defined(CONFIG_8xx_CPU6) 162 set_dec_cpu6(val - 1); 163 #else 164 #ifndef CONFIG_BOOKE 165 --val; 166 #endif 167 mtspr(SPRN_DEC, val); 168 #endif /* not 40x or 8xx_CPU6 */ 169 } 170 171 static inline unsigned long tb_ticks_since(unsigned long tstamp) 172 { 173 if (__USE_RTC()) { 174 int delta = get_rtcl() - (unsigned int) tstamp; 175 return delta < 0 ? delta + 1000000000 : delta; 176 } 177 return get_tbl() - tstamp; 178 } 179 180 #define mulhwu(x,y) \ 181 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 182 183 #ifdef CONFIG_PPC64 184 #define mulhdu(x,y) \ 185 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) 186 #else 187 extern u64 mulhdu(u64, u64); 188 #endif 189 190 extern void div128_by_32(u64 dividend_high, u64 dividend_low, 191 unsigned divisor, struct div_result *dr); 192 193 /* Used to store Processor Utilization register (purr) values */ 194 195 struct cpu_usage { 196 u64 current_tb; /* Holds the current purr register values */ 197 }; 198 199 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); 200 201 extern void secondary_cpu_time_init(void); 202 203 DECLARE_PER_CPU(u64, decrementers_next_tb); 204 205 #endif /* __KERNEL__ */ 206 #endif /* __POWERPC_TIME_H */ 207