1b8b572e1SStephen Rothwell /* 2b8b572e1SStephen Rothwell * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM 3b8b572e1SStephen Rothwell * 4b8b572e1SStephen Rothwell * This program is free software; you can redistribute it and/or 5b8b572e1SStephen Rothwell * modify it under the terms of the GNU General Public License 6b8b572e1SStephen Rothwell * as published by the Free Software Foundation; either version 7b8b572e1SStephen Rothwell * 2 of the License, or (at your option) any later version. 8b8b572e1SStephen Rothwell */ 9b8b572e1SStephen Rothwell 10b8b572e1SStephen Rothwell struct pt_regs; 11b8b572e1SStephen Rothwell 12b8b572e1SStephen Rothwell /* 13b8b572e1SStephen Rothwell * We don't allow single-stepping an mtmsrd that would clear 14b8b572e1SStephen Rothwell * MSR_RI, since that would make the exception unrecoverable. 15b8b572e1SStephen Rothwell * Since we need to single-step to proceed from a breakpoint, 16b8b572e1SStephen Rothwell * we don't allow putting a breakpoint on an mtmsrd instruction. 17b8b572e1SStephen Rothwell * Similarly we don't allow breakpoints on rfid instructions. 18b8b572e1SStephen Rothwell * These macros tell us if an instruction is a mtmsrd or rfid. 19b8b572e1SStephen Rothwell * Note that IS_MTMSRD returns true for both an mtmsr (32-bit) 20b8b572e1SStephen Rothwell * and an mtmsrd (64-bit). 21b8b572e1SStephen Rothwell */ 22b8b572e1SStephen Rothwell #define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124) 23b8b572e1SStephen Rothwell #define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) 24b8b572e1SStephen Rothwell #define IS_RFI(instr) (((instr) & 0xfc0007fe) == 0x4c000064) 25b8b572e1SStephen Rothwell 26b8b572e1SStephen Rothwell /* Emulate instructions that cause a transfer of control. */ 27b8b572e1SStephen Rothwell extern int emulate_step(struct pt_regs *regs, unsigned int instr); 28be96f633SPaul Mackerras 29be96f633SPaul Mackerras enum instruction_type { 30be96f633SPaul Mackerras COMPUTE, /* arith/logical/CR op, etc. */ 31be96f633SPaul Mackerras LOAD, 32be96f633SPaul Mackerras LOAD_MULTI, 33be96f633SPaul Mackerras LOAD_FP, 34be96f633SPaul Mackerras LOAD_VMX, 35be96f633SPaul Mackerras LOAD_VSX, 36be96f633SPaul Mackerras STORE, 37be96f633SPaul Mackerras STORE_MULTI, 38be96f633SPaul Mackerras STORE_FP, 39be96f633SPaul Mackerras STORE_VMX, 40be96f633SPaul Mackerras STORE_VSX, 41be96f633SPaul Mackerras LARX, 42be96f633SPaul Mackerras STCX, 43be96f633SPaul Mackerras BRANCH, 44be96f633SPaul Mackerras MFSPR, 45be96f633SPaul Mackerras MTSPR, 46be96f633SPaul Mackerras CACHEOP, 47be96f633SPaul Mackerras BARRIER, 48be96f633SPaul Mackerras SYSCALL, 49be96f633SPaul Mackerras MFMSR, 50be96f633SPaul Mackerras MTMSR, 51be96f633SPaul Mackerras RFI, 52be96f633SPaul Mackerras INTERRUPT, 53be96f633SPaul Mackerras UNKNOWN 54be96f633SPaul Mackerras }; 55be96f633SPaul Mackerras 56be96f633SPaul Mackerras #define INSTR_TYPE_MASK 0x1f 57be96f633SPaul Mackerras 58be96f633SPaul Mackerras /* Load/store flags, ORed in with type */ 59be96f633SPaul Mackerras #define SIGNEXT 0x20 60be96f633SPaul Mackerras #define UPDATE 0x40 /* matches bit in opcode 31 instructions */ 61be96f633SPaul Mackerras #define BYTEREV 0x80 62be96f633SPaul Mackerras 63be96f633SPaul Mackerras /* Cacheop values, ORed in with type */ 64be96f633SPaul Mackerras #define CACHEOP_MASK 0x700 65be96f633SPaul Mackerras #define DCBST 0 66be96f633SPaul Mackerras #define DCBF 0x100 67be96f633SPaul Mackerras #define DCBTST 0x200 68be96f633SPaul Mackerras #define DCBT 0x300 69*cf87c3f6SPaul Mackerras #define ICBI 0x400 70be96f633SPaul Mackerras 71be96f633SPaul Mackerras /* Size field in type word */ 72be96f633SPaul Mackerras #define SIZE(n) ((n) << 8) 73be96f633SPaul Mackerras #define GETSIZE(w) ((w) >> 8) 74be96f633SPaul Mackerras 75be96f633SPaul Mackerras #define MKOP(t, f, s) ((t) | (f) | SIZE(s)) 76be96f633SPaul Mackerras 77be96f633SPaul Mackerras struct instruction_op { 78be96f633SPaul Mackerras int type; 79be96f633SPaul Mackerras int reg; 80be96f633SPaul Mackerras unsigned long val; 81be96f633SPaul Mackerras /* For LOAD/STORE/LARX/STCX */ 82be96f633SPaul Mackerras unsigned long ea; 83be96f633SPaul Mackerras int update_reg; 84be96f633SPaul Mackerras /* For MFSPR */ 85be96f633SPaul Mackerras int spr; 86be96f633SPaul Mackerras }; 87be96f633SPaul Mackerras 88be96f633SPaul Mackerras extern int analyse_instr(struct instruction_op *op, struct pt_regs *regs, 89be96f633SPaul Mackerras unsigned int instr); 90