1 /* 2 * smp.h: PowerPC-specific SMP code. 3 * 4 * Original was a copy of sparc smp.h. Now heavily modified 5 * for PPC. 6 * 7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com> 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 13 * 2 of the License, or (at your option) any later version. 14 */ 15 16 #ifndef _ASM_POWERPC_SMP_H 17 #define _ASM_POWERPC_SMP_H 18 #ifdef __KERNEL__ 19 20 #include <linux/threads.h> 21 #include <linux/cpumask.h> 22 #include <linux/kernel.h> 23 #include <linux/irqreturn.h> 24 25 #ifndef __ASSEMBLY__ 26 27 #ifdef CONFIG_PPC64 28 #include <asm/paca.h> 29 #endif 30 #include <asm/percpu.h> 31 32 extern int boot_cpuid; 33 extern int spinning_secondaries; 34 extern u32 *cpu_to_phys_id; 35 36 extern void cpu_die(void); 37 extern int cpu_to_chip_id(int cpu); 38 39 #ifdef CONFIG_SMP 40 41 struct smp_ops_t { 42 void (*message_pass)(int cpu, int msg); 43 #ifdef CONFIG_PPC_SMP_MUXED_IPI 44 void (*cause_ipi)(int cpu); 45 #endif 46 int (*cause_nmi_ipi)(int cpu); 47 void (*probe)(void); 48 int (*kick_cpu)(int nr); 49 int (*prepare_cpu)(int nr); 50 void (*setup_cpu)(int nr); 51 void (*bringup_done)(void); 52 void (*take_timebase)(void); 53 void (*give_timebase)(void); 54 int (*cpu_disable)(void); 55 void (*cpu_die)(unsigned int nr); 56 int (*cpu_bootable)(unsigned int nr); 57 }; 58 59 extern void smp_flush_nmi_ipi(u64 delay_us); 60 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us); 61 extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us); 62 extern void smp_send_debugger_break(void); 63 extern void start_secondary_resume(void); 64 extern void smp_generic_give_timebase(void); 65 extern void smp_generic_take_timebase(void); 66 67 DECLARE_PER_CPU(unsigned int, cpu_pvr); 68 69 #ifdef CONFIG_HOTPLUG_CPU 70 int generic_cpu_disable(void); 71 void generic_cpu_die(unsigned int cpu); 72 void generic_set_cpu_dead(unsigned int cpu); 73 void generic_set_cpu_up(unsigned int cpu); 74 int generic_check_cpu_restart(unsigned int cpu); 75 int is_cpu_dead(unsigned int cpu); 76 #else 77 #define generic_set_cpu_up(i) do { } while (0) 78 #endif 79 80 #ifdef CONFIG_PPC64 81 #define raw_smp_processor_id() (local_paca->paca_index) 82 #define hard_smp_processor_id() (get_paca()->hw_cpu_id) 83 #else 84 /* 32-bit */ 85 extern int smp_hw_index[]; 86 87 #define raw_smp_processor_id() (current_thread_info()->cpu) 88 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 89 90 static inline int get_hard_smp_processor_id(int cpu) 91 { 92 return smp_hw_index[cpu]; 93 } 94 95 static inline void set_hard_smp_processor_id(int cpu, int phys) 96 { 97 smp_hw_index[cpu] = phys; 98 } 99 #endif 100 101 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); 102 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map); 103 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); 104 105 static inline struct cpumask *cpu_sibling_mask(int cpu) 106 { 107 return per_cpu(cpu_sibling_map, cpu); 108 } 109 110 static inline struct cpumask *cpu_core_mask(int cpu) 111 { 112 return per_cpu(cpu_core_map, cpu); 113 } 114 115 static inline struct cpumask *cpu_l2_cache_mask(int cpu) 116 { 117 return per_cpu(cpu_l2_cache_map, cpu); 118 } 119 120 extern int cpu_to_core_id(int cpu); 121 122 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. 123 * 124 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up 125 * in /proc/interrupts will be wrong!!! --Troy */ 126 #define PPC_MSG_CALL_FUNCTION 0 127 #define PPC_MSG_RESCHEDULE 1 128 #define PPC_MSG_TICK_BROADCAST 2 129 #define PPC_MSG_NMI_IPI 3 130 131 /* This is only used by the powernv kernel */ 132 #define PPC_MSG_RM_HOST_ACTION 4 133 134 #define NMI_IPI_ALL_OTHERS -2 135 136 #ifdef CONFIG_NMI_IPI 137 extern int smp_handle_nmi_ipi(struct pt_regs *regs); 138 #else 139 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; } 140 #endif 141 142 /* for irq controllers that have dedicated ipis per message (4) */ 143 extern int smp_request_message_ipi(int virq, int message); 144 extern const char *smp_ipi_name[]; 145 146 /* for irq controllers with only a single ipi */ 147 extern void smp_muxed_ipi_message_pass(int cpu, int msg); 148 extern void smp_muxed_ipi_set_message(int cpu, int msg); 149 extern irqreturn_t smp_ipi_demux(void); 150 extern irqreturn_t smp_ipi_demux_relaxed(void); 151 152 void smp_init_pSeries(void); 153 void smp_init_cell(void); 154 void smp_setup_cpu_maps(void); 155 156 extern int __cpu_disable(void); 157 extern void __cpu_die(unsigned int cpu); 158 159 #else 160 /* for UP */ 161 #define hard_smp_processor_id() get_hard_smp_processor_id(0) 162 #define smp_setup_cpu_maps() 163 static inline void inhibit_secondary_onlining(void) {} 164 static inline void uninhibit_secondary_onlining(void) {} 165 static inline const struct cpumask *cpu_sibling_mask(int cpu) 166 { 167 return cpumask_of(cpu); 168 } 169 170 #endif /* CONFIG_SMP */ 171 172 #ifdef CONFIG_PPC64 173 static inline int get_hard_smp_processor_id(int cpu) 174 { 175 return paca_ptrs[cpu]->hw_cpu_id; 176 } 177 178 static inline void set_hard_smp_processor_id(int cpu, int phys) 179 { 180 paca_ptrs[cpu]->hw_cpu_id = phys; 181 } 182 #else 183 /* 32-bit */ 184 #ifndef CONFIG_SMP 185 extern int boot_cpuid_phys; 186 static inline int get_hard_smp_processor_id(int cpu) 187 { 188 return boot_cpuid_phys; 189 } 190 191 static inline void set_hard_smp_processor_id(int cpu, int phys) 192 { 193 boot_cpuid_phys = phys; 194 } 195 #endif /* !CONFIG_SMP */ 196 #endif /* !CONFIG_PPC64 */ 197 198 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE)) 199 extern void smp_release_cpus(void); 200 #else 201 static inline void smp_release_cpus(void) { }; 202 #endif 203 204 extern int smt_enabled_at_boot; 205 206 extern void smp_mpic_probe(void); 207 extern void smp_mpic_setup_cpu(int cpu); 208 extern int smp_generic_kick_cpu(int nr); 209 extern int smp_generic_cpu_bootable(unsigned int nr); 210 211 212 extern void smp_generic_give_timebase(void); 213 extern void smp_generic_take_timebase(void); 214 215 extern struct smp_ops_t *smp_ops; 216 217 extern void arch_send_call_function_single_ipi(int cpu); 218 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 219 220 /* Definitions relative to the secondary CPU spin loop 221 * and entry point. Not all of them exist on both 32 and 222 * 64-bit but defining them all here doesn't harm 223 */ 224 extern void generic_secondary_smp_init(void); 225 extern void generic_secondary_thread_init(void); 226 extern unsigned long __secondary_hold_spinloop; 227 extern unsigned long __secondary_hold_acknowledge; 228 extern char __secondary_hold; 229 extern unsigned int booting_thread_hwid; 230 231 extern void __early_start(void); 232 #endif /* __ASSEMBLY__ */ 233 234 #endif /* __KERNEL__ */ 235 #endif /* _ASM_POWERPC_SMP_H) */ 236