xref: /linux/arch/powerpc/include/asm/ps3.h (revision b762666cc7c9f83ac5759127c29dfad438c09e48)
1 /*
2  *  PS3 platform declarations.
3  *
4  *  Copyright (C) 2006 Sony Computer Entertainment Inc.
5  *  Copyright 2006 Sony Corp.
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License as published by
9  *  the Free Software Foundation; version 2 of the License.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 
21 #if !defined(_ASM_POWERPC_PS3_H)
22 #define _ASM_POWERPC_PS3_H
23 
24 #include <linux/init.h>
25 #include <linux/types.h>
26 #include <linux/device.h>
27 #include "cell-pmu.h"
28 
29 union ps3_firmware_version {
30 	u64 raw;
31 	struct {
32 		u16 pad;
33 		u16 major;
34 		u16 minor;
35 		u16 rev;
36 	};
37 };
38 
39 void ps3_get_firmware_version(union ps3_firmware_version *v);
40 int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev);
41 
42 /* 'Other OS' area */
43 
44 enum ps3_param_av_multi_out {
45 	PS3_PARAM_AV_MULTI_OUT_NTSC = 0,
46 	PS3_PARAM_AV_MULTI_OUT_PAL_RGB = 1,
47 	PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR = 2,
48 	PS3_PARAM_AV_MULTI_OUT_SECAM = 3,
49 };
50 
51 enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void);
52 
53 /* dma routines */
54 
55 enum ps3_dma_page_size {
56 	PS3_DMA_4K = 12U,
57 	PS3_DMA_64K = 16U,
58 	PS3_DMA_1M = 20U,
59 	PS3_DMA_16M = 24U,
60 };
61 
62 enum ps3_dma_region_type {
63 	PS3_DMA_OTHER = 0,
64 	PS3_DMA_INTERNAL = 2,
65 };
66 
67 struct ps3_dma_region_ops;
68 
69 /**
70  * struct ps3_dma_region - A per device dma state variables structure
71  * @did: The HV device id.
72  * @page_size: The ioc pagesize.
73  * @region_type: The HV region type.
74  * @bus_addr: The 'translated' bus address of the region.
75  * @len: The length in bytes of the region.
76  * @offset: The offset from the start of memory of the region.
77  * @ioid: The IOID of the device who owns this region
78  * @chunk_list: Opaque variable used by the ioc page manager.
79  * @region_ops: struct ps3_dma_region_ops - dma region operations
80  */
81 
82 struct ps3_dma_region {
83 	struct ps3_system_bus_device *dev;
84 	/* device variables */
85 	const struct ps3_dma_region_ops *region_ops;
86 	unsigned char ioid;
87 	enum ps3_dma_page_size page_size;
88 	enum ps3_dma_region_type region_type;
89 	unsigned long len;
90 	unsigned long offset;
91 
92 	/* driver variables  (set by ps3_dma_region_create) */
93 	unsigned long bus_addr;
94 	struct {
95 		spinlock_t lock;
96 		struct list_head head;
97 	} chunk_list;
98 };
99 
100 struct ps3_dma_region_ops {
101 	int (*create)(struct ps3_dma_region *);
102 	int (*free)(struct ps3_dma_region *);
103 	int (*map)(struct ps3_dma_region *,
104 		   unsigned long virt_addr,
105 		   unsigned long len,
106 		   dma_addr_t *bus_addr,
107 		   u64 iopte_pp);
108 	int (*unmap)(struct ps3_dma_region *,
109 		     dma_addr_t bus_addr,
110 		     unsigned long len);
111 };
112 /**
113  * struct ps3_dma_region_init - Helper to initialize structure variables
114  *
115  * Helper to properly initialize variables prior to calling
116  * ps3_system_bus_device_register.
117  */
118 
119 struct ps3_system_bus_device;
120 
121 int ps3_dma_region_init(struct ps3_system_bus_device *dev,
122 	struct ps3_dma_region *r, enum ps3_dma_page_size page_size,
123 	enum ps3_dma_region_type region_type, void *addr, unsigned long len);
124 int ps3_dma_region_create(struct ps3_dma_region *r);
125 int ps3_dma_region_free(struct ps3_dma_region *r);
126 int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr,
127 	unsigned long len, dma_addr_t *bus_addr,
128 	u64 iopte_pp);
129 int ps3_dma_unmap(struct ps3_dma_region *r, dma_addr_t bus_addr,
130 	unsigned long len);
131 
132 /* mmio routines */
133 
134 enum ps3_mmio_page_size {
135 	PS3_MMIO_4K = 12U,
136 	PS3_MMIO_64K = 16U
137 };
138 
139 struct ps3_mmio_region_ops;
140 /**
141  * struct ps3_mmio_region - a per device mmio state variables structure
142  *
143  * Current systems can be supported with a single region per device.
144  */
145 
146 struct ps3_mmio_region {
147 	struct ps3_system_bus_device *dev;
148 	const struct ps3_mmio_region_ops *mmio_ops;
149 	unsigned long bus_addr;
150 	unsigned long len;
151 	enum ps3_mmio_page_size page_size;
152 	unsigned long lpar_addr;
153 };
154 
155 struct ps3_mmio_region_ops {
156 	int (*create)(struct ps3_mmio_region *);
157 	int (*free)(struct ps3_mmio_region *);
158 };
159 /**
160  * struct ps3_mmio_region_init - Helper to initialize structure variables
161  *
162  * Helper to properly initialize variables prior to calling
163  * ps3_system_bus_device_register.
164  */
165 
166 int ps3_mmio_region_init(struct ps3_system_bus_device *dev,
167 	struct ps3_mmio_region *r, unsigned long bus_addr, unsigned long len,
168 	enum ps3_mmio_page_size page_size);
169 int ps3_mmio_region_create(struct ps3_mmio_region *r);
170 int ps3_free_mmio_region(struct ps3_mmio_region *r);
171 unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr);
172 
173 /* inrerrupt routines */
174 
175 enum ps3_cpu_binding {
176 	PS3_BINDING_CPU_ANY = -1,
177 	PS3_BINDING_CPU_0 = 0,
178 	PS3_BINDING_CPU_1 = 1,
179 };
180 
181 int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
182 	unsigned int *virq);
183 int ps3_irq_plug_destroy(unsigned int virq);
184 int ps3_event_receive_port_setup(enum ps3_cpu_binding cpu, unsigned int *virq);
185 int ps3_event_receive_port_destroy(unsigned int virq);
186 int ps3_send_event_locally(unsigned int virq);
187 
188 int ps3_io_irq_setup(enum ps3_cpu_binding cpu, unsigned int interrupt_id,
189 	unsigned int *virq);
190 int ps3_io_irq_destroy(unsigned int virq);
191 int ps3_vuart_irq_setup(enum ps3_cpu_binding cpu, void* virt_addr_bmp,
192 	unsigned int *virq);
193 int ps3_vuart_irq_destroy(unsigned int virq);
194 int ps3_spe_irq_setup(enum ps3_cpu_binding cpu, unsigned long spe_id,
195 	unsigned int class, unsigned int *virq);
196 int ps3_spe_irq_destroy(unsigned int virq);
197 
198 int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev,
199 	enum ps3_cpu_binding cpu, unsigned int *virq);
200 int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev,
201 	unsigned int virq);
202 
203 /* lv1 result codes */
204 
205 enum lv1_result {
206 	LV1_SUCCESS                     = 0,
207 	/* not used                       -1 */
208 	LV1_RESOURCE_SHORTAGE           = -2,
209 	LV1_NO_PRIVILEGE                = -3,
210 	LV1_DENIED_BY_POLICY            = -4,
211 	LV1_ACCESS_VIOLATION            = -5,
212 	LV1_NO_ENTRY                    = -6,
213 	LV1_DUPLICATE_ENTRY             = -7,
214 	LV1_TYPE_MISMATCH               = -8,
215 	LV1_BUSY                        = -9,
216 	LV1_EMPTY                       = -10,
217 	LV1_WRONG_STATE                 = -11,
218 	/* not used                       -12 */
219 	LV1_NO_MATCH                    = -13,
220 	LV1_ALREADY_CONNECTED           = -14,
221 	LV1_UNSUPPORTED_PARAMETER_VALUE = -15,
222 	LV1_CONDITION_NOT_SATISFIED     = -16,
223 	LV1_ILLEGAL_PARAMETER_VALUE     = -17,
224 	LV1_BAD_OPTION                  = -18,
225 	LV1_IMPLEMENTATION_LIMITATION   = -19,
226 	LV1_NOT_IMPLEMENTED             = -20,
227 	LV1_INVALID_CLASS_ID            = -21,
228 	LV1_CONSTRAINT_NOT_SATISFIED    = -22,
229 	LV1_ALIGNMENT_ERROR             = -23,
230 	LV1_HARDWARE_ERROR              = -24,
231 	LV1_INVALID_DATA_FORMAT         = -25,
232 	LV1_INVALID_OPERATION           = -26,
233 	LV1_INTERNAL_ERROR              = -32768,
234 };
235 
236 static inline const char* ps3_result(int result)
237 {
238 #if defined(DEBUG)
239 	switch (result) {
240 	case LV1_SUCCESS:
241 		return "LV1_SUCCESS (0)";
242 	case -1:
243 		return "** unknown result ** (-1)";
244 	case LV1_RESOURCE_SHORTAGE:
245 		return "LV1_RESOURCE_SHORTAGE (-2)";
246 	case LV1_NO_PRIVILEGE:
247 		return "LV1_NO_PRIVILEGE (-3)";
248 	case LV1_DENIED_BY_POLICY:
249 		return "LV1_DENIED_BY_POLICY (-4)";
250 	case LV1_ACCESS_VIOLATION:
251 		return "LV1_ACCESS_VIOLATION (-5)";
252 	case LV1_NO_ENTRY:
253 		return "LV1_NO_ENTRY (-6)";
254 	case LV1_DUPLICATE_ENTRY:
255 		return "LV1_DUPLICATE_ENTRY (-7)";
256 	case LV1_TYPE_MISMATCH:
257 		return "LV1_TYPE_MISMATCH (-8)";
258 	case LV1_BUSY:
259 		return "LV1_BUSY (-9)";
260 	case LV1_EMPTY:
261 		return "LV1_EMPTY (-10)";
262 	case LV1_WRONG_STATE:
263 		return "LV1_WRONG_STATE (-11)";
264 	case -12:
265 		return "** unknown result ** (-12)";
266 	case LV1_NO_MATCH:
267 		return "LV1_NO_MATCH (-13)";
268 	case LV1_ALREADY_CONNECTED:
269 		return "LV1_ALREADY_CONNECTED (-14)";
270 	case LV1_UNSUPPORTED_PARAMETER_VALUE:
271 		return "LV1_UNSUPPORTED_PARAMETER_VALUE (-15)";
272 	case LV1_CONDITION_NOT_SATISFIED:
273 		return "LV1_CONDITION_NOT_SATISFIED (-16)";
274 	case LV1_ILLEGAL_PARAMETER_VALUE:
275 		return "LV1_ILLEGAL_PARAMETER_VALUE (-17)";
276 	case LV1_BAD_OPTION:
277 		return "LV1_BAD_OPTION (-18)";
278 	case LV1_IMPLEMENTATION_LIMITATION:
279 		return "LV1_IMPLEMENTATION_LIMITATION (-19)";
280 	case LV1_NOT_IMPLEMENTED:
281 		return "LV1_NOT_IMPLEMENTED (-20)";
282 	case LV1_INVALID_CLASS_ID:
283 		return "LV1_INVALID_CLASS_ID (-21)";
284 	case LV1_CONSTRAINT_NOT_SATISFIED:
285 		return "LV1_CONSTRAINT_NOT_SATISFIED (-22)";
286 	case LV1_ALIGNMENT_ERROR:
287 		return "LV1_ALIGNMENT_ERROR (-23)";
288 	case LV1_HARDWARE_ERROR:
289 		return "LV1_HARDWARE_ERROR (-24)";
290 	case LV1_INVALID_DATA_FORMAT:
291 		return "LV1_INVALID_DATA_FORMAT (-25)";
292 	case LV1_INVALID_OPERATION:
293 		return "LV1_INVALID_OPERATION (-26)";
294 	case LV1_INTERNAL_ERROR:
295 		return "LV1_INTERNAL_ERROR (-32768)";
296 	default:
297 		BUG();
298 		return "** unknown result **";
299 	};
300 #else
301 	return "";
302 #endif
303 }
304 
305 /* system bus routines */
306 
307 enum ps3_match_id {
308 	PS3_MATCH_ID_EHCI		= 1,
309 	PS3_MATCH_ID_OHCI		= 2,
310 	PS3_MATCH_ID_GELIC		= 3,
311 	PS3_MATCH_ID_AV_SETTINGS	= 4,
312 	PS3_MATCH_ID_SYSTEM_MANAGER	= 5,
313 	PS3_MATCH_ID_STOR_DISK		= 6,
314 	PS3_MATCH_ID_STOR_ROM		= 7,
315 	PS3_MATCH_ID_STOR_FLASH		= 8,
316 	PS3_MATCH_ID_SOUND		= 9,
317 	PS3_MATCH_ID_GPU		= 10,
318 	PS3_MATCH_ID_LPM		= 11,
319 };
320 
321 enum ps3_match_sub_id {
322 	PS3_MATCH_SUB_ID_GPU_FB		= 1,
323 	PS3_MATCH_SUB_ID_GPU_RAMDISK	= 2,
324 };
325 
326 #define PS3_MODULE_ALIAS_EHCI		"ps3:1:0"
327 #define PS3_MODULE_ALIAS_OHCI		"ps3:2:0"
328 #define PS3_MODULE_ALIAS_GELIC		"ps3:3:0"
329 #define PS3_MODULE_ALIAS_AV_SETTINGS	"ps3:4:0"
330 #define PS3_MODULE_ALIAS_SYSTEM_MANAGER	"ps3:5:0"
331 #define PS3_MODULE_ALIAS_STOR_DISK	"ps3:6:0"
332 #define PS3_MODULE_ALIAS_STOR_ROM	"ps3:7:0"
333 #define PS3_MODULE_ALIAS_STOR_FLASH	"ps3:8:0"
334 #define PS3_MODULE_ALIAS_SOUND		"ps3:9:0"
335 #define PS3_MODULE_ALIAS_GPU_FB		"ps3:10:1"
336 #define PS3_MODULE_ALIAS_GPU_RAMDISK	"ps3:10:2"
337 #define PS3_MODULE_ALIAS_LPM		"ps3:11:0"
338 
339 enum ps3_system_bus_device_type {
340 	PS3_DEVICE_TYPE_IOC0 = 1,
341 	PS3_DEVICE_TYPE_SB,
342 	PS3_DEVICE_TYPE_VUART,
343 	PS3_DEVICE_TYPE_LPM,
344 };
345 
346 /**
347  * struct ps3_system_bus_device - a device on the system bus
348  */
349 
350 struct ps3_system_bus_device {
351 	enum ps3_match_id match_id;
352 	enum ps3_match_sub_id match_sub_id;
353 	enum ps3_system_bus_device_type dev_type;
354 
355 	u64 bus_id;                       /* SB */
356 	u64 dev_id;                       /* SB */
357 	unsigned int interrupt_id;        /* SB */
358 	struct ps3_dma_region *d_region;  /* SB, IOC0 */
359 	struct ps3_mmio_region *m_region; /* SB, IOC0*/
360 	unsigned int port_number;         /* VUART */
361 	struct {                          /* LPM */
362 		u64 node_id;
363 		u64 pu_id;
364 		u64 rights;
365 	} lpm;
366 
367 /*	struct iommu_table *iommu_table; -- waiting for BenH's cleanups */
368 	struct device core;
369 	void *driver_priv; /* private driver variables */
370 };
371 
372 int ps3_open_hv_device(struct ps3_system_bus_device *dev);
373 int ps3_close_hv_device(struct ps3_system_bus_device *dev);
374 
375 /**
376  * struct ps3_system_bus_driver - a driver for a device on the system bus
377  */
378 
379 struct ps3_system_bus_driver {
380 	enum ps3_match_id match_id;
381 	enum ps3_match_sub_id match_sub_id;
382 	struct device_driver core;
383 	int (*probe)(struct ps3_system_bus_device *);
384 	int (*remove)(struct ps3_system_bus_device *);
385 	int (*shutdown)(struct ps3_system_bus_device *);
386 /*	int (*suspend)(struct ps3_system_bus_device *, pm_message_t); */
387 /*	int (*resume)(struct ps3_system_bus_device *); */
388 };
389 
390 int ps3_system_bus_device_register(struct ps3_system_bus_device *dev);
391 int ps3_system_bus_driver_register(struct ps3_system_bus_driver *drv);
392 void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver *drv);
393 
394 static inline struct ps3_system_bus_driver *ps3_drv_to_system_bus_drv(
395 	struct device_driver *_drv)
396 {
397 	return container_of(_drv, struct ps3_system_bus_driver, core);
398 }
399 static inline struct ps3_system_bus_device *ps3_dev_to_system_bus_dev(
400 	struct device *_dev)
401 {
402 	return container_of(_dev, struct ps3_system_bus_device, core);
403 }
404 static inline struct ps3_system_bus_driver *
405 	ps3_system_bus_dev_to_system_bus_drv(struct ps3_system_bus_device *_dev)
406 {
407 	BUG_ON(!_dev);
408 	BUG_ON(!_dev->core.driver);
409 	return ps3_drv_to_system_bus_drv(_dev->core.driver);
410 }
411 
412 /**
413  * ps3_system_bus_set_drvdata -
414  * @dev: device structure
415  * @data: Data to set
416  */
417 
418 static inline void ps3_system_bus_set_driver_data(
419 	struct ps3_system_bus_device *dev, void *data)
420 {
421 	dev->core.driver_data = data;
422 }
423 static inline void *ps3_system_bus_get_driver_data(
424 	struct ps3_system_bus_device *dev)
425 {
426 	return dev->core.driver_data;
427 }
428 
429 /* These two need global scope for get_dma_ops(). */
430 
431 extern struct bus_type ps3_system_bus_type;
432 
433 /* system manager */
434 
435 struct ps3_sys_manager_ops {
436 	struct ps3_system_bus_device *dev;
437 	void (*power_off)(struct ps3_system_bus_device *dev);
438 	void (*restart)(struct ps3_system_bus_device *dev);
439 };
440 
441 void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops);
442 void __noreturn ps3_sys_manager_power_off(void);
443 void __noreturn ps3_sys_manager_restart(void);
444 void __noreturn ps3_sys_manager_halt(void);
445 int ps3_sys_manager_get_wol(void);
446 void ps3_sys_manager_set_wol(int state);
447 
448 struct ps3_prealloc {
449     const char *name;
450     void *address;
451     unsigned long size;
452     unsigned long align;
453 };
454 
455 extern struct ps3_prealloc ps3fb_videomemory;
456 extern struct ps3_prealloc ps3flash_bounce_buffer;
457 
458 /* logical performance monitor */
459 
460 /**
461  * enum ps3_lpm_rights - Rigths granted by the system policy module.
462  *
463  * @PS3_LPM_RIGHTS_USE_LPM: The right to use the lpm.
464  * @PS3_LPM_RIGHTS_USE_TB: The right to use the internal trace buffer.
465  */
466 
467 enum ps3_lpm_rights {
468 	PS3_LPM_RIGHTS_USE_LPM = 0x001,
469 	PS3_LPM_RIGHTS_USE_TB = 0x100,
470 };
471 
472 /**
473  * enum ps3_lpm_tb_type - Type of trace buffer lv1 should use.
474  *
475  * @PS3_LPM_TB_TYPE_NONE: Do not use a trace buffer.
476  * @PS3_LPM_RIGHTS_USE_TB: Use the lv1 internal trace buffer.  Must have
477  *  rights @PS3_LPM_RIGHTS_USE_TB.
478  */
479 
480 enum ps3_lpm_tb_type {
481 	PS3_LPM_TB_TYPE_NONE = 0,
482 	PS3_LPM_TB_TYPE_INTERNAL = 1,
483 };
484 
485 int ps3_lpm_open(enum ps3_lpm_tb_type tb_type, void *tb_cache,
486 	u64 tb_cache_size);
487 int ps3_lpm_close(void);
488 int ps3_lpm_copy_tb(unsigned long offset, void *buf, unsigned long count,
489 	unsigned long *bytes_copied);
490 int ps3_lpm_copy_tb_to_user(unsigned long offset, void __user *buf,
491 	unsigned long count, unsigned long *bytes_copied);
492 void ps3_set_bookmark(u64 bookmark);
493 void ps3_set_pm_bookmark(u64 tag, u64 incident, u64 th_id);
494 int ps3_set_signal(u64 rtas_signal_group, u8 signal_bit, u16 sub_unit,
495 	u8 bus_word);
496 
497 u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr);
498 void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
499 u32 ps3_read_ctr(u32 cpu, u32 ctr);
500 void ps3_write_ctr(u32 cpu, u32 ctr, u32 val);
501 
502 u32 ps3_read_pm07_control(u32 cpu, u32 ctr);
503 void ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val);
504 u32 ps3_read_pm(u32 cpu, enum pm_reg_name reg);
505 void ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val);
506 
507 u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr);
508 void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
509 
510 void ps3_enable_pm(u32 cpu);
511 void ps3_disable_pm(u32 cpu);
512 void ps3_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
513 void ps3_disable_pm_interrupts(u32 cpu);
514 
515 u32 ps3_get_and_clear_pm_interrupts(u32 cpu);
516 void ps3_sync_irq(int node);
517 u32 ps3_get_hw_thread_id(int cpu);
518 u64 ps3_get_spe_id(void *arg);
519 
520 /* mutex synchronizing GPU accesses and video mode changes */
521 extern struct mutex ps3_gpu_mutex;
522 
523 #endif
524