xref: /linux/arch/powerpc/include/asm/prom.h (revision cc3d2940133d24000e2866b21e03ce32adfead0a)
1b8b572e1SStephen Rothwell #ifndef _POWERPC_PROM_H
2b8b572e1SStephen Rothwell #define _POWERPC_PROM_H
3b8b572e1SStephen Rothwell #ifdef __KERNEL__
4b8b572e1SStephen Rothwell 
5b8b572e1SStephen Rothwell /*
6b8b572e1SStephen Rothwell  * Definitions for talking to the Open Firmware PROM on
7b8b572e1SStephen Rothwell  * Power Macintosh computers.
8b8b572e1SStephen Rothwell  *
9b8b572e1SStephen Rothwell  * Copyright (C) 1996-2005 Paul Mackerras.
10b8b572e1SStephen Rothwell  *
11b8b572e1SStephen Rothwell  * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
12b8b572e1SStephen Rothwell  *
13b8b572e1SStephen Rothwell  * This program is free software; you can redistribute it and/or
14b8b572e1SStephen Rothwell  * modify it under the terms of the GNU General Public License
15b8b572e1SStephen Rothwell  * as published by the Free Software Foundation; either version
16b8b572e1SStephen Rothwell  * 2 of the License, or (at your option) any later version.
17b8b572e1SStephen Rothwell  */
18b8b572e1SStephen Rothwell #include <linux/types.h>
19b8b572e1SStephen Rothwell #include <asm/irq.h>
2060063497SArun Sharma #include <linux/atomic.h>
21b8b572e1SStephen Rothwell 
225c19c5c6SRob Herring /* These includes should be removed once implicit includes are cleaned up. */
235c19c5c6SRob Herring #include <linux/of.h>
245c19c5c6SRob Herring #include <linux/of_fdt.h>
255c19c5c6SRob Herring #include <linux/of_address.h>
265c19c5c6SRob Herring #include <linux/of_irq.h>
275c19c5c6SRob Herring #include <linux/platform_device.h>
28b8b572e1SStephen Rothwell 
29c3fc952dSRob Herring #define OF_DT_BEGIN_NODE	0x1		/* Start of node, full name */
30c3fc952dSRob Herring #define OF_DT_END_NODE		0x2		/* End node */
31c3fc952dSRob Herring #define OF_DT_PROP		0x3		/* Property: name off, size,
32c3fc952dSRob Herring 						 * content */
33c3fc952dSRob Herring #define OF_DT_NOP		0x4		/* nop */
34c3fc952dSRob Herring #define OF_DT_END		0x9
35c3fc952dSRob Herring 
36c3fc952dSRob Herring #define OF_DT_VERSION		0x10
37c3fc952dSRob Herring 
38c3fc952dSRob Herring /*
39c3fc952dSRob Herring  * This is what gets passed to the kernel by prom_init or kexec
40c3fc952dSRob Herring  *
41c3fc952dSRob Herring  * The dt struct contains the device tree structure, full pathes and
42c3fc952dSRob Herring  * property contents. The dt strings contain a separate block with just
43c3fc952dSRob Herring  * the strings for the property names, and is fully page aligned and
44c3fc952dSRob Herring  * self contained in a page, so that it can be kept around by the kernel,
45c3fc952dSRob Herring  * each property name appears only once in this page (cheap compression)
46c3fc952dSRob Herring  *
47c3fc952dSRob Herring  * the mem_rsvmap contains a map of reserved ranges of physical memory,
48c3fc952dSRob Herring  * passing it here instead of in the device-tree itself greatly simplifies
49c3fc952dSRob Herring  * the job of everybody. It's just a list of u64 pairs (base/size) that
50c3fc952dSRob Herring  * ends when size is 0
51c3fc952dSRob Herring  */
52c3fc952dSRob Herring struct boot_param_header {
53c3fc952dSRob Herring 	__be32	magic;			/* magic word OF_DT_HEADER */
54c3fc952dSRob Herring 	__be32	totalsize;		/* total size of DT block */
55c3fc952dSRob Herring 	__be32	off_dt_struct;		/* offset to structure */
56c3fc952dSRob Herring 	__be32	off_dt_strings;		/* offset to strings */
57c3fc952dSRob Herring 	__be32	off_mem_rsvmap;		/* offset to memory reserve map */
58c3fc952dSRob Herring 	__be32	version;		/* format version */
59c3fc952dSRob Herring 	__be32	last_comp_version;	/* last compatible version */
60c3fc952dSRob Herring 	/* version 2 fields below */
61c3fc952dSRob Herring 	__be32	boot_cpuid_phys;	/* Physical CPU id we're booting on */
62c3fc952dSRob Herring 	/* version 3 fields below */
63c3fc952dSRob Herring 	__be32	dt_strings_size;	/* size of the DT strings block */
64c3fc952dSRob Herring 	/* version 17 fields below */
65c3fc952dSRob Herring 	__be32	dt_struct_size;		/* size of the DT structure block */
66c3fc952dSRob Herring };
67c3fc952dSRob Herring 
68b8b572e1SStephen Rothwell /*
69b8b572e1SStephen Rothwell  * OF address retreival & translation
70b8b572e1SStephen Rothwell  */
71b8b572e1SStephen Rothwell 
72b8b572e1SStephen Rothwell /* Parse the ibm,dma-window property of an OF node into the busno, phys and
73b8b572e1SStephen Rothwell  * size parameters.
74b8b572e1SStephen Rothwell  */
752083f681SAnton Blanchard void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
762083f681SAnton Blanchard 			 unsigned long *busno, unsigned long *phys,
772083f681SAnton Blanchard 			 unsigned long *size);
78b8b572e1SStephen Rothwell 
79129ac799SGrant Likely extern void of_instantiate_rtc(void);
80129ac799SGrant Likely 
81b37193b7SBenjamin Herrenschmidt extern int of_get_ibm_chip_id(struct device_node *np);
82b37193b7SBenjamin Herrenschmidt 
83f5949720SNathan Fontenot /* The of_drconf_cell struct defines the layout of the LMB array
84f5949720SNathan Fontenot  * specified in the device tree property
85f5949720SNathan Fontenot  * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory
86f5949720SNathan Fontenot  */
87f5949720SNathan Fontenot struct of_drconf_cell {
88f5949720SNathan Fontenot 	u64	base_addr;
89f5949720SNathan Fontenot 	u32	drc_index;
90f5949720SNathan Fontenot 	u32	reserved;
91f5949720SNathan Fontenot 	u32	aa_index;
92f5949720SNathan Fontenot 	u32	flags;
93f5949720SNathan Fontenot };
94f5949720SNathan Fontenot 
95f5949720SNathan Fontenot #define DRCONF_MEM_ASSIGNED	0x00000008
96f5949720SNathan Fontenot #define DRCONF_MEM_AI_INVALID	0x00000040
97f5949720SNathan Fontenot #define DRCONF_MEM_RESERVED	0x00000080
98f5949720SNathan Fontenot 
99530b5e14SNathan Fontenot /*
100530b5e14SNathan Fontenot  * There are two methods for telling firmware what our capabilities are.
101530b5e14SNathan Fontenot  * Newer machines have an "ibm,client-architecture-support" method on the
102530b5e14SNathan Fontenot  * root node.  For older machines, we have to call the "process-elf-header"
103530b5e14SNathan Fontenot  * method in the /packages/elf-loader node, passing it a fake 32-bit
104530b5e14SNathan Fontenot  * ELF header containing a couple of PT_NOTE sections that contain
105530b5e14SNathan Fontenot  * structures that contain various information.
106530b5e14SNathan Fontenot  */
107530b5e14SNathan Fontenot 
108530b5e14SNathan Fontenot /* New method - extensible architecture description vector. */
109530b5e14SNathan Fontenot 
110530b5e14SNathan Fontenot /* Option vector bits - generic bits in byte 1 */
111530b5e14SNathan Fontenot #define OV_IGNORE		0x80	/* ignore this vector */
112530b5e14SNathan Fontenot #define OV_CESSATION_POLICY	0x40	/* halt if unsupported option present*/
113530b5e14SNathan Fontenot 
114530b5e14SNathan Fontenot /* Option vector 1: processor architectures supported */
115530b5e14SNathan Fontenot #define OV1_PPC_2_00		0x80	/* set if we support PowerPC 2.00 */
116530b5e14SNathan Fontenot #define OV1_PPC_2_01		0x40	/* set if we support PowerPC 2.01 */
117530b5e14SNathan Fontenot #define OV1_PPC_2_02		0x20	/* set if we support PowerPC 2.02 */
118530b5e14SNathan Fontenot #define OV1_PPC_2_03		0x10	/* set if we support PowerPC 2.03 */
119530b5e14SNathan Fontenot #define OV1_PPC_2_04		0x08	/* set if we support PowerPC 2.04 */
120530b5e14SNathan Fontenot #define OV1_PPC_2_05		0x04	/* set if we support PowerPC 2.05 */
121530b5e14SNathan Fontenot #define OV1_PPC_2_06		0x02	/* set if we support PowerPC 2.06 */
122530b5e14SNathan Fontenot #define OV1_PPC_2_07		0x01	/* set if we support PowerPC 2.07 */
123530b5e14SNathan Fontenot 
124*cc3d2940SPaul Mackerras #define OV1_PPC_3_00		0x80	/* set if we support PowerPC 3.00 */
125*cc3d2940SPaul Mackerras 
126530b5e14SNathan Fontenot /* Option vector 2: Open Firmware options supported */
127530b5e14SNathan Fontenot #define OV2_REAL_MODE		0x20	/* set if we want OF in real mode */
128530b5e14SNathan Fontenot 
129530b5e14SNathan Fontenot /* Option vector 3: processor options supported */
130530b5e14SNathan Fontenot #define OV3_FP			0x80	/* floating point */
131530b5e14SNathan Fontenot #define OV3_VMX			0x40	/* VMX/Altivec */
132530b5e14SNathan Fontenot #define OV3_DFP			0x20	/* decimal FP */
133530b5e14SNathan Fontenot 
134530b5e14SNathan Fontenot /* Option vector 4: IBM PAPR implementation */
135530b5e14SNathan Fontenot #define OV4_MIN_ENT_CAP		0x01	/* minimum VP entitled capacity */
136530b5e14SNathan Fontenot 
137f0ff7eb4SNathan Fontenot /* Option vector 5: PAPR/OF options supported
138f0ff7eb4SNathan Fontenot  * These bits are also used in firmware_has_feature() to validate
139f0ff7eb4SNathan Fontenot  * the capabilities reported for vector 5 in the device tree so we
140f0ff7eb4SNathan Fontenot  * encode the vector index in the define and use the OV5_FEAT()
141f0ff7eb4SNathan Fontenot  * and OV5_INDX() macros to extract the desired information.
142f0ff7eb4SNathan Fontenot  */
143f0ff7eb4SNathan Fontenot #define OV5_FEAT(x)	((x) & 0xff)
144f0ff7eb4SNathan Fontenot #define OV5_INDX(x)	((x) >> 8)
145f0ff7eb4SNathan Fontenot #define OV5_LPAR		0x0280	/* logical partitioning supported */
146f0ff7eb4SNathan Fontenot #define OV5_SPLPAR		0x0240	/* shared-processor LPAR supported */
147530b5e14SNathan Fontenot /* ibm,dynamic-reconfiguration-memory property supported */
148f0ff7eb4SNathan Fontenot #define OV5_DRCONF_MEMORY	0x0220
149f0ff7eb4SNathan Fontenot #define OV5_LARGE_PAGES		0x0210	/* large pages supported */
150f0ff7eb4SNathan Fontenot #define OV5_DONATE_DEDICATE_CPU	0x0202	/* donate dedicated CPU support */
151f0ff7eb4SNathan Fontenot #define OV5_MSI			0x0201	/* PCIe/MSI support */
152f0ff7eb4SNathan Fontenot #define OV5_CMO			0x0480	/* Cooperative Memory Overcommitment */
153f0ff7eb4SNathan Fontenot #define OV5_XCMO		0x0440	/* Page Coalescing */
154f0ff7eb4SNathan Fontenot #define OV5_TYPE1_AFFINITY	0x0580	/* Type 1 NUMA affinity */
1555d88aa85SJesse Larrew #define OV5_PRRN		0x0540	/* Platform Resource Reassignment */
1563f4ab2f8SPaul Mackerras #define OV5_PFO_HW_RNG		0x1180	/* PFO Random Number Generator */
1573f4ab2f8SPaul Mackerras #define OV5_PFO_HW_842		0x1140	/* PFO Compression Accelerator */
1583f4ab2f8SPaul Mackerras #define OV5_PFO_HW_ENCR		0x1120	/* PFO Encryption Accelerator */
1593f4ab2f8SPaul Mackerras #define OV5_SUB_PROCESSORS	0x1501	/* 1,2,or 4 Sub-Processors supported */
160*cc3d2940SPaul Mackerras #define OV5_XIVE_EXPLOIT	0x1701	/* XIVE exploitation supported */
161*cc3d2940SPaul Mackerras #define OV5_MMU_RADIX_300	0x1880	/* ISA v3.00 radix MMU supported */
162*cc3d2940SPaul Mackerras #define OV5_MMU_HASH_300	0x1840	/* ISA v3.00 hash MMU supported */
163*cc3d2940SPaul Mackerras #define OV5_MMU_SEGM_RADIX	0x1820	/* radix mode (no segmentation) */
164*cc3d2940SPaul Mackerras #define OV5_MMU_PROC_TBL	0x1810	/* hcall selects SLB or proc table */
165*cc3d2940SPaul Mackerras #define OV5_MMU_SLB		0x1800	/* always use SLB */
166*cc3d2940SPaul Mackerras #define OV5_MMU_GTSE		0x1808	/* Guest translation shootdown */
167530b5e14SNathan Fontenot 
168530b5e14SNathan Fontenot /* Option Vector 6: IBM PAPR hints */
169530b5e14SNathan Fontenot #define OV6_LINUX		0x02	/* Linux is our OS */
170530b5e14SNathan Fontenot 
171b8b572e1SStephen Rothwell #endif /* __KERNEL__ */
172b8b572e1SStephen Rothwell #endif /* _POWERPC_PROM_H */
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