1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_POWERPC_PGTABLE_H 3 #define _ASM_POWERPC_PGTABLE_H 4 5 #ifndef __ASSEMBLY__ 6 #include <linux/mmdebug.h> 7 #include <linux/mmzone.h> 8 #include <asm/processor.h> /* For TASK_SIZE */ 9 #include <asm/mmu.h> 10 #include <asm/page.h> 11 #include <asm/tlbflush.h> 12 13 struct mm_struct; 14 15 #endif /* !__ASSEMBLY__ */ 16 17 #ifdef CONFIG_PPC_BOOK3S 18 #include <asm/book3s/pgtable.h> 19 #else 20 #include <asm/nohash/pgtable.h> 21 #endif /* !CONFIG_PPC_BOOK3S */ 22 23 /* Note due to the way vm flags are laid out, the bits are XWR */ 24 #define __P000 PAGE_NONE 25 #define __P001 PAGE_READONLY 26 #define __P010 PAGE_COPY 27 #define __P011 PAGE_COPY 28 #define __P100 PAGE_READONLY_X 29 #define __P101 PAGE_READONLY_X 30 #define __P110 PAGE_COPY_X 31 #define __P111 PAGE_COPY_X 32 33 #define __S000 PAGE_NONE 34 #define __S001 PAGE_READONLY 35 #define __S010 PAGE_SHARED 36 #define __S011 PAGE_SHARED 37 #define __S100 PAGE_READONLY_X 38 #define __S101 PAGE_READONLY_X 39 #define __S110 PAGE_SHARED_X 40 #define __S111 PAGE_SHARED_X 41 42 #ifndef __ASSEMBLY__ 43 44 #include <asm/tlbflush.h> 45 46 /* Keep these as a macros to avoid include dependency mess */ 47 #define pte_page(x) pfn_to_page(pte_pfn(x)) 48 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 49 /* 50 * Select all bits except the pfn 51 */ 52 static inline pgprot_t pte_pgprot(pte_t pte) 53 { 54 unsigned long pte_flags; 55 56 pte_flags = pte_val(pte) & ~PTE_RPN_MASK; 57 return __pgprot(pte_flags); 58 } 59 60 /* 61 * ZERO_PAGE is a global shared page that is always zero: used 62 * for zero-mapped memory areas etc.. 63 */ 64 extern unsigned long empty_zero_page[]; 65 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 66 67 extern pgd_t swapper_pg_dir[]; 68 69 int dma_pfn_limit_to_zone(u64 pfn_limit); 70 extern void paging_init(void); 71 72 /* 73 * kern_addr_valid is intended to indicate whether an address is a valid 74 * kernel address. Most 32-bit archs define it as always true (like this) 75 * but most 64-bit archs actually perform a test. What should we do here? 76 */ 77 #define kern_addr_valid(addr) (1) 78 79 #include <asm-generic/pgtable.h> 80 81 82 /* 83 * This gets called at the end of handling a page fault, when 84 * the kernel has put a new PTE into the page table for the process. 85 * We use it to ensure coherency between the i-cache and d-cache 86 * for the page which has just been mapped in. 87 * On machines which use an MMU hash table, we use this to put a 88 * corresponding HPTE into the hash table ahead of time, instead of 89 * waiting for the inevitable extra hash-table miss exception. 90 */ 91 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *); 92 93 extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr, 94 unsigned long end, int write, 95 struct page **pages, int *nr); 96 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 97 #define pmd_large(pmd) 0 98 #endif 99 100 /* can we use this in kvm */ 101 unsigned long vmalloc_to_phys(void *vmalloc_addr); 102 103 void pgtable_cache_add(unsigned int shift); 104 void pgtable_cache_init(void); 105 106 #if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32) 107 void mark_initmem_nx(void); 108 #else 109 static inline void mark_initmem_nx(void) { } 110 #endif 111 112 /* 113 * When used, PTE_FRAG_NR is defined in subarch pgtable.h 114 * so we are sure it is included when arriving here. 115 */ 116 #ifdef PTE_FRAG_NR 117 static inline void *pte_frag_get(mm_context_t *ctx) 118 { 119 return ctx->pte_frag; 120 } 121 122 static inline void pte_frag_set(mm_context_t *ctx, void *p) 123 { 124 ctx->pte_frag = p; 125 } 126 #else 127 #define PTE_FRAG_NR 1 128 #define PTE_FRAG_SIZE_SHIFT PAGE_SHIFT 129 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT) 130 131 static inline void *pte_frag_get(mm_context_t *ctx) 132 { 133 return NULL; 134 } 135 136 static inline void pte_frag_set(mm_context_t *ctx, void *p) 137 { 138 } 139 #endif 140 141 #endif /* __ASSEMBLY__ */ 142 143 #endif /* _ASM_POWERPC_PGTABLE_H */ 144