xref: /linux/arch/powerpc/include/asm/pgalloc.h (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_PGALLOC_H
3 #define _ASM_POWERPC_PGALLOC_H
4 
5 #include <linux/mm.h>
6 
7 #ifndef MODULE
8 static inline gfp_t pgtable_gfp_flags(struct mm_struct *mm, gfp_t gfp)
9 {
10 	if (unlikely(mm == &init_mm))
11 		return gfp;
12 	return gfp | __GFP_ACCOUNT;
13 }
14 #else /* !MODULE */
15 static inline gfp_t pgtable_gfp_flags(struct mm_struct *mm, gfp_t gfp)
16 {
17 	return gfp | __GFP_ACCOUNT;
18 }
19 #endif /* MODULE */
20 
21 #define PGALLOC_GFP (GFP_KERNEL | __GFP_ZERO)
22 
23 pte_t *pte_fragment_alloc(struct mm_struct *mm, int kernel);
24 
25 static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)
26 {
27 	return (pte_t *)pte_fragment_alloc(mm, 1);
28 }
29 
30 static inline pgtable_t pte_alloc_one(struct mm_struct *mm)
31 {
32 	return (pgtable_t)pte_fragment_alloc(mm, 0);
33 }
34 
35 void pte_frag_destroy(void *pte_frag);
36 void pte_fragment_free(unsigned long *table, int kernel);
37 
38 static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
39 {
40 	pte_fragment_free((unsigned long *)pte, 1);
41 }
42 
43 static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
44 {
45 	pte_fragment_free((unsigned long *)ptepage, 0);
46 }
47 
48 /* arch use pte_free_defer() implementation in arch/powerpc/mm/pgtable-frag.c */
49 #define pte_free_defer pte_free_defer
50 void pte_free_defer(struct mm_struct *mm, pgtable_t pgtable);
51 
52 /*
53  * Functions that deal with pagetables that could be at any level of
54  * the table need to be passed an "index_size" so they know how to
55  * handle allocation.  For PTE pages, the allocation size will be
56  * (2^index_size * sizeof(pointer)) and allocations are drawn from
57  * the kmem_cache in PGT_CACHE(index_size).
58  *
59  * The maximum index size needs to be big enough to allow any
60  * pagetable sizes we need, but small enough to fit in the low bits of
61  * any page table pointer.  In other words all pagetables, even tiny
62  * ones, must be aligned to allow at least enough low 0 bits to
63  * contain this value.  This value is also used as a mask, so it must
64  * be one less than a power of two.
65  */
66 #define MAX_PGTABLE_INDEX_SIZE	0xf
67 
68 extern struct kmem_cache *pgtable_cache[];
69 #define PGT_CACHE(shift) pgtable_cache[shift]
70 
71 #ifdef CONFIG_PPC_BOOK3S
72 #include <asm/book3s/pgalloc.h>
73 #else
74 #include <asm/nohash/pgalloc.h>
75 #endif
76 
77 #endif /* _ASM_POWERPC_PGALLOC_H */
78