1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * This control block defines the PACA which defines the processor 4 * specific data for each logical processor on the system. 5 * There are some pointers defined that are utilized by PLIC. 6 * 7 * C 2001 PPC 64 Team, IBM Corp 8 */ 9 #ifndef _ASM_POWERPC_PACA_H 10 #define _ASM_POWERPC_PACA_H 11 #ifdef __KERNEL__ 12 13 #ifdef CONFIG_PPC64 14 15 #include <linux/string.h> 16 #include <asm/types.h> 17 #include <asm/lppaca.h> 18 #include <asm/mmu.h> 19 #include <asm/page.h> 20 #ifdef CONFIG_PPC_BOOK3E 21 #include <asm/exception-64e.h> 22 #else 23 #include <asm/exception-64s.h> 24 #endif 25 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 26 #include <asm/kvm_book3s_asm.h> 27 #endif 28 #include <asm/accounting.h> 29 #include <asm/hmi.h> 30 #include <asm/cpuidle.h> 31 #include <asm/atomic.h> 32 #include <asm/mce.h> 33 34 #include <asm-generic/mmiowb_types.h> 35 36 register struct paca_struct *local_paca asm("r13"); 37 38 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP) 39 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ 40 /* 41 * Add standard checks that preemption cannot occur when using get_paca(): 42 * otherwise the paca_struct it points to may be the wrong one just after. 43 */ 44 #define get_paca() ((void) debug_smp_processor_id(), local_paca) 45 #else 46 #define get_paca() local_paca 47 #endif 48 49 #ifdef CONFIG_PPC_PSERIES 50 #define get_lppaca() (get_paca()->lppaca_ptr) 51 #endif 52 53 #define get_slb_shadow() (get_paca()->slb_shadow_ptr) 54 55 struct task_struct; 56 struct rtas_args; 57 58 /* 59 * Defines the layout of the paca. 60 * 61 * This structure is not directly accessed by firmware or the service 62 * processor. 63 */ 64 struct paca_struct { 65 #ifdef CONFIG_PPC_PSERIES 66 /* 67 * Because hw_cpu_id, unlike other paca fields, is accessed 68 * routinely from other CPUs (from the IRQ code), we stick to 69 * read-only (after boot) fields in the first cacheline to 70 * avoid cacheline bouncing. 71 */ 72 73 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ 74 #endif /* CONFIG_PPC_PSERIES */ 75 76 /* 77 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c 78 * load lock_token and paca_index with a single lwz 79 * instruction. They must travel together and be properly 80 * aligned. 81 */ 82 #ifdef __BIG_ENDIAN__ 83 u16 lock_token; /* Constant 0x8000, used in locks */ 84 u16 paca_index; /* Logical processor number */ 85 #else 86 u16 paca_index; /* Logical processor number */ 87 u16 lock_token; /* Constant 0x8000, used in locks */ 88 #endif 89 90 u64 kernel_toc; /* Kernel TOC address */ 91 u64 kernelbase; /* Base address of kernel */ 92 u64 kernel_msr; /* MSR while running in kernel */ 93 void *emergency_sp; /* pointer to emergency stack */ 94 u64 data_offset; /* per cpu data offset */ 95 s16 hw_cpu_id; /* Physical processor number */ 96 u8 cpu_start; /* At startup, processor spins until */ 97 /* this becomes non-zero. */ 98 u8 kexec_state; /* set when kexec down has irqs off */ 99 #ifdef CONFIG_PPC_BOOK3S_64 100 #ifdef CONFIG_PPC_64S_HASH_MMU 101 struct slb_shadow *slb_shadow_ptr; 102 #endif 103 struct dtl_entry *dispatch_log; 104 struct dtl_entry *dispatch_log_end; 105 #endif 106 u64 dscr_default; /* per-CPU default DSCR */ 107 108 #ifdef CONFIG_PPC_BOOK3S_64 109 /* 110 * Now, starting in cacheline 2, the exception save areas 111 */ 112 /* used for most interrupts/exceptions */ 113 u64 exgen[EX_SIZE] __attribute__((aligned(0x80))); 114 115 #ifdef CONFIG_PPC_64S_HASH_MMU 116 /* SLB related definitions */ 117 u16 vmalloc_sllp; 118 u8 slb_cache_ptr; 119 u8 stab_rr; /* stab/slb round-robin counter */ 120 #ifdef CONFIG_DEBUG_VM 121 u8 in_kernel_slb_handler; 122 #endif 123 u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */ 124 u32 slb_kern_bitmap; 125 u32 slb_cache[SLB_CACHE_ENTRIES]; 126 #endif 127 #endif /* CONFIG_PPC_BOOK3S_64 */ 128 129 #ifdef CONFIG_PPC_BOOK3E 130 u64 exgen[8] __aligned(0x40); 131 /* Keep pgd in the same cacheline as the start of extlb */ 132 pgd_t *pgd __aligned(0x40); /* Current PGD */ 133 pgd_t *kernel_pgd; /* Kernel PGD */ 134 135 /* Shared by all threads of a core -- points to tcd of first thread */ 136 struct tlb_core_data *tcd_ptr; 137 138 /* 139 * We can have up to 3 levels of reentrancy in the TLB miss handler, 140 * in each of four exception levels (normal, crit, mcheck, debug). 141 */ 142 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)]; 143 u64 exmc[8]; /* used for machine checks */ 144 u64 excrit[8]; /* used for crit interrupts */ 145 u64 exdbg[8]; /* used for debug interrupts */ 146 147 /* Kernel stack pointers for use by special exceptions */ 148 void *mc_kstack; 149 void *crit_kstack; 150 void *dbg_kstack; 151 152 struct tlb_core_data tcd; 153 #endif /* CONFIG_PPC_BOOK3E */ 154 155 #ifdef CONFIG_PPC_BOOK3S 156 #ifdef CONFIG_PPC_64S_HASH_MMU 157 #ifdef CONFIG_PPC_MM_SLICES 158 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE]; 159 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE]; 160 #else 161 u16 mm_ctx_user_psize; 162 u16 mm_ctx_sllp; 163 #endif 164 #endif 165 #endif 166 167 /* 168 * then miscellaneous read-write fields 169 */ 170 struct task_struct *__current; /* Pointer to current */ 171 u64 kstack; /* Saved Kernel stack addr */ 172 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */ 173 u64 saved_msr; /* MSR saved here by enter_rtas */ 174 #ifdef CONFIG_PPC64 175 u64 exit_save_r1; /* Syscall/interrupt R1 save */ 176 #endif 177 #ifdef CONFIG_PPC_BOOK3E 178 u16 trap_save; /* Used when bad stack is encountered */ 179 #endif 180 #ifdef CONFIG_PPC_BOOK3S_64 181 u8 hsrr_valid; /* HSRRs set for HRFID */ 182 u8 srr_valid; /* SRRs set for RFID */ 183 #endif 184 u8 irq_soft_mask; /* mask for irq soft masking */ 185 u8 irq_happened; /* irq happened while soft-disabled */ 186 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */ 187 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 188 u8 pmcregs_in_use; /* pseries puts this in lppaca */ 189 #endif 190 u64 sprg_vdso; /* Saved user-visible sprg */ 191 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 192 u64 tm_scratch; /* TM scratch area for reclaim */ 193 #endif 194 195 #ifdef CONFIG_PPC_POWERNV 196 /* PowerNV idle fields */ 197 /* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */ 198 unsigned long idle_state; 199 union { 200 /* P7/P8 specific fields */ 201 struct { 202 /* PNV_THREAD_RUNNING/NAP/SLEEP */ 203 u8 thread_idle_state; 204 /* Mask to denote subcore sibling threads */ 205 u8 subcore_sibling_mask; 206 }; 207 208 /* P9 specific fields */ 209 struct { 210 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 211 /* The PSSCR value that the kernel requested before going to stop */ 212 u64 requested_psscr; 213 /* Flag to request this thread not to stop */ 214 atomic_t dont_stop; 215 #endif 216 }; 217 }; 218 #endif 219 220 #ifdef CONFIG_PPC_BOOK3S_64 221 /* Non-maskable exceptions that are not performance critical */ 222 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */ 223 u64 exmc[EX_SIZE]; /* used for machine checks */ 224 #endif 225 #ifdef CONFIG_PPC_BOOK3S_64 226 /* Exclusive stacks for system reset and machine check exception. */ 227 void *nmi_emergency_sp; 228 void *mc_emergency_sp; 229 230 u16 in_nmi; /* In nmi handler */ 231 232 /* 233 * Flag to check whether we are in machine check early handler 234 * and already using emergency stack. 235 */ 236 u16 in_mce; 237 u8 hmi_event_available; /* HMI event is available */ 238 u8 hmi_p9_special_emu; /* HMI P9 special emulation */ 239 u32 hmi_irqs; /* HMI irq stat */ 240 #endif 241 u8 ftrace_enabled; /* Hard disable ftrace */ 242 243 /* Stuff for accurate time accounting */ 244 struct cpu_accounting_data accounting; 245 u64 dtl_ridx; /* read index in dispatch log */ 246 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */ 247 248 #ifdef CONFIG_KVM_BOOK3S_HANDLER 249 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 250 /* We use this to store guest state in */ 251 struct kvmppc_book3s_shadow_vcpu shadow_vcpu; 252 #endif 253 struct kvmppc_host_state kvm_hstate; 254 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 255 /* 256 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for 257 * more details 258 */ 259 struct sibling_subcore_state *sibling_subcore_state; 260 #endif 261 #endif 262 #ifdef CONFIG_PPC_BOOK3S_64 263 /* 264 * rfi fallback flush must be in its own cacheline to prevent 265 * other paca data leaking into the L1d 266 */ 267 u64 exrfi[EX_SIZE] __aligned(0x80); 268 void *rfi_flush_fallback_area; 269 u64 l1d_flush_size; 270 #endif 271 #ifdef CONFIG_PPC_PSERIES 272 struct rtas_args *rtas_args_reentrant; 273 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */ 274 #endif /* CONFIG_PPC_PSERIES */ 275 276 #ifdef CONFIG_PPC_BOOK3S_64 277 #ifdef CONFIG_PPC_64S_HASH_MMU 278 /* Capture SLB related old contents in MCE handler. */ 279 struct slb_entry *mce_faulty_slbs; 280 u16 slb_save_cache_ptr; 281 #endif 282 #endif /* CONFIG_PPC_BOOK3S_64 */ 283 #ifdef CONFIG_STACKPROTECTOR 284 unsigned long canary; 285 #endif 286 #ifdef CONFIG_MMIOWB 287 struct mmiowb_state mmiowb_state; 288 #endif 289 #ifdef CONFIG_PPC_BOOK3S_64 290 struct mce_info *mce_info; 291 #endif /* CONFIG_PPC_BOOK3S_64 */ 292 } ____cacheline_aligned; 293 294 extern void copy_mm_to_paca(struct mm_struct *mm); 295 extern struct paca_struct **paca_ptrs; 296 extern void initialise_paca(struct paca_struct *new_paca, int cpu); 297 extern void setup_paca(struct paca_struct *new_paca); 298 extern void allocate_paca_ptrs(void); 299 extern void allocate_paca(int cpu); 300 extern void free_unused_pacas(void); 301 302 #else /* CONFIG_PPC64 */ 303 304 static inline void allocate_paca_ptrs(void) { } 305 static inline void allocate_paca(int cpu) { } 306 static inline void free_unused_pacas(void) { } 307 308 #endif /* CONFIG_PPC64 */ 309 310 #endif /* __KERNEL__ */ 311 #endif /* _ASM_POWERPC_PACA_H */ 312