1 /* 2 * This control block defines the PACA which defines the processor 3 * specific data for each logical processor on the system. 4 * There are some pointers defined that are utilized by PLIC. 5 * 6 * C 2001 PPC 64 Team, IBM Corp 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 11 * 2 of the License, or (at your option) any later version. 12 */ 13 #ifndef _ASM_POWERPC_PACA_H 14 #define _ASM_POWERPC_PACA_H 15 #ifdef __KERNEL__ 16 17 #ifdef CONFIG_PPC64 18 19 #include <linux/string.h> 20 #include <asm/types.h> 21 #include <asm/lppaca.h> 22 #include <asm/mmu.h> 23 #include <asm/page.h> 24 #ifdef CONFIG_PPC_BOOK3E 25 #include <asm/exception-64e.h> 26 #else 27 #include <asm/exception-64s.h> 28 #endif 29 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 30 #include <asm/kvm_book3s_asm.h> 31 #endif 32 #include <asm/accounting.h> 33 #include <asm/hmi.h> 34 #include <asm/cpuidle.h> 35 #include <asm/atomic.h> 36 37 #include <asm-generic/mmiowb_types.h> 38 39 register struct paca_struct *local_paca asm("r13"); 40 41 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP) 42 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ 43 /* 44 * Add standard checks that preemption cannot occur when using get_paca(): 45 * otherwise the paca_struct it points to may be the wrong one just after. 46 */ 47 #define get_paca() ((void) debug_smp_processor_id(), local_paca) 48 #else 49 #define get_paca() local_paca 50 #endif 51 52 #ifdef CONFIG_PPC_PSERIES 53 #define get_lppaca() (get_paca()->lppaca_ptr) 54 #endif 55 56 #define get_slb_shadow() (get_paca()->slb_shadow_ptr) 57 58 struct task_struct; 59 60 /* 61 * Defines the layout of the paca. 62 * 63 * This structure is not directly accessed by firmware or the service 64 * processor. 65 */ 66 struct paca_struct { 67 #ifdef CONFIG_PPC_PSERIES 68 /* 69 * Because hw_cpu_id, unlike other paca fields, is accessed 70 * routinely from other CPUs (from the IRQ code), we stick to 71 * read-only (after boot) fields in the first cacheline to 72 * avoid cacheline bouncing. 73 */ 74 75 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ 76 #endif /* CONFIG_PPC_PSERIES */ 77 78 /* 79 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c 80 * load lock_token and paca_index with a single lwz 81 * instruction. They must travel together and be properly 82 * aligned. 83 */ 84 #ifdef __BIG_ENDIAN__ 85 u16 lock_token; /* Constant 0x8000, used in locks */ 86 u16 paca_index; /* Logical processor number */ 87 #else 88 u16 paca_index; /* Logical processor number */ 89 u16 lock_token; /* Constant 0x8000, used in locks */ 90 #endif 91 92 u64 kernel_toc; /* Kernel TOC address */ 93 u64 kernelbase; /* Base address of kernel */ 94 u64 kernel_msr; /* MSR while running in kernel */ 95 void *emergency_sp; /* pointer to emergency stack */ 96 u64 data_offset; /* per cpu data offset */ 97 s16 hw_cpu_id; /* Physical processor number */ 98 u8 cpu_start; /* At startup, processor spins until */ 99 /* this becomes non-zero. */ 100 u8 kexec_state; /* set when kexec down has irqs off */ 101 #ifdef CONFIG_PPC_BOOK3S_64 102 struct slb_shadow *slb_shadow_ptr; 103 struct dtl_entry *dispatch_log; 104 struct dtl_entry *dispatch_log_end; 105 #endif 106 u64 dscr_default; /* per-CPU default DSCR */ 107 108 #ifdef CONFIG_PPC_BOOK3S_64 109 /* 110 * Now, starting in cacheline 2, the exception save areas 111 */ 112 /* used for most interrupts/exceptions */ 113 u64 exgen[EX_SIZE] __attribute__((aligned(0x80))); 114 u64 exslb[EX_SIZE]; /* used for SLB/segment table misses 115 * on the linear mapping */ 116 /* SLB related definitions */ 117 u16 vmalloc_sllp; 118 u8 slb_cache_ptr; 119 u8 stab_rr; /* stab/slb round-robin counter */ 120 #ifdef CONFIG_DEBUG_VM 121 u8 in_kernel_slb_handler; 122 #endif 123 u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */ 124 u32 slb_kern_bitmap; 125 u32 slb_cache[SLB_CACHE_ENTRIES]; 126 #endif /* CONFIG_PPC_BOOK3S_64 */ 127 128 #ifdef CONFIG_PPC_BOOK3E 129 u64 exgen[8] __aligned(0x40); 130 /* Keep pgd in the same cacheline as the start of extlb */ 131 pgd_t *pgd __aligned(0x40); /* Current PGD */ 132 pgd_t *kernel_pgd; /* Kernel PGD */ 133 134 /* Shared by all threads of a core -- points to tcd of first thread */ 135 struct tlb_core_data *tcd_ptr; 136 137 /* 138 * We can have up to 3 levels of reentrancy in the TLB miss handler, 139 * in each of four exception levels (normal, crit, mcheck, debug). 140 */ 141 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)]; 142 u64 exmc[8]; /* used for machine checks */ 143 u64 excrit[8]; /* used for crit interrupts */ 144 u64 exdbg[8]; /* used for debug interrupts */ 145 146 /* Kernel stack pointers for use by special exceptions */ 147 void *mc_kstack; 148 void *crit_kstack; 149 void *dbg_kstack; 150 151 struct tlb_core_data tcd; 152 #endif /* CONFIG_PPC_BOOK3E */ 153 154 #ifdef CONFIG_PPC_BOOK3S 155 mm_context_id_t mm_ctx_id; 156 #ifdef CONFIG_PPC_MM_SLICES 157 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE]; 158 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE]; 159 unsigned long mm_ctx_slb_addr_limit; 160 #else 161 u16 mm_ctx_user_psize; 162 u16 mm_ctx_sllp; 163 #endif 164 #endif 165 166 /* 167 * then miscellaneous read-write fields 168 */ 169 struct task_struct *__current; /* Pointer to current */ 170 u64 kstack; /* Saved Kernel stack addr */ 171 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */ 172 u64 saved_msr; /* MSR saved here by enter_rtas */ 173 u16 trap_save; /* Used when bad stack is encountered */ 174 u8 irq_soft_mask; /* mask for irq soft masking */ 175 u8 irq_happened; /* irq happened while soft-disabled */ 176 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */ 177 u8 nap_state_lost; /* NV GPR values lost in power7_idle */ 178 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 179 u8 pmcregs_in_use; /* pseries puts this in lppaca */ 180 #endif 181 u64 sprg_vdso; /* Saved user-visible sprg */ 182 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 183 u64 tm_scratch; /* TM scratch area for reclaim */ 184 #endif 185 186 #ifdef CONFIG_PPC_POWERNV 187 /* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */ 188 u32 *core_idle_state_ptr; 189 u8 thread_idle_state; /* PNV_THREAD_RUNNING/NAP/SLEEP */ 190 /* Mask to indicate thread id in core */ 191 u8 thread_mask; 192 /* Mask to denote subcore sibling threads */ 193 u8 subcore_sibling_mask; 194 /* Flag to request this thread not to stop */ 195 atomic_t dont_stop; 196 /* The PSSCR value that the kernel requested before going to stop */ 197 u64 requested_psscr; 198 199 /* 200 * Save area for additional SPRs that need to be 201 * saved/restored during cpuidle stop. 202 */ 203 struct stop_sprs stop_sprs; 204 #endif 205 206 #ifdef CONFIG_PPC_BOOK3S_64 207 /* Non-maskable exceptions that are not performance critical */ 208 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */ 209 u64 exmc[EX_SIZE]; /* used for machine checks */ 210 #endif 211 #ifdef CONFIG_PPC_BOOK3S_64 212 /* Exclusive stacks for system reset and machine check exception. */ 213 void *nmi_emergency_sp; 214 void *mc_emergency_sp; 215 216 u16 in_nmi; /* In nmi handler */ 217 218 /* 219 * Flag to check whether we are in machine check early handler 220 * and already using emergency stack. 221 */ 222 u16 in_mce; 223 u8 hmi_event_available; /* HMI event is available */ 224 u8 hmi_p9_special_emu; /* HMI P9 special emulation */ 225 #endif 226 u8 ftrace_enabled; /* Hard disable ftrace */ 227 228 /* Stuff for accurate time accounting */ 229 struct cpu_accounting_data accounting; 230 u64 dtl_ridx; /* read index in dispatch log */ 231 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */ 232 233 #ifdef CONFIG_KVM_BOOK3S_HANDLER 234 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 235 /* We use this to store guest state in */ 236 struct kvmppc_book3s_shadow_vcpu shadow_vcpu; 237 #endif 238 struct kvmppc_host_state kvm_hstate; 239 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 240 /* 241 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for 242 * more details 243 */ 244 struct sibling_subcore_state *sibling_subcore_state; 245 #endif 246 #endif 247 #ifdef CONFIG_PPC_BOOK3S_64 248 /* 249 * rfi fallback flush must be in its own cacheline to prevent 250 * other paca data leaking into the L1d 251 */ 252 u64 exrfi[EX_SIZE] __aligned(0x80); 253 void *rfi_flush_fallback_area; 254 u64 l1d_flush_size; 255 #endif 256 #ifdef CONFIG_PPC_PSERIES 257 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */ 258 #endif /* CONFIG_PPC_PSERIES */ 259 260 #ifdef CONFIG_PPC_BOOK3S_64 261 /* Capture SLB related old contents in MCE handler. */ 262 struct slb_entry *mce_faulty_slbs; 263 u16 slb_save_cache_ptr; 264 #endif /* CONFIG_PPC_BOOK3S_64 */ 265 #ifdef CONFIG_STACKPROTECTOR 266 unsigned long canary; 267 #endif 268 #ifdef CONFIG_MMIOWB 269 struct mmiowb_state mmiowb_state; 270 #endif 271 } ____cacheline_aligned; 272 273 extern void copy_mm_to_paca(struct mm_struct *mm); 274 extern struct paca_struct **paca_ptrs; 275 extern void initialise_paca(struct paca_struct *new_paca, int cpu); 276 extern void setup_paca(struct paca_struct *new_paca); 277 extern void allocate_paca_ptrs(void); 278 extern void allocate_paca(int cpu); 279 extern void free_unused_pacas(void); 280 281 #else /* CONFIG_PPC64 */ 282 283 static inline void allocate_paca_ptrs(void) { }; 284 static inline void allocate_paca(int cpu) { }; 285 static inline void free_unused_pacas(void) { }; 286 287 #endif /* CONFIG_PPC64 */ 288 289 #endif /* __KERNEL__ */ 290 #endif /* _ASM_POWERPC_PACA_H */ 291