1 /* 2 * PowerNV OPAL definitions. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #ifndef _ASM_POWERPC_OPAL_H 13 #define _ASM_POWERPC_OPAL_H 14 15 #include <asm/opal-api.h> 16 17 #ifndef __ASSEMBLY__ 18 19 #include <linux/notifier.h> 20 21 /* We calculate number of sg entries based on PAGE_SIZE */ 22 #define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry)) 23 24 /* /sys/firmware/opal */ 25 extern struct kobject *opal_kobj; 26 27 /* /ibm,opal */ 28 extern struct device_node *opal_node; 29 30 /* API functions */ 31 int64_t opal_invalid_call(void); 32 int64_t opal_console_write(int64_t term_number, __be64 *length, 33 const uint8_t *buffer); 34 int64_t opal_console_read(int64_t term_number, __be64 *length, 35 uint8_t *buffer); 36 int64_t opal_console_write_buffer_space(int64_t term_number, 37 __be64 *length); 38 int64_t opal_rtc_read(__be32 *year_month_day, 39 __be64 *hour_minute_second_millisecond); 40 int64_t opal_rtc_write(uint32_t year_month_day, 41 uint64_t hour_minute_second_millisecond); 42 int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min); 43 int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day, 44 uint32_t hour_min); 45 int64_t opal_cec_power_down(uint64_t request); 46 int64_t opal_cec_reboot(void); 47 int64_t opal_cec_reboot2(uint32_t reboot_type, char *diag); 48 int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset); 49 int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset); 50 int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask); 51 int64_t opal_poll_events(__be64 *outstanding_event_mask); 52 int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr, 53 uint64_t tce_mem_size); 54 int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr, 55 uint64_t tce_mem_size); 56 int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func, 57 uint64_t offset, uint8_t *data); 58 int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func, 59 uint64_t offset, __be16 *data); 60 int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func, 61 uint64_t offset, __be32 *data); 62 int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func, 63 uint64_t offset, uint8_t data); 64 int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func, 65 uint64_t offset, uint16_t data); 66 int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func, 67 uint64_t offset, uint32_t data); 68 int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority); 69 int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority); 70 int64_t opal_register_exception_handler(uint64_t opal_exception, 71 uint64_t handler_address, 72 uint64_t glue_cache_line); 73 int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, 74 uint8_t *freeze_state, 75 __be16 *pci_error_type, 76 __be64 *phb_status); 77 int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number, 78 uint64_t eeh_action_token); 79 int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number, 80 uint64_t eeh_action_token); 81 int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type, 82 uint32_t func, uint64_t addr, uint64_t mask); 83 int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state); 84 85 86 87 int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type, 88 uint16_t window_num, uint16_t enable); 89 int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type, 90 uint16_t window_num, 91 uint64_t starting_real_address, 92 uint64_t starting_pci_address, 93 uint64_t size); 94 int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number, 95 uint16_t window_type, uint16_t window_num, 96 uint16_t segment_num); 97 int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr, 98 uint64_t ivt_addr, uint64_t ivt_len, 99 uint64_t reject_array_addr, 100 uint64_t peltv_addr); 101 int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func, 102 uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare, 103 uint8_t pe_action); 104 int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe, 105 uint8_t state); 106 int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number); 107 int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number, 108 uint32_t state); 109 int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number, 110 uint8_t *p_bit, uint8_t *q_bit); 111 int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number, 112 uint8_t p_bit, uint8_t q_bit); 113 int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq); 114 int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number, 115 uint32_t xive_num); 116 int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num, 117 __be32 *interrupt_source_number); 118 int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, 119 uint8_t msi_range, __be32 *msi_address, 120 __be32 *message_data); 121 int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, 122 uint32_t xive_num, uint8_t msi_range, 123 __be64 *msi_address, __be32 *message_data); 124 int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address); 125 int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status); 126 int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines); 127 int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id, 128 uint16_t tce_levels, uint64_t tce_table_addr, 129 uint64_t tce_table_size, uint64_t tce_page_size); 130 int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number, 131 uint16_t dma_window_number, uint64_t pci_start_addr, 132 uint64_t pci_mem_size); 133 int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state); 134 135 int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer, 136 uint64_t diag_buffer_len); 137 int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer, 138 uint64_t diag_buffer_len); 139 int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer, 140 uint64_t diag_buffer_len); 141 int64_t opal_pci_fence_phb(uint64_t phb_id); 142 int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data); 143 int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action); 144 int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action); 145 int64_t opal_get_epow_status(__be16 *epow_status, __be16 *num_epow_classes); 146 int64_t opal_get_dpo_status(__be64 *dpo_timeout); 147 int64_t opal_set_system_attention_led(uint8_t led_action); 148 int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe, 149 __be16 *pci_error_type, __be16 *severity); 150 int64_t opal_pci_poll(uint64_t phb_id); 151 int64_t opal_return_cpu(void); 152 int64_t opal_check_token(uint64_t token); 153 int64_t opal_reinit_cpus(uint64_t flags); 154 155 int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val); 156 int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val); 157 158 int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type, 159 uint32_t addr, uint32_t data, uint32_t sz); 160 int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type, 161 uint32_t addr, __be32 *data, uint32_t sz); 162 163 int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id); 164 int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type); 165 int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset); 166 int64_t opal_send_ack_elog(uint64_t log_id); 167 void opal_resend_pending_logs(void); 168 169 int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result); 170 int64_t opal_manage_flash(uint8_t op); 171 int64_t opal_update_flash(uint64_t blk_list); 172 int64_t opal_dump_init(uint8_t dump_type); 173 int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size); 174 int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type); 175 int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer); 176 int64_t opal_dump_ack(uint32_t dump_id); 177 int64_t opal_dump_resend_notification(void); 178 179 int64_t opal_get_msg(uint64_t buffer, uint64_t size); 180 int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token); 181 int64_t opal_sync_host_reboot(void); 182 int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer, 183 uint64_t length); 184 int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer, 185 uint64_t length); 186 int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data); 187 int64_t opal_handle_hmi(void); 188 int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end); 189 int64_t opal_unregister_dump_region(uint32_t id); 190 int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val); 191 int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag); 192 int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number); 193 int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg, 194 uint64_t msg_len); 195 int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg, 196 uint64_t *msg_len); 197 int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id, 198 struct opal_i2c_request *oreq); 199 int64_t opal_prd_msg(struct opal_prd_msg *msg); 200 int64_t opal_leds_get_ind(char *loc_code, __be64 *led_mask, 201 __be64 *led_value, __be64 *max_led_type); 202 int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask, 203 const u64 led_value, __be64 *max_led_type); 204 205 int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf, 206 uint64_t size, uint64_t token); 207 int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf, 208 uint64_t size, uint64_t token); 209 int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size, 210 uint64_t token); 211 212 /* Internal functions */ 213 extern int early_init_dt_scan_opal(unsigned long node, const char *uname, 214 int depth, void *data); 215 extern int early_init_dt_scan_recoverable_ranges(unsigned long node, 216 const char *uname, int depth, void *data); 217 218 extern int opal_get_chars(uint32_t vtermno, char *buf, int count); 219 extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len); 220 221 extern void hvc_opal_init_early(void); 222 223 extern int opal_notifier_register(struct notifier_block *nb); 224 extern int opal_notifier_unregister(struct notifier_block *nb); 225 226 extern int opal_message_notifier_register(enum opal_msg_type msg_type, 227 struct notifier_block *nb); 228 extern int opal_message_notifier_unregister(enum opal_msg_type msg_type, 229 struct notifier_block *nb); 230 extern void opal_notifier_enable(void); 231 extern void opal_notifier_disable(void); 232 extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val); 233 234 extern int __opal_async_get_token(void); 235 extern int opal_async_get_token_interruptible(void); 236 extern int __opal_async_release_token(int token); 237 extern int opal_async_release_token(int token); 238 extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg); 239 extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data); 240 241 struct rtc_time; 242 extern unsigned long opal_get_boot_time(void); 243 extern void opal_nvram_init(void); 244 extern void opal_flash_update_init(void); 245 extern void opal_flash_term_callback(void); 246 extern int opal_elog_init(void); 247 extern void opal_platform_dump_init(void); 248 extern void opal_sys_param_init(void); 249 extern void opal_msglog_init(void); 250 extern int opal_async_comp_init(void); 251 extern int opal_sensor_init(void); 252 extern int opal_hmi_handler_init(void); 253 extern int opal_event_init(void); 254 255 extern int opal_machine_check(struct pt_regs *regs); 256 extern bool opal_mce_check_early_recovery(struct pt_regs *regs); 257 extern int opal_hmi_exception_early(struct pt_regs *regs); 258 extern int opal_handle_hmi_exception(struct pt_regs *regs); 259 260 extern void opal_shutdown(void); 261 extern int opal_resync_timebase(void); 262 263 extern void opal_lpc_init(void); 264 265 extern int opal_event_request(unsigned int opal_event_nr); 266 267 struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr, 268 unsigned long vmalloc_size); 269 void opal_free_sg_list(struct opal_sg_list *sg); 270 271 extern int opal_error_code(int rc); 272 273 #endif /* __ASSEMBLY__ */ 274 275 #endif /* _ASM_POWERPC_OPAL_H */ 276