xref: /linux/arch/powerpc/include/asm/ohare.h (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_OHARE_H
3 #define _ASM_POWERPC_OHARE_H
4 #ifdef __KERNEL__
5 /*
6  * ohare.h: definitions for using the "O'Hare" I/O controller chip.
7  *
8  * Copyright (C) 1997 Paul Mackerras.
9  *
10  * BenH: Changed to match those of heathrow (but not all of them). Please
11  *       check if I didn't break anything (especially the media bay).
12  */
13 
14 /* offset from ohare base for feature control register */
15 #define OHARE_MBCR	0x34
16 #define OHARE_FCR	0x38
17 
18 /*
19  * Bits in feature control register.
20  * These were mostly derived by experiment on a powerbook 3400
21  * and may differ for other machines.
22  */
23 #define OH_SCC_RESET		1
24 #define OH_BAY_POWER_N		2	/* a guess */
25 #define OH_BAY_PCI_ENABLE	4	/* a guess */
26 #define OH_BAY_IDE_ENABLE	8
27 #define OH_BAY_FLOPPY_ENABLE	0x10
28 #define OH_IDE0_ENABLE		0x20
29 #define OH_IDE0_RESET_N		0x40	/* a guess */
30 #define OH_BAY_DEV_MASK		0x1c
31 #define OH_BAY_RESET_N		0x80
32 #define OH_IOBUS_ENABLE		0x100	/* IOBUS seems to be IDE */
33 #define OH_SCC_ENABLE		0x200
34 #define OH_MESH_ENABLE		0x400
35 #define OH_FLOPPY_ENABLE	0x800
36 #define OH_SCCA_IO		0x4000
37 #define OH_SCCB_IO		0x8000
38 #define OH_VIA_ENABLE		0x10000	/* Is apparently wrong, to be verified */
39 #define OH_IDE1_RESET_N		0x800000
40 
41 /*
42  * Bits to set in the feature control register on PowerBooks.
43  */
44 #define PBOOK_FEATURES		(OH_IDE_ENABLE | OH_SCC_ENABLE | \
45 				 OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO)
46 
47 /*
48  * A magic value to put into the feature control register of the
49  * "ohare" I/O controller on Starmaxes to enable the IDE CD interface.
50  * Contributed by Harry Eaton.
51  */
52 #define STARMAX_FEATURES	0xbeff7a
53 
54 #endif /* __KERNEL__ */
55 #endif /* _ASM_POWERPC_OHARE_H */
56