1e22a2274SMahesh Salgaonkar /* 2e22a2274SMahesh Salgaonkar * Machine check exception header file. 3e22a2274SMahesh Salgaonkar * 4e22a2274SMahesh Salgaonkar * This program is free software; you can redistribute it and/or modify 5e22a2274SMahesh Salgaonkar * it under the terms of the GNU General Public License as published by 6e22a2274SMahesh Salgaonkar * the Free Software Foundation; either version 2 of the License, or 7e22a2274SMahesh Salgaonkar * (at your option) any later version. 8e22a2274SMahesh Salgaonkar * 9e22a2274SMahesh Salgaonkar * This program is distributed in the hope that it will be useful, 10e22a2274SMahesh Salgaonkar * but WITHOUT ANY WARRANTY; without even the implied warranty of 11e22a2274SMahesh Salgaonkar * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12e22a2274SMahesh Salgaonkar * GNU General Public License for more details. 13e22a2274SMahesh Salgaonkar * 14e22a2274SMahesh Salgaonkar * You should have received a copy of the GNU General Public License 15e22a2274SMahesh Salgaonkar * along with this program; if not, write to the Free Software 16e22a2274SMahesh Salgaonkar * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17e22a2274SMahesh Salgaonkar * 18e22a2274SMahesh Salgaonkar * Copyright 2013 IBM Corporation 19e22a2274SMahesh Salgaonkar * Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> 20e22a2274SMahesh Salgaonkar */ 21e22a2274SMahesh Salgaonkar 22e22a2274SMahesh Salgaonkar #ifndef __ASM_PPC64_MCE_H__ 23e22a2274SMahesh Salgaonkar #define __ASM_PPC64_MCE_H__ 24e22a2274SMahesh Salgaonkar 25e22a2274SMahesh Salgaonkar #include <linux/bitops.h> 26e22a2274SMahesh Salgaonkar 27e22a2274SMahesh Salgaonkar /* 28e22a2274SMahesh Salgaonkar * Machine Check bits on power7 and power8 29e22a2274SMahesh Salgaonkar */ 30e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42)) /* P8 too */ 31e22a2274SMahesh Salgaonkar 32e22a2274SMahesh Salgaonkar /* SRR1 bits for machine check (On Power7 and Power8) */ 33e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH(srr1) ((srr1) & PPC_BITMASK(43, 45)) /* P8 too */ 34e22a2274SMahesh Salgaonkar 35e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_UE (0x1 << PPC_BITLSHIFT(45)) /* P8 too */ 36e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_SLB_PARITY (0x2 << PPC_BITLSHIFT(45)) /* P8 too */ 37e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_SLB_MULTIHIT (0x3 << PPC_BITLSHIFT(45)) /* P8 too */ 38e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_SLB_BOTH (0x4 << PPC_BITLSHIFT(45)) 39e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_TLB_MULTIHIT (0x5 << PPC_BITLSHIFT(45)) /* P8 too */ 40e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_UE_TLB_RELOAD (0x6 << PPC_BITLSHIFT(45)) /* P8 too */ 41e22a2274SMahesh Salgaonkar #define P7_SRR1_MC_IFETCH_UE_IFU_INTERNAL (0x7 << PPC_BITLSHIFT(45)) 42e22a2274SMahesh Salgaonkar 43e22a2274SMahesh Salgaonkar /* SRR1 bits for machine check (On Power8) */ 44e22a2274SMahesh Salgaonkar #define P8_SRR1_MC_IFETCH_ERAT_MULTIHIT (0x4 << PPC_BITLSHIFT(45)) 45e22a2274SMahesh Salgaonkar 46e22a2274SMahesh Salgaonkar /* DSISR bits for machine check (On Power7 and Power8) */ 47e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_UE (PPC_BIT(48)) /* P8 too */ 48e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_UE_TABLEWALK (PPC_BIT(49)) /* P8 too */ 49e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_ERAT_MULTIHIT (PPC_BIT(52)) /* P8 too */ 50e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_TLB_MULTIHIT_MFTLB (PPC_BIT(53)) /* P8 too */ 51e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_SLB_PARITY_MFSLB (PPC_BIT(55)) /* P8 too */ 52e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_SLB_MULTIHIT (PPC_BIT(56)) /* P8 too */ 53e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_SLB_MULTIHIT_PARITY (PPC_BIT(57)) /* P8 too */ 54e22a2274SMahesh Salgaonkar 55e22a2274SMahesh Salgaonkar /* 56e22a2274SMahesh Salgaonkar * DSISR bits for machine check (Power8) in addition to above. 57e22a2274SMahesh Salgaonkar * Secondary DERAT Multihit 58e22a2274SMahesh Salgaonkar */ 59e22a2274SMahesh Salgaonkar #define P8_DSISR_MC_ERAT_MULTIHIT_SEC (PPC_BIT(54)) 60e22a2274SMahesh Salgaonkar 61e22a2274SMahesh Salgaonkar /* SLB error bits */ 62e22a2274SMahesh Salgaonkar #define P7_DSISR_MC_SLB_ERRORS (P7_DSISR_MC_ERAT_MULTIHIT | \ 63e22a2274SMahesh Salgaonkar P7_DSISR_MC_SLB_PARITY_MFSLB | \ 64e22a2274SMahesh Salgaonkar P7_DSISR_MC_SLB_MULTIHIT | \ 65e22a2274SMahesh Salgaonkar P7_DSISR_MC_SLB_MULTIHIT_PARITY) 66e22a2274SMahesh Salgaonkar 67ae744f34SMahesh Salgaonkar #define P8_DSISR_MC_SLB_ERRORS (P7_DSISR_MC_SLB_ERRORS | \ 68ae744f34SMahesh Salgaonkar P8_DSISR_MC_ERAT_MULTIHIT_SEC) 69*36df96f8SMahesh Salgaonkar enum MCE_Version { 70*36df96f8SMahesh Salgaonkar MCE_V1 = 1, 71*36df96f8SMahesh Salgaonkar }; 72*36df96f8SMahesh Salgaonkar 73*36df96f8SMahesh Salgaonkar enum MCE_Severity { 74*36df96f8SMahesh Salgaonkar MCE_SEV_NO_ERROR = 0, 75*36df96f8SMahesh Salgaonkar MCE_SEV_WARNING = 1, 76*36df96f8SMahesh Salgaonkar MCE_SEV_ERROR_SYNC = 2, 77*36df96f8SMahesh Salgaonkar MCE_SEV_FATAL = 3, 78*36df96f8SMahesh Salgaonkar }; 79*36df96f8SMahesh Salgaonkar 80*36df96f8SMahesh Salgaonkar enum MCE_Disposition { 81*36df96f8SMahesh Salgaonkar MCE_DISPOSITION_RECOVERED = 0, 82*36df96f8SMahesh Salgaonkar MCE_DISPOSITION_NOT_RECOVERED = 1, 83*36df96f8SMahesh Salgaonkar }; 84*36df96f8SMahesh Salgaonkar 85*36df96f8SMahesh Salgaonkar enum MCE_Initiator { 86*36df96f8SMahesh Salgaonkar MCE_INITIATOR_UNKNOWN = 0, 87*36df96f8SMahesh Salgaonkar MCE_INITIATOR_CPU = 1, 88*36df96f8SMahesh Salgaonkar }; 89*36df96f8SMahesh Salgaonkar 90*36df96f8SMahesh Salgaonkar enum MCE_ErrorType { 91*36df96f8SMahesh Salgaonkar MCE_ERROR_TYPE_UNKNOWN = 0, 92*36df96f8SMahesh Salgaonkar MCE_ERROR_TYPE_UE = 1, 93*36df96f8SMahesh Salgaonkar MCE_ERROR_TYPE_SLB = 2, 94*36df96f8SMahesh Salgaonkar MCE_ERROR_TYPE_ERAT = 3, 95*36df96f8SMahesh Salgaonkar MCE_ERROR_TYPE_TLB = 4, 96*36df96f8SMahesh Salgaonkar }; 97*36df96f8SMahesh Salgaonkar 98*36df96f8SMahesh Salgaonkar enum MCE_UeErrorType { 99*36df96f8SMahesh Salgaonkar MCE_UE_ERROR_INDETERMINATE = 0, 100*36df96f8SMahesh Salgaonkar MCE_UE_ERROR_IFETCH = 1, 101*36df96f8SMahesh Salgaonkar MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2, 102*36df96f8SMahesh Salgaonkar MCE_UE_ERROR_LOAD_STORE = 3, 103*36df96f8SMahesh Salgaonkar MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4, 104*36df96f8SMahesh Salgaonkar }; 105*36df96f8SMahesh Salgaonkar 106*36df96f8SMahesh Salgaonkar enum MCE_SlbErrorType { 107*36df96f8SMahesh Salgaonkar MCE_SLB_ERROR_INDETERMINATE = 0, 108*36df96f8SMahesh Salgaonkar MCE_SLB_ERROR_PARITY = 1, 109*36df96f8SMahesh Salgaonkar MCE_SLB_ERROR_MULTIHIT = 2, 110*36df96f8SMahesh Salgaonkar }; 111*36df96f8SMahesh Salgaonkar 112*36df96f8SMahesh Salgaonkar enum MCE_EratErrorType { 113*36df96f8SMahesh Salgaonkar MCE_ERAT_ERROR_INDETERMINATE = 0, 114*36df96f8SMahesh Salgaonkar MCE_ERAT_ERROR_PARITY = 1, 115*36df96f8SMahesh Salgaonkar MCE_ERAT_ERROR_MULTIHIT = 2, 116*36df96f8SMahesh Salgaonkar }; 117*36df96f8SMahesh Salgaonkar 118*36df96f8SMahesh Salgaonkar enum MCE_TlbErrorType { 119*36df96f8SMahesh Salgaonkar MCE_TLB_ERROR_INDETERMINATE = 0, 120*36df96f8SMahesh Salgaonkar MCE_TLB_ERROR_PARITY = 1, 121*36df96f8SMahesh Salgaonkar MCE_TLB_ERROR_MULTIHIT = 2, 122*36df96f8SMahesh Salgaonkar }; 123*36df96f8SMahesh Salgaonkar 124*36df96f8SMahesh Salgaonkar struct machine_check_event { 125*36df96f8SMahesh Salgaonkar enum MCE_Version version:8; /* 0x00 */ 126*36df96f8SMahesh Salgaonkar uint8_t in_use; /* 0x01 */ 127*36df96f8SMahesh Salgaonkar enum MCE_Severity severity:8; /* 0x02 */ 128*36df96f8SMahesh Salgaonkar enum MCE_Initiator initiator:8; /* 0x03 */ 129*36df96f8SMahesh Salgaonkar enum MCE_ErrorType error_type:8; /* 0x04 */ 130*36df96f8SMahesh Salgaonkar enum MCE_Disposition disposition:8; /* 0x05 */ 131*36df96f8SMahesh Salgaonkar uint8_t reserved_1[2]; /* 0x06 */ 132*36df96f8SMahesh Salgaonkar uint64_t gpr3; /* 0x08 */ 133*36df96f8SMahesh Salgaonkar uint64_t srr0; /* 0x10 */ 134*36df96f8SMahesh Salgaonkar uint64_t srr1; /* 0x18 */ 135*36df96f8SMahesh Salgaonkar union { /* 0x20 */ 136*36df96f8SMahesh Salgaonkar struct { 137*36df96f8SMahesh Salgaonkar enum MCE_UeErrorType ue_error_type:8; 138*36df96f8SMahesh Salgaonkar uint8_t effective_address_provided; 139*36df96f8SMahesh Salgaonkar uint8_t physical_address_provided; 140*36df96f8SMahesh Salgaonkar uint8_t reserved_1[5]; 141*36df96f8SMahesh Salgaonkar uint64_t effective_address; 142*36df96f8SMahesh Salgaonkar uint64_t physical_address; 143*36df96f8SMahesh Salgaonkar uint8_t reserved_2[8]; 144*36df96f8SMahesh Salgaonkar } ue_error; 145*36df96f8SMahesh Salgaonkar 146*36df96f8SMahesh Salgaonkar struct { 147*36df96f8SMahesh Salgaonkar enum MCE_SlbErrorType slb_error_type:8; 148*36df96f8SMahesh Salgaonkar uint8_t effective_address_provided; 149*36df96f8SMahesh Salgaonkar uint8_t reserved_1[6]; 150*36df96f8SMahesh Salgaonkar uint64_t effective_address; 151*36df96f8SMahesh Salgaonkar uint8_t reserved_2[16]; 152*36df96f8SMahesh Salgaonkar } slb_error; 153*36df96f8SMahesh Salgaonkar 154*36df96f8SMahesh Salgaonkar struct { 155*36df96f8SMahesh Salgaonkar enum MCE_EratErrorType erat_error_type:8; 156*36df96f8SMahesh Salgaonkar uint8_t effective_address_provided; 157*36df96f8SMahesh Salgaonkar uint8_t reserved_1[6]; 158*36df96f8SMahesh Salgaonkar uint64_t effective_address; 159*36df96f8SMahesh Salgaonkar uint8_t reserved_2[16]; 160*36df96f8SMahesh Salgaonkar } erat_error; 161*36df96f8SMahesh Salgaonkar 162*36df96f8SMahesh Salgaonkar struct { 163*36df96f8SMahesh Salgaonkar enum MCE_TlbErrorType tlb_error_type:8; 164*36df96f8SMahesh Salgaonkar uint8_t effective_address_provided; 165*36df96f8SMahesh Salgaonkar uint8_t reserved_1[6]; 166*36df96f8SMahesh Salgaonkar uint64_t effective_address; 167*36df96f8SMahesh Salgaonkar uint8_t reserved_2[16]; 168*36df96f8SMahesh Salgaonkar } tlb_error; 169*36df96f8SMahesh Salgaonkar } u; 170*36df96f8SMahesh Salgaonkar }; 171*36df96f8SMahesh Salgaonkar 172*36df96f8SMahesh Salgaonkar struct mce_error_info { 173*36df96f8SMahesh Salgaonkar enum MCE_ErrorType error_type:8; 174*36df96f8SMahesh Salgaonkar union { 175*36df96f8SMahesh Salgaonkar enum MCE_UeErrorType ue_error_type:8; 176*36df96f8SMahesh Salgaonkar enum MCE_SlbErrorType slb_error_type:8; 177*36df96f8SMahesh Salgaonkar enum MCE_EratErrorType erat_error_type:8; 178*36df96f8SMahesh Salgaonkar enum MCE_TlbErrorType tlb_error_type:8; 179*36df96f8SMahesh Salgaonkar } u; 180*36df96f8SMahesh Salgaonkar uint8_t reserved[2]; 181*36df96f8SMahesh Salgaonkar }; 182*36df96f8SMahesh Salgaonkar 183*36df96f8SMahesh Salgaonkar #define MAX_MC_EVT 100 184*36df96f8SMahesh Salgaonkar 185*36df96f8SMahesh Salgaonkar /* Release flags for get_mce_event() */ 186*36df96f8SMahesh Salgaonkar #define MCE_EVENT_RELEASE true 187*36df96f8SMahesh Salgaonkar #define MCE_EVENT_DONTRELEASE false 188*36df96f8SMahesh Salgaonkar 189*36df96f8SMahesh Salgaonkar extern void save_mce_event(struct pt_regs *regs, long handled, 190*36df96f8SMahesh Salgaonkar struct mce_error_info *mce_err, uint64_t addr); 191*36df96f8SMahesh Salgaonkar extern int get_mce_event(struct machine_check_event *mce, bool release); 192*36df96f8SMahesh Salgaonkar extern void release_mce_event(void); 193ae744f34SMahesh Salgaonkar 194e22a2274SMahesh Salgaonkar #endif /* __ASM_PPC64_MCE_H__ */ 195