xref: /linux/arch/powerpc/include/asm/irqflags.h (revision 0d456bad36d42d16022be045c8a53ddbb59ee478)
1 /*
2  * IRQ flags handling
3  */
4 #ifndef _ASM_IRQFLAGS_H
5 #define _ASM_IRQFLAGS_H
6 
7 #ifndef __ASSEMBLY__
8 /*
9  * Get definitions for arch_local_save_flags(x), etc.
10  */
11 #include <asm/hw_irq.h>
12 
13 #else
14 #ifdef CONFIG_TRACE_IRQFLAGS
15 #ifdef CONFIG_IRQSOFF_TRACER
16 /*
17  * Since the ftrace irqsoff latency trace checks CALLER_ADDR1,
18  * which is the stack frame here, we need to force a stack frame
19  * in case we came from user space.
20  */
21 #define TRACE_WITH_FRAME_BUFFER(func)		\
22 	mflr	r0;				\
23 	stdu	r1, -32(r1);			\
24 	std	r0, 16(r1);			\
25 	stdu	r1, -32(r1);			\
26 	bl func;				\
27 	ld	r1, 0(r1);			\
28 	ld	r1, 0(r1);
29 #else
30 #define TRACE_WITH_FRAME_BUFFER(func)		\
31 	bl func;
32 #endif
33 
34 /*
35  * Most of the CPU's IRQ-state tracing is done from assembly code; we
36  * have to call a C function so call a wrapper that saves all the
37  * C-clobbered registers.
38  */
39 #define TRACE_ENABLE_INTS	TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on)
40 #define TRACE_DISABLE_INTS	TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)
41 
42 /*
43  * This is used by assembly code to soft-disable interrupts
44  */
45 #define SOFT_DISABLE_INTS(__rA, __rB)		\
46 	lbz	__rA,PACASOFTIRQEN(r13);	\
47 	lbz	__rB,PACAIRQHAPPENED(r13);	\
48 	cmpwi	cr0,__rA,0;			\
49 	li	__rA,0;				\
50 	ori	__rB,__rB,PACA_IRQ_HARD_DIS;	\
51 	stb	__rB,PACAIRQHAPPENED(r13);	\
52 	beq	44f;				\
53 	stb	__rA,PACASOFTIRQEN(r13);	\
54 	TRACE_DISABLE_INTS;			\
55 44:
56 
57 #else
58 #define TRACE_ENABLE_INTS
59 #define TRACE_DISABLE_INTS
60 
61 #define SOFT_DISABLE_INTS(__rA, __rB)		\
62 	lbz	__rA,PACAIRQHAPPENED(r13);	\
63 	li	__rB,0;				\
64 	ori	__rA,__rA,PACA_IRQ_HARD_DIS;	\
65 	stb	__rB,PACASOFTIRQEN(r13);	\
66 	stb	__rA,PACAIRQHAPPENED(r13)
67 #endif
68 #endif
69 
70 #endif
71