1 /* 2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> 3 */ 4 #ifndef _ASM_POWERPC_HW_IRQ_H 5 #define _ASM_POWERPC_HW_IRQ_H 6 7 #ifdef __KERNEL__ 8 9 #include <linux/errno.h> 10 #include <linux/compiler.h> 11 #include <asm/ptrace.h> 12 #include <asm/processor.h> 13 14 #ifdef CONFIG_PPC64 15 16 /* 17 * PACA flags in paca->irq_happened. 18 * 19 * This bits are set when interrupts occur while soft-disabled 20 * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS 21 * is set whenever we manually hard disable. 22 */ 23 #define PACA_IRQ_HARD_DIS 0x01 24 #define PACA_IRQ_DBELL 0x02 25 #define PACA_IRQ_EE 0x04 26 #define PACA_IRQ_DEC 0x08 /* Or FIT */ 27 #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */ 28 29 #endif /* CONFIG_PPC64 */ 30 31 #ifndef __ASSEMBLY__ 32 33 extern void __replay_interrupt(unsigned int vector); 34 35 extern void timer_interrupt(struct pt_regs *); 36 extern void performance_monitor_exception(struct pt_regs *regs); 37 extern void WatchdogException(struct pt_regs *regs); 38 extern void unknown_exception(struct pt_regs *regs); 39 40 #ifdef CONFIG_PPC64 41 #include <asm/paca.h> 42 43 static inline unsigned long arch_local_save_flags(void) 44 { 45 unsigned long flags; 46 47 asm volatile( 48 "lbz %0,%1(13)" 49 : "=r" (flags) 50 : "i" (offsetof(struct paca_struct, soft_enabled))); 51 52 return flags; 53 } 54 55 static inline unsigned long arch_local_irq_disable(void) 56 { 57 unsigned long flags, zero; 58 59 asm volatile( 60 "li %1,0; lbz %0,%2(13); stb %1,%2(13)" 61 : "=r" (flags), "=&r" (zero) 62 : "i" (offsetof(struct paca_struct, soft_enabled)) 63 : "memory"); 64 65 return flags; 66 } 67 68 extern void arch_local_irq_restore(unsigned long); 69 70 static inline void arch_local_irq_enable(void) 71 { 72 arch_local_irq_restore(1); 73 } 74 75 static inline unsigned long arch_local_irq_save(void) 76 { 77 return arch_local_irq_disable(); 78 } 79 80 static inline bool arch_irqs_disabled_flags(unsigned long flags) 81 { 82 return flags == 0; 83 } 84 85 static inline bool arch_irqs_disabled(void) 86 { 87 return arch_irqs_disabled_flags(arch_local_save_flags()); 88 } 89 90 #ifdef CONFIG_PPC_BOOK3E 91 #define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory") 92 #define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory") 93 #else 94 #define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1) 95 #define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1) 96 #endif 97 98 #define hard_irq_disable() do { \ 99 u8 _was_enabled = get_paca()->soft_enabled; \ 100 __hard_irq_disable(); \ 101 get_paca()->soft_enabled = 0; \ 102 get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \ 103 if (_was_enabled) \ 104 trace_hardirqs_off(); \ 105 } while(0) 106 107 static inline bool lazy_irq_pending(void) 108 { 109 return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS); 110 } 111 112 /* 113 * This is called by asynchronous interrupts to conditionally 114 * re-enable hard interrupts when soft-disabled after having 115 * cleared the source of the interrupt 116 */ 117 static inline void may_hard_irq_enable(void) 118 { 119 get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS; 120 if (!(get_paca()->irq_happened & PACA_IRQ_EE)) 121 __hard_irq_enable(); 122 } 123 124 static inline bool arch_irq_disabled_regs(struct pt_regs *regs) 125 { 126 return !regs->softe; 127 } 128 129 extern bool prep_irq_for_idle(void); 130 131 #else /* CONFIG_PPC64 */ 132 133 #define SET_MSR_EE(x) mtmsr(x) 134 135 static inline unsigned long arch_local_save_flags(void) 136 { 137 return mfmsr(); 138 } 139 140 static inline void arch_local_irq_restore(unsigned long flags) 141 { 142 #if defined(CONFIG_BOOKE) 143 asm volatile("wrtee %0" : : "r" (flags) : "memory"); 144 #else 145 mtmsr(flags); 146 #endif 147 } 148 149 static inline unsigned long arch_local_irq_save(void) 150 { 151 unsigned long flags = arch_local_save_flags(); 152 #ifdef CONFIG_BOOKE 153 asm volatile("wrteei 0" : : : "memory"); 154 #else 155 SET_MSR_EE(flags & ~MSR_EE); 156 #endif 157 return flags; 158 } 159 160 static inline void arch_local_irq_disable(void) 161 { 162 #ifdef CONFIG_BOOKE 163 asm volatile("wrteei 0" : : : "memory"); 164 #else 165 arch_local_irq_save(); 166 #endif 167 } 168 169 static inline void arch_local_irq_enable(void) 170 { 171 #ifdef CONFIG_BOOKE 172 asm volatile("wrteei 1" : : : "memory"); 173 #else 174 unsigned long msr = mfmsr(); 175 SET_MSR_EE(msr | MSR_EE); 176 #endif 177 } 178 179 static inline bool arch_irqs_disabled_flags(unsigned long flags) 180 { 181 return (flags & MSR_EE) == 0; 182 } 183 184 static inline bool arch_irqs_disabled(void) 185 { 186 return arch_irqs_disabled_flags(arch_local_save_flags()); 187 } 188 189 #define hard_irq_disable() arch_local_irq_disable() 190 191 static inline bool arch_irq_disabled_regs(struct pt_regs *regs) 192 { 193 return !(regs->msr & MSR_EE); 194 } 195 196 static inline void may_hard_irq_enable(void) { } 197 198 #endif /* CONFIG_PPC64 */ 199 200 #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST 201 202 /* 203 * interrupt-retrigger: should we handle this via lost interrupts and IPIs 204 * or should we not care like we do now ? --BenH. 205 */ 206 struct irq_chip; 207 208 #endif /* __ASSEMBLY__ */ 209 #endif /* __KERNEL__ */ 210 #endif /* _ASM_POWERPC_HW_IRQ_H */ 211