xref: /linux/arch/powerpc/include/asm/futex.h (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 #ifndef _ASM_POWERPC_FUTEX_H
2 #define _ASM_POWERPC_FUTEX_H
3 
4 #ifdef __KERNEL__
5 
6 #include <linux/futex.h>
7 #include <linux/uaccess.h>
8 #include <asm/errno.h>
9 #include <asm/synch.h>
10 #include <asm/asm-compat.h>
11 
12 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13   __asm__ __volatile ( \
14 	PPC_ATOMIC_ENTRY_BARRIER \
15 "1:	lwarx	%0,0,%2\n" \
16 	insn \
17 	PPC405_ERR77(0, %2) \
18 "2:	stwcx.	%1,0,%2\n" \
19 	"bne-	1b\n" \
20 	PPC_ATOMIC_EXIT_BARRIER \
21 	"li	%1,0\n" \
22 "3:	.section .fixup,\"ax\"\n" \
23 "4:	li	%1,%3\n" \
24 	"b	3b\n" \
25 	".previous\n" \
26 	".section __ex_table,\"a\"\n" \
27 	".align 3\n" \
28 	PPC_LONG "1b,4b,2b,4b\n" \
29 	".previous" \
30 	: "=&r" (oldval), "=&r" (ret) \
31 	: "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
32 	: "cr0", "memory")
33 
34 static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
35 {
36 	int op = (encoded_op >> 28) & 7;
37 	int cmp = (encoded_op >> 24) & 15;
38 	int oparg = (encoded_op << 8) >> 20;
39 	int cmparg = (encoded_op << 20) >> 20;
40 	int oldval = 0, ret;
41 	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
42 		oparg = 1 << oparg;
43 
44 	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
45 		return -EFAULT;
46 
47 	pagefault_disable();
48 
49 	switch (op) {
50 	case FUTEX_OP_SET:
51 		__futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg);
52 		break;
53 	case FUTEX_OP_ADD:
54 		__futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg);
55 		break;
56 	case FUTEX_OP_OR:
57 		__futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg);
58 		break;
59 	case FUTEX_OP_ANDN:
60 		__futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg);
61 		break;
62 	case FUTEX_OP_XOR:
63 		__futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg);
64 		break;
65 	default:
66 		ret = -ENOSYS;
67 	}
68 
69 	pagefault_enable();
70 
71 	if (!ret) {
72 		switch (cmp) {
73 		case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
74 		case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
75 		case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
76 		case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
77 		case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
78 		case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
79 		default: ret = -ENOSYS;
80 		}
81 	}
82 	return ret;
83 }
84 
85 static inline int
86 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
87 			      u32 oldval, u32 newval)
88 {
89 	int ret = 0;
90 	u32 prev;
91 
92 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
93 		return -EFAULT;
94 
95         __asm__ __volatile__ (
96         PPC_ATOMIC_ENTRY_BARRIER
97 "1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\
98         cmpw    0,%1,%4\n\
99         bne-    3f\n"
100         PPC405_ERR77(0,%3)
101 "2:     stwcx.  %5,0,%3\n\
102         bne-    1b\n"
103         PPC_ATOMIC_EXIT_BARRIER
104 "3:	.section .fixup,\"ax\"\n\
105 4:	li	%0,%6\n\
106 	b	3b\n\
107 	.previous\n\
108 	.section __ex_table,\"a\"\n\
109 	.align 3\n\
110 	" PPC_LONG "1b,4b,2b,4b\n\
111 	.previous" \
112         : "+r" (ret), "=&r" (prev), "+m" (*uaddr)
113         : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)
114         : "cc", "memory");
115 
116 	*uval = prev;
117         return ret;
118 }
119 
120 #endif /* __KERNEL__ */
121 #endif /* _ASM_POWERPC_FUTEX_H */
122