1 /* 2 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. 3 * Copyright 2001-2012 IBM Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20 #ifndef _POWERPC_EEH_H 21 #define _POWERPC_EEH_H 22 #ifdef __KERNEL__ 23 24 #include <linux/init.h> 25 #include <linux/list.h> 26 #include <linux/string.h> 27 28 struct pci_dev; 29 struct pci_bus; 30 struct device_node; 31 32 #ifdef CONFIG_EEH 33 34 /* 35 * The struct is used to trace PE related EEH functionality. 36 * In theory, there will have one instance of the struct to 37 * be created against particular PE. In nature, PEs corelate 38 * to each other. the struct has to reflect that hierarchy in 39 * order to easily pick up those affected PEs when one particular 40 * PE has EEH errors. 41 * 42 * Also, one particular PE might be composed of PCI device, PCI 43 * bus and its subordinate components. The struct also need ship 44 * the information. Further more, one particular PE is only meaingful 45 * in the corresponding PHB. Therefore, the root PEs should be created 46 * against existing PHBs in on-to-one fashion. 47 */ 48 #define EEH_PE_PHB 1 /* PHB PE */ 49 #define EEH_PE_DEVICE 2 /* Device PE */ 50 #define EEH_PE_BUS 3 /* Bus PE */ 51 52 #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ 53 #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ 54 55 struct eeh_pe { 56 int type; /* PE type: PHB/Bus/Device */ 57 int state; /* PE EEH dependent mode */ 58 int config_addr; /* Traditional PCI address */ 59 int addr; /* PE configuration address */ 60 struct pci_controller *phb; /* Associated PHB */ 61 int check_count; /* Times of ignored error */ 62 int freeze_count; /* Times of froze up */ 63 int false_positives; /* Times of reported #ff's */ 64 struct eeh_pe *parent; /* Parent PE */ 65 struct list_head child_list; /* Link PE to the child list */ 66 struct list_head edevs; /* Link list of EEH devices */ 67 struct list_head child; /* Child PEs */ 68 }; 69 70 /* 71 * The struct is used to trace EEH state for the associated 72 * PCI device node or PCI device. In future, it might 73 * represent PE as well so that the EEH device to form 74 * another tree except the currently existing tree of PCI 75 * buses and PCI devices 76 */ 77 #define EEH_MODE_SUPPORTED (1<<0) /* EEH supported on the device */ 78 #define EEH_MODE_NOCHECK (1<<1) /* EEH check should be skipped */ 79 #define EEH_MODE_ISOLATED (1<<2) /* The device has been isolated */ 80 #define EEH_MODE_RECOVERING (1<<3) /* Recovering the device */ 81 #define EEH_MODE_IRQ_DISABLED (1<<4) /* Interrupt disabled */ 82 83 struct eeh_dev { 84 int mode; /* EEH mode */ 85 int class_code; /* Class code of the device */ 86 int config_addr; /* Config address */ 87 int pe_config_addr; /* PE config address */ 88 int check_count; /* Times of ignored error */ 89 int freeze_count; /* Times of froze up */ 90 int false_positives; /* Times of reported #ff's */ 91 u32 config_space[16]; /* Saved PCI config space */ 92 struct eeh_pe *pe; /* Associated PE */ 93 struct list_head list; /* Form link list in the PE */ 94 struct pci_controller *phb; /* Associated PHB */ 95 struct device_node *dn; /* Associated device node */ 96 struct pci_dev *pdev; /* Associated PCI device */ 97 }; 98 99 static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev) 100 { 101 return edev->dn; 102 } 103 104 static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev) 105 { 106 return edev->pdev; 107 } 108 109 /* 110 * The struct is used to trace the registered EEH operation 111 * callback functions. Actually, those operation callback 112 * functions are heavily platform dependent. That means the 113 * platform should register its own EEH operation callback 114 * functions before any EEH further operations. 115 */ 116 #define EEH_OPT_DISABLE 0 /* EEH disable */ 117 #define EEH_OPT_ENABLE 1 /* EEH enable */ 118 #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */ 119 #define EEH_OPT_THAW_DMA 3 /* DMA enable */ 120 #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */ 121 #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */ 122 #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */ 123 #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */ 124 #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */ 125 #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */ 126 #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */ 127 #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */ 128 #define EEH_RESET_HOT 1 /* Hot reset */ 129 #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */ 130 #define EEH_LOG_TEMP 1 /* EEH temporary error log */ 131 #define EEH_LOG_PERM 2 /* EEH permanent error log */ 132 133 struct eeh_ops { 134 char *name; 135 int (*init)(void); 136 int (*set_option)(struct device_node *dn, int option); 137 int (*get_pe_addr)(struct device_node *dn); 138 int (*get_state)(struct device_node *dn, int *state); 139 int (*reset)(struct device_node *dn, int option); 140 int (*wait_state)(struct device_node *dn, int max_wait); 141 int (*get_log)(struct device_node *dn, int severity, char *drv_log, unsigned long len); 142 int (*configure_bridge)(struct device_node *dn); 143 int (*read_config)(struct device_node *dn, int where, int size, u32 *val); 144 int (*write_config)(struct device_node *dn, int where, int size, u32 val); 145 }; 146 147 extern struct eeh_ops *eeh_ops; 148 extern int eeh_subsystem_enabled; 149 extern struct mutex eeh_mutex; 150 151 static inline void eeh_lock(void) 152 { 153 mutex_lock(&eeh_mutex); 154 } 155 156 static inline void eeh_unlock(void) 157 { 158 mutex_unlock(&eeh_mutex); 159 } 160 161 /* 162 * Max number of EEH freezes allowed before we consider the device 163 * to be permanently disabled. 164 */ 165 #define EEH_MAX_ALLOWED_FREEZES 5 166 167 int __devinit eeh_phb_pe_create(struct pci_controller *phb); 168 169 void * __devinit eeh_dev_init(struct device_node *dn, void *data); 170 void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb); 171 int __init eeh_ops_register(struct eeh_ops *ops); 172 int __exit eeh_ops_unregister(const char *name); 173 unsigned long eeh_check_failure(const volatile void __iomem *token, 174 unsigned long val); 175 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev); 176 void __init pci_addr_cache_build(void); 177 void eeh_add_device_tree_early(struct device_node *); 178 void eeh_add_device_tree_late(struct pci_bus *); 179 void eeh_remove_bus_device(struct pci_dev *); 180 181 /** 182 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. 183 * 184 * If this macro yields TRUE, the caller relays to eeh_check_failure() 185 * which does further tests out of line. 186 */ 187 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) 188 189 /* 190 * Reads from a device which has been isolated by EEH will return 191 * all 1s. This macro gives an all-1s value of the given size (in 192 * bytes: 1, 2, or 4) for comparing with the result of a read. 193 */ 194 #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8)) 195 196 #else /* !CONFIG_EEH */ 197 198 static inline void *eeh_dev_init(struct device_node *dn, void *data) 199 { 200 return NULL; 201 } 202 203 static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { } 204 205 static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val) 206 { 207 return val; 208 } 209 210 static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) 211 { 212 return 0; 213 } 214 215 static inline void pci_addr_cache_build(void) { } 216 217 static inline void eeh_add_device_tree_early(struct device_node *dn) { } 218 219 static inline void eeh_add_device_tree_late(struct pci_bus *bus) { } 220 221 static inline void eeh_remove_bus_device(struct pci_dev *dev) { } 222 223 static inline void eeh_lock(void) { } 224 static inline void eeh_unlock(void) { } 225 226 #define EEH_POSSIBLE_ERROR(val, type) (0) 227 #define EEH_IO_ERROR_VALUE(size) (-1UL) 228 #endif /* CONFIG_EEH */ 229 230 #ifdef CONFIG_PPC64 231 /* 232 * MMIO read/write operations with EEH support. 233 */ 234 static inline u8 eeh_readb(const volatile void __iomem *addr) 235 { 236 u8 val = in_8(addr); 237 if (EEH_POSSIBLE_ERROR(val, u8)) 238 return eeh_check_failure(addr, val); 239 return val; 240 } 241 242 static inline u16 eeh_readw(const volatile void __iomem *addr) 243 { 244 u16 val = in_le16(addr); 245 if (EEH_POSSIBLE_ERROR(val, u16)) 246 return eeh_check_failure(addr, val); 247 return val; 248 } 249 250 static inline u32 eeh_readl(const volatile void __iomem *addr) 251 { 252 u32 val = in_le32(addr); 253 if (EEH_POSSIBLE_ERROR(val, u32)) 254 return eeh_check_failure(addr, val); 255 return val; 256 } 257 258 static inline u64 eeh_readq(const volatile void __iomem *addr) 259 { 260 u64 val = in_le64(addr); 261 if (EEH_POSSIBLE_ERROR(val, u64)) 262 return eeh_check_failure(addr, val); 263 return val; 264 } 265 266 static inline u16 eeh_readw_be(const volatile void __iomem *addr) 267 { 268 u16 val = in_be16(addr); 269 if (EEH_POSSIBLE_ERROR(val, u16)) 270 return eeh_check_failure(addr, val); 271 return val; 272 } 273 274 static inline u32 eeh_readl_be(const volatile void __iomem *addr) 275 { 276 u32 val = in_be32(addr); 277 if (EEH_POSSIBLE_ERROR(val, u32)) 278 return eeh_check_failure(addr, val); 279 return val; 280 } 281 282 static inline u64 eeh_readq_be(const volatile void __iomem *addr) 283 { 284 u64 val = in_be64(addr); 285 if (EEH_POSSIBLE_ERROR(val, u64)) 286 return eeh_check_failure(addr, val); 287 return val; 288 } 289 290 static inline void eeh_memcpy_fromio(void *dest, const 291 volatile void __iomem *src, 292 unsigned long n) 293 { 294 _memcpy_fromio(dest, src, n); 295 296 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes 297 * were copied. Check all four bytes. 298 */ 299 if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32)) 300 eeh_check_failure(src, *((u32 *)(dest + n - 4))); 301 } 302 303 /* in-string eeh macros */ 304 static inline void eeh_readsb(const volatile void __iomem *addr, void * buf, 305 int ns) 306 { 307 _insb(addr, buf, ns); 308 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8)) 309 eeh_check_failure(addr, *(u8*)buf); 310 } 311 312 static inline void eeh_readsw(const volatile void __iomem *addr, void * buf, 313 int ns) 314 { 315 _insw(addr, buf, ns); 316 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16)) 317 eeh_check_failure(addr, *(u16*)buf); 318 } 319 320 static inline void eeh_readsl(const volatile void __iomem *addr, void * buf, 321 int nl) 322 { 323 _insl(addr, buf, nl); 324 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32)) 325 eeh_check_failure(addr, *(u32*)buf); 326 } 327 328 #endif /* CONFIG_PPC64 */ 329 #endif /* __KERNEL__ */ 330 #endif /* _POWERPC_EEH_H */ 331