1 /* 2 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. 3 * Copyright 2001-2012 IBM Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20 #ifndef _POWERPC_EEH_H 21 #define _POWERPC_EEH_H 22 #ifdef __KERNEL__ 23 24 #include <linux/init.h> 25 #include <linux/list.h> 26 #include <linux/string.h> 27 28 struct pci_dev; 29 struct pci_bus; 30 struct device_node; 31 32 #ifdef CONFIG_EEH 33 34 /* 35 * The struct is used to trace PE related EEH functionality. 36 * In theory, there will have one instance of the struct to 37 * be created against particular PE. In nature, PEs corelate 38 * to each other. the struct has to reflect that hierarchy in 39 * order to easily pick up those affected PEs when one particular 40 * PE has EEH errors. 41 * 42 * Also, one particular PE might be composed of PCI device, PCI 43 * bus and its subordinate components. The struct also need ship 44 * the information. Further more, one particular PE is only meaingful 45 * in the corresponding PHB. Therefore, the root PEs should be created 46 * against existing PHBs in on-to-one fashion. 47 */ 48 #define EEH_PE_INVALID (1 << 0) /* Invalid */ 49 #define EEH_PE_PHB (1 << 1) /* PHB PE */ 50 #define EEH_PE_DEVICE (1 << 2) /* Device PE */ 51 #define EEH_PE_BUS (1 << 3) /* Bus PE */ 52 53 #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ 54 #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ 55 56 struct eeh_pe { 57 int type; /* PE type: PHB/Bus/Device */ 58 int state; /* PE EEH dependent mode */ 59 int config_addr; /* Traditional PCI address */ 60 int addr; /* PE configuration address */ 61 struct pci_controller *phb; /* Associated PHB */ 62 int check_count; /* Times of ignored error */ 63 int freeze_count; /* Times of froze up */ 64 int false_positives; /* Times of reported #ff's */ 65 struct eeh_pe *parent; /* Parent PE */ 66 struct list_head child_list; /* Link PE to the child list */ 67 struct list_head edevs; /* Link list of EEH devices */ 68 struct list_head child; /* Child PEs */ 69 }; 70 71 #define eeh_pe_for_each_dev(pe, edev) \ 72 list_for_each_entry(edev, &pe->edevs, list) 73 74 /* 75 * The struct is used to trace EEH state for the associated 76 * PCI device node or PCI device. In future, it might 77 * represent PE as well so that the EEH device to form 78 * another tree except the currently existing tree of PCI 79 * buses and PCI devices 80 */ 81 #define EEH_DEV_IRQ_DISABLED (1<<0) /* Interrupt disabled */ 82 83 struct eeh_dev { 84 int mode; /* EEH mode */ 85 int class_code; /* Class code of the device */ 86 int config_addr; /* Config address */ 87 int pe_config_addr; /* PE config address */ 88 u32 config_space[16]; /* Saved PCI config space */ 89 struct eeh_pe *pe; /* Associated PE */ 90 struct list_head list; /* Form link list in the PE */ 91 struct pci_controller *phb; /* Associated PHB */ 92 struct device_node *dn; /* Associated device node */ 93 struct pci_dev *pdev; /* Associated PCI device */ 94 }; 95 96 static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev) 97 { 98 return edev->dn; 99 } 100 101 static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev) 102 { 103 return edev->pdev; 104 } 105 106 /* 107 * The struct is used to trace the registered EEH operation 108 * callback functions. Actually, those operation callback 109 * functions are heavily platform dependent. That means the 110 * platform should register its own EEH operation callback 111 * functions before any EEH further operations. 112 */ 113 #define EEH_OPT_DISABLE 0 /* EEH disable */ 114 #define EEH_OPT_ENABLE 1 /* EEH enable */ 115 #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */ 116 #define EEH_OPT_THAW_DMA 3 /* DMA enable */ 117 #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */ 118 #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */ 119 #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */ 120 #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */ 121 #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */ 122 #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */ 123 #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */ 124 #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */ 125 #define EEH_RESET_HOT 1 /* Hot reset */ 126 #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */ 127 #define EEH_LOG_TEMP 1 /* EEH temporary error log */ 128 #define EEH_LOG_PERM 2 /* EEH permanent error log */ 129 130 struct eeh_ops { 131 char *name; 132 int (*init)(void); 133 void* (*of_probe)(struct device_node *dn, void *flag); 134 void* (*dev_probe)(struct pci_dev *dev, void *flag); 135 int (*set_option)(struct eeh_pe *pe, int option); 136 int (*get_pe_addr)(struct eeh_pe *pe); 137 int (*get_state)(struct eeh_pe *pe, int *state); 138 int (*reset)(struct eeh_pe *pe, int option); 139 int (*wait_state)(struct eeh_pe *pe, int max_wait); 140 int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len); 141 int (*configure_bridge)(struct eeh_pe *pe); 142 int (*read_config)(struct device_node *dn, int where, int size, u32 *val); 143 int (*write_config)(struct device_node *dn, int where, int size, u32 val); 144 }; 145 146 extern struct eeh_ops *eeh_ops; 147 extern int eeh_subsystem_enabled; 148 extern struct mutex eeh_mutex; 149 extern int eeh_probe_mode; 150 151 #define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */ 152 #define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */ 153 154 static inline void eeh_probe_mode_set(int flag) 155 { 156 eeh_probe_mode = flag; 157 } 158 159 static inline int eeh_probe_mode_devtree(void) 160 { 161 return (eeh_probe_mode == EEH_PROBE_MODE_DEVTREE); 162 } 163 164 static inline int eeh_probe_mode_dev(void) 165 { 166 return (eeh_probe_mode == EEH_PROBE_MODE_DEV); 167 } 168 169 static inline void eeh_lock(void) 170 { 171 mutex_lock(&eeh_mutex); 172 } 173 174 static inline void eeh_unlock(void) 175 { 176 mutex_unlock(&eeh_mutex); 177 } 178 179 /* 180 * Max number of EEH freezes allowed before we consider the device 181 * to be permanently disabled. 182 */ 183 #define EEH_MAX_ALLOWED_FREEZES 5 184 185 typedef void *(*eeh_traverse_func)(void *data, void *flag); 186 int __devinit eeh_phb_pe_create(struct pci_controller *phb); 187 int eeh_add_to_parent_pe(struct eeh_dev *edev); 188 int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe); 189 void *eeh_pe_dev_traverse(struct eeh_pe *root, 190 eeh_traverse_func fn, void *flag); 191 void eeh_pe_restore_bars(struct eeh_pe *pe); 192 struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe); 193 194 void * __devinit eeh_dev_init(struct device_node *dn, void *data); 195 void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb); 196 int __init eeh_ops_register(struct eeh_ops *ops); 197 int __exit eeh_ops_unregister(const char *name); 198 unsigned long eeh_check_failure(const volatile void __iomem *token, 199 unsigned long val); 200 int eeh_dev_check_failure(struct eeh_dev *edev); 201 void __init eeh_addr_cache_build(void); 202 void eeh_add_device_tree_early(struct device_node *); 203 void eeh_add_device_tree_late(struct pci_bus *); 204 void eeh_remove_bus_device(struct pci_dev *, int); 205 206 /** 207 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. 208 * 209 * If this macro yields TRUE, the caller relays to eeh_check_failure() 210 * which does further tests out of line. 211 */ 212 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) 213 214 /* 215 * Reads from a device which has been isolated by EEH will return 216 * all 1s. This macro gives an all-1s value of the given size (in 217 * bytes: 1, 2, or 4) for comparing with the result of a read. 218 */ 219 #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8)) 220 221 #else /* !CONFIG_EEH */ 222 223 static inline void *eeh_dev_init(struct device_node *dn, void *data) 224 { 225 return NULL; 226 } 227 228 static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { } 229 230 static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val) 231 { 232 return val; 233 } 234 235 #define eeh_dev_check_failure(x) (0) 236 237 static inline void eeh_addr_cache_build(void) { } 238 239 static inline void eeh_add_device_tree_early(struct device_node *dn) { } 240 241 static inline void eeh_add_device_tree_late(struct pci_bus *bus) { } 242 243 static inline void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe) { } 244 245 static inline void eeh_lock(void) { } 246 static inline void eeh_unlock(void) { } 247 248 #define EEH_POSSIBLE_ERROR(val, type) (0) 249 #define EEH_IO_ERROR_VALUE(size) (-1UL) 250 #endif /* CONFIG_EEH */ 251 252 #ifdef CONFIG_PPC64 253 /* 254 * MMIO read/write operations with EEH support. 255 */ 256 static inline u8 eeh_readb(const volatile void __iomem *addr) 257 { 258 u8 val = in_8(addr); 259 if (EEH_POSSIBLE_ERROR(val, u8)) 260 return eeh_check_failure(addr, val); 261 return val; 262 } 263 264 static inline u16 eeh_readw(const volatile void __iomem *addr) 265 { 266 u16 val = in_le16(addr); 267 if (EEH_POSSIBLE_ERROR(val, u16)) 268 return eeh_check_failure(addr, val); 269 return val; 270 } 271 272 static inline u32 eeh_readl(const volatile void __iomem *addr) 273 { 274 u32 val = in_le32(addr); 275 if (EEH_POSSIBLE_ERROR(val, u32)) 276 return eeh_check_failure(addr, val); 277 return val; 278 } 279 280 static inline u64 eeh_readq(const volatile void __iomem *addr) 281 { 282 u64 val = in_le64(addr); 283 if (EEH_POSSIBLE_ERROR(val, u64)) 284 return eeh_check_failure(addr, val); 285 return val; 286 } 287 288 static inline u16 eeh_readw_be(const volatile void __iomem *addr) 289 { 290 u16 val = in_be16(addr); 291 if (EEH_POSSIBLE_ERROR(val, u16)) 292 return eeh_check_failure(addr, val); 293 return val; 294 } 295 296 static inline u32 eeh_readl_be(const volatile void __iomem *addr) 297 { 298 u32 val = in_be32(addr); 299 if (EEH_POSSIBLE_ERROR(val, u32)) 300 return eeh_check_failure(addr, val); 301 return val; 302 } 303 304 static inline u64 eeh_readq_be(const volatile void __iomem *addr) 305 { 306 u64 val = in_be64(addr); 307 if (EEH_POSSIBLE_ERROR(val, u64)) 308 return eeh_check_failure(addr, val); 309 return val; 310 } 311 312 static inline void eeh_memcpy_fromio(void *dest, const 313 volatile void __iomem *src, 314 unsigned long n) 315 { 316 _memcpy_fromio(dest, src, n); 317 318 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes 319 * were copied. Check all four bytes. 320 */ 321 if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32)) 322 eeh_check_failure(src, *((u32 *)(dest + n - 4))); 323 } 324 325 /* in-string eeh macros */ 326 static inline void eeh_readsb(const volatile void __iomem *addr, void * buf, 327 int ns) 328 { 329 _insb(addr, buf, ns); 330 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8)) 331 eeh_check_failure(addr, *(u8*)buf); 332 } 333 334 static inline void eeh_readsw(const volatile void __iomem *addr, void * buf, 335 int ns) 336 { 337 _insw(addr, buf, ns); 338 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16)) 339 eeh_check_failure(addr, *(u16*)buf); 340 } 341 342 static inline void eeh_readsl(const volatile void __iomem *addr, void * buf, 343 int nl) 344 { 345 _insl(addr, buf, nl); 346 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32)) 347 eeh_check_failure(addr, *(u32*)buf); 348 } 349 350 #endif /* CONFIG_PPC64 */ 351 #endif /* __KERNEL__ */ 352 #endif /* _POWERPC_EEH_H */ 353