1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_POWERPC_BOOK3S_64_HUGETLB_H 3 #define _ASM_POWERPC_BOOK3S_64_HUGETLB_H 4 /* 5 * For radix we want generic code to handle hugetlb. But then if we want 6 * both hash and radix to be enabled together we need to workaround the 7 * limitations. 8 */ 9 void radix__flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr); 10 void radix__local_flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr); 11 12 extern void radix__huge_ptep_modify_prot_commit(struct vm_area_struct *vma, 13 unsigned long addr, pte_t *ptep, 14 pte_t old_pte, pte_t pte); 15 16 static inline int hstate_get_psize(struct hstate *hstate) 17 { 18 unsigned long shift; 19 20 shift = huge_page_shift(hstate); 21 if (shift == mmu_psize_defs[MMU_PAGE_2M].shift) 22 return MMU_PAGE_2M; 23 else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift) 24 return MMU_PAGE_1G; 25 else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift) 26 return MMU_PAGE_16M; 27 else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift) 28 return MMU_PAGE_16G; 29 else { 30 WARN(1, "Wrong huge page shift\n"); 31 return mmu_virtual_psize; 32 } 33 } 34 35 #define __HAVE_ARCH_GIGANTIC_PAGE_RUNTIME_SUPPORTED 36 static inline bool gigantic_page_runtime_supported(void) 37 { 38 /* 39 * We used gigantic page reservation with hypervisor assist in some case. 40 * We cannot use runtime allocation of gigantic pages in those platforms 41 * This is hash translation mode LPARs. 42 */ 43 if (firmware_has_feature(FW_FEATURE_LPAR) && !radix_enabled()) 44 return false; 45 46 return true; 47 } 48 49 /* hugepd entry valid bit */ 50 #define HUGEPD_VAL_BITS (0x8000000000000000UL) 51 52 #define huge_ptep_modify_prot_start huge_ptep_modify_prot_start 53 extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma, 54 unsigned long addr, pte_t *ptep); 55 56 #define huge_ptep_modify_prot_commit huge_ptep_modify_prot_commit 57 extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, 58 unsigned long addr, pte_t *ptep, 59 pte_t old_pte, pte_t new_pte); 60 /* 61 * This should work for other subarchs too. But right now we use the 62 * new format only for 64bit book3s 63 */ 64 static inline pte_t *hugepd_page(hugepd_t hpd) 65 { 66 BUG_ON(!hugepd_ok(hpd)); 67 /* 68 * We have only four bits to encode, MMU page size 69 */ 70 BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf); 71 return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK); 72 } 73 74 static inline unsigned int hugepd_mmu_psize(hugepd_t hpd) 75 { 76 return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2; 77 } 78 79 static inline unsigned int hugepd_shift(hugepd_t hpd) 80 { 81 return mmu_psize_to_shift(hugepd_mmu_psize(hpd)); 82 } 83 static inline void flush_hugetlb_page(struct vm_area_struct *vma, 84 unsigned long vmaddr) 85 { 86 if (radix_enabled()) 87 return radix__flush_hugetlb_page(vma, vmaddr); 88 } 89 90 static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, 91 unsigned int pdshift) 92 { 93 unsigned long idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd); 94 95 return hugepd_page(hpd) + idx; 96 } 97 98 static inline void hugepd_populate(hugepd_t *hpdp, pte_t *new, unsigned int pshift) 99 { 100 *hpdp = __hugepd(__pa(new) | HUGEPD_VAL_BITS | (shift_to_mmu_psize(pshift) << 2)); 101 } 102 103 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr); 104 105 static inline int check_and_get_huge_psize(int shift) 106 { 107 int mmu_psize; 108 109 if (shift > SLICE_HIGH_SHIFT) 110 return -EINVAL; 111 112 mmu_psize = shift_to_mmu_psize(shift); 113 114 /* 115 * We need to make sure that for different page sizes reported by 116 * firmware we only add hugetlb support for page sizes that can be 117 * supported by linux page table layout. 118 * For now we have 119 * Radix: 2M and 1G 120 * Hash: 16M and 16G 121 */ 122 if (radix_enabled()) { 123 if (mmu_psize != MMU_PAGE_2M && mmu_psize != MMU_PAGE_1G) 124 return -EINVAL; 125 } else { 126 if (mmu_psize != MMU_PAGE_16M && mmu_psize != MMU_PAGE_16G) 127 return -EINVAL; 128 } 129 return mmu_psize; 130 } 131 132 #endif 133