1 #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H 2 #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H 3 /* 4 * Entries per page directory level. The PTE level must use a 64b record 5 * for each page table entry. The PMD and PGD level use a 32b record for 6 * each entry by assuming that each entry is page aligned. 7 */ 8 #define H_PTE_INDEX_SIZE 9 9 #define H_PMD_INDEX_SIZE 7 10 #define H_PUD_INDEX_SIZE 9 11 #define H_PGD_INDEX_SIZE 9 12 13 #ifndef __ASSEMBLY__ 14 #define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE) 15 #define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE) 16 #define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE) 17 #define H_PGD_TABLE_SIZE (sizeof(pgd_t) << H_PGD_INDEX_SIZE) 18 19 /* With 4k base page size, hugepage PTEs go at the PMD level */ 20 #define MIN_HUGEPTE_SHIFT PMD_SHIFT 21 22 /* PTE flags to conserve for HPTE identification */ 23 #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \ 24 H_PAGE_F_SECOND | H_PAGE_F_GIX) 25 /* 26 * Not supported by 4k linux page size 27 */ 28 #define H_PAGE_4K_PFN 0x0 29 #define H_PAGE_THP_HUGE 0x0 30 #define H_PAGE_COMBO 0x0 31 #define H_PTE_FRAG_NR 0 32 #define H_PTE_FRAG_SIZE_SHIFT 0 33 /* 34 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() 35 */ 36 #define remap_4k_pfn(vma, addr, pfn, prot) \ 37 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) 38 39 #ifdef CONFIG_HUGETLB_PAGE 40 static inline int hash__hugepd_ok(hugepd_t hpd) 41 { 42 /* 43 * if it is not a pte and have hugepd shift mask 44 * set, then it is a hugepd directory pointer 45 */ 46 if (!(hpd.pd & _PAGE_PTE) && 47 ((hpd.pd & HUGEPD_SHIFT_MASK) != 0)) 48 return true; 49 return false; 50 } 51 #endif 52 53 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 54 55 static inline char *get_hpte_slot_array(pmd_t *pmdp) 56 { 57 BUG(); 58 return NULL; 59 } 60 61 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index) 62 { 63 BUG(); 64 return 0; 65 } 66 67 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array, 68 int index) 69 { 70 BUG(); 71 return 0; 72 } 73 74 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array, 75 unsigned int index, unsigned int hidx) 76 { 77 BUG(); 78 } 79 80 static inline int hash__pmd_trans_huge(pmd_t pmd) 81 { 82 return 0; 83 } 84 85 static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b) 86 { 87 BUG(); 88 return 0; 89 } 90 91 static inline pmd_t hash__pmd_mkhuge(pmd_t pmd) 92 { 93 BUG(); 94 return pmd; 95 } 96 97 extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm, 98 unsigned long addr, pmd_t *pmdp, 99 unsigned long clr, unsigned long set); 100 extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, 101 unsigned long address, pmd_t *pmdp); 102 extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 103 pgtable_t pgtable); 104 extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 105 extern void hash__pmdp_huge_split_prepare(struct vm_area_struct *vma, 106 unsigned long address, pmd_t *pmdp); 107 extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm, 108 unsigned long addr, pmd_t *pmdp); 109 extern int hash__has_transparent_hugepage(void); 110 #endif 111 112 #endif /* !__ASSEMBLY__ */ 113 114 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */ 115