xref: /linux/arch/powerpc/crypto/aes-spe-regs.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
274f2dc20SMarkus Stockhausen /*
374f2dc20SMarkus Stockhausen  * Common registers for PPC AES implementation
474f2dc20SMarkus Stockhausen  *
574f2dc20SMarkus Stockhausen  * Copyright (c) 2015 Markus Stockhausen <stockhausen@collogia.de>
674f2dc20SMarkus Stockhausen  */
774f2dc20SMarkus Stockhausen 
874f2dc20SMarkus Stockhausen #define rKS r0	/* copy of en-/decryption key pointer			*/
974f2dc20SMarkus Stockhausen #define rDP r3	/* destination pointer					*/
1074f2dc20SMarkus Stockhausen #define rSP r4	/* source pointer					*/
1174f2dc20SMarkus Stockhausen #define rKP r5	/* pointer to en-/decryption key pointer		*/
1274f2dc20SMarkus Stockhausen #define rRR r6	/* en-/decryption rounds				*/
1374f2dc20SMarkus Stockhausen #define rLN r7	/* length of data to be processed			*/
1474f2dc20SMarkus Stockhausen #define rIP r8	/* potiner to IV (CBC/CTR/XTS modes)			*/
1574f2dc20SMarkus Stockhausen #define rKT r9	/* pointer to tweak key (XTS mode)			*/
16eee09d2bSAndrea Gelmini #define rT0 r11	/* pointers to en-/decryption tables			*/
1774f2dc20SMarkus Stockhausen #define rT1 r10
1874f2dc20SMarkus Stockhausen #define rD0 r9	/* data 						*/
1974f2dc20SMarkus Stockhausen #define rD1 r14
2074f2dc20SMarkus Stockhausen #define rD2 r12
2174f2dc20SMarkus Stockhausen #define rD3 r15
2274f2dc20SMarkus Stockhausen #define rW0 r16	/* working registers					*/
2374f2dc20SMarkus Stockhausen #define rW1 r17
2474f2dc20SMarkus Stockhausen #define rW2 r18
2574f2dc20SMarkus Stockhausen #define rW3 r19
2674f2dc20SMarkus Stockhausen #define rW4 r20
2774f2dc20SMarkus Stockhausen #define rW5 r21
2874f2dc20SMarkus Stockhausen #define rW6 r22
2974f2dc20SMarkus Stockhausen #define rW7 r23
3074f2dc20SMarkus Stockhausen #define rI0 r24	/* IV							*/
3174f2dc20SMarkus Stockhausen #define rI1 r25
3274f2dc20SMarkus Stockhausen #define rI2 r26
3374f2dc20SMarkus Stockhausen #define rI3 r27
3474f2dc20SMarkus Stockhausen #define rG0 r28	/* endian reversed tweak (XTS mode)			*/
3574f2dc20SMarkus Stockhausen #define rG1 r29
3674f2dc20SMarkus Stockhausen #define rG2 r30
3774f2dc20SMarkus Stockhausen #define rG3 r31
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