xref: /linux/arch/powerpc/boot/ebony.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  * Copyright 2007 David Gibson, IBM Corporation.
3  *
4  * Based on earlier code:
5  *   Copyright (C) Paul Mackerras 1997.
6  *
7  *   Matt Porter <mporter@kernel.crashing.org>
8  *   Copyright 2002-2005 MontaVista Software Inc.
9  *
10  *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
11  *   Copyright (c) 2003, 2004 Zultys Technologies
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version
16  * 2 of the License, or (at your option) any later version.
17  */
18 #include <stdarg.h>
19 #include <stddef.h>
20 #include "types.h"
21 #include "elf.h"
22 #include "string.h"
23 #include "stdio.h"
24 #include "page.h"
25 #include "ops.h"
26 #include "reg.h"
27 #include "io.h"
28 #include "dcr.h"
29 #include "4xx.h"
30 #include "44x.h"
31 
32 static u8 *ebony_mac0, *ebony_mac1;
33 
34 #define EBONY_FPGA_PATH		"/plb/opb/ebc/fpga"
35 #define	EBONY_FPGA_FLASH_SEL	0x01
36 #define EBONY_SMALL_FLASH_PATH	"/plb/opb/ebc/small-flash"
37 
38 static void ebony_flashsel_fixup(void)
39 {
40 	void *devp;
41 	u32 reg[3] = {0x0, 0x0, 0x80000};
42 	u8 *fpga;
43 	u8 fpga_reg0 = 0x0;
44 
45 	devp = finddevice(EBONY_FPGA_PATH);
46 	if (!devp)
47 		fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH);
48 
49 	if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
50 		fatal("%s has missing or invalid virtual-reg property\n\r",
51 		      EBONY_FPGA_PATH);
52 
53 	fpga_reg0 = in_8(fpga);
54 
55 	devp = finddevice(EBONY_SMALL_FLASH_PATH);
56 	if (!devp)
57 		fatal("Couldn't locate small flash node %s\n\r",
58 		      EBONY_SMALL_FLASH_PATH);
59 
60 	if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg))
61 		fatal("%s has reg property of unexpected size\n\r",
62 		      EBONY_SMALL_FLASH_PATH);
63 
64 	/* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */
65 	if (fpga_reg0 & EBONY_FPGA_FLASH_SEL)
66 		reg[1] ^= 0x80000;
67 
68 	setprop(devp, "reg", reg, sizeof(reg));
69 }
70 
71 static void ebony_fixups(void)
72 {
73 	// FIXME: sysclk should be derived by reading the FPGA registers
74 	unsigned long sysclk = 33000000;
75 
76 	ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
77 	ibm4xx_sdram_fixup_memsize();
78 	dt_fixup_mac_address_by_alias("ethernet0", ebony_mac0);
79 	dt_fixup_mac_address_by_alias("ethernet1", ebony_mac1);
80 	ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
81 	ebony_flashsel_fixup();
82 }
83 
84 void ebony_init(void *mac0, void *mac1)
85 {
86 	platform_ops.fixups = ebony_fixups;
87 	platform_ops.exit = ibm44x_dbcr_reset;
88 	ebony_mac0 = mac0;
89 	ebony_mac1 = mac1;
90 	fdt_init(_dtb_start);
91 	serial_console_init();
92 }
93