xref: /linux/arch/powerpc/boot/ebony.c (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2007 David Gibson, IBM Corporation.
4  *
5  * Based on earlier code:
6  *   Copyright (C) Paul Mackerras 1997.
7  *
8  *   Matt Porter <mporter@kernel.crashing.org>
9  *   Copyright 2002-2005 MontaVista Software Inc.
10  *
11  *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
12  *   Copyright (c) 2003, 2004 Zultys Technologies
13  */
14 #include <stdarg.h>
15 #include <stddef.h>
16 #include "types.h"
17 #include "elf.h"
18 #include "string.h"
19 #include "stdio.h"
20 #include "page.h"
21 #include "ops.h"
22 #include "reg.h"
23 #include "io.h"
24 #include "dcr.h"
25 #include "4xx.h"
26 #include "44x.h"
27 
28 static u8 *ebony_mac0, *ebony_mac1;
29 
30 #define EBONY_FPGA_PATH		"/plb/opb/ebc/fpga"
31 #define	EBONY_FPGA_FLASH_SEL	0x01
32 #define EBONY_SMALL_FLASH_PATH	"/plb/opb/ebc/small-flash"
33 
34 static void ebony_flashsel_fixup(void)
35 {
36 	void *devp;
37 	u32 reg[3] = {0x0, 0x0, 0x80000};
38 	u8 *fpga;
39 	u8 fpga_reg0 = 0x0;
40 
41 	devp = finddevice(EBONY_FPGA_PATH);
42 	if (!devp)
43 		fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH);
44 
45 	if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
46 		fatal("%s has missing or invalid virtual-reg property\n\r",
47 		      EBONY_FPGA_PATH);
48 
49 	fpga_reg0 = in_8(fpga);
50 
51 	devp = finddevice(EBONY_SMALL_FLASH_PATH);
52 	if (!devp)
53 		fatal("Couldn't locate small flash node %s\n\r",
54 		      EBONY_SMALL_FLASH_PATH);
55 
56 	if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg))
57 		fatal("%s has reg property of unexpected size\n\r",
58 		      EBONY_SMALL_FLASH_PATH);
59 
60 	/* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */
61 	if (fpga_reg0 & EBONY_FPGA_FLASH_SEL)
62 		reg[1] ^= 0x80000;
63 
64 	setprop(devp, "reg", reg, sizeof(reg));
65 }
66 
67 static void ebony_fixups(void)
68 {
69 	// FIXME: sysclk should be derived by reading the FPGA registers
70 	unsigned long sysclk = 33000000;
71 
72 	ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
73 	ibm4xx_sdram_fixup_memsize();
74 	dt_fixup_mac_address_by_alias("ethernet0", ebony_mac0);
75 	dt_fixup_mac_address_by_alias("ethernet1", ebony_mac1);
76 	ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
77 	ebony_flashsel_fixup();
78 }
79 
80 void ebony_init(void *mac0, void *mac1)
81 {
82 	platform_ops.fixups = ebony_fixups;
83 	platform_ops.exit = ibm44x_dbcr_reset;
84 	ebony_mac0 = mac0;
85 	ebony_mac1 = mac1;
86 	fdt_init(_dtb_start);
87 	serial_console_init();
88 }
89