1*99192af0SSean MacLennan/* 2*99192af0SSean MacLennan * Device Tree Source for PIKA Warp 3*99192af0SSean MacLennan * 4*99192af0SSean MacLennan * Copyright (c) 2008 PIKA Technologies 5*99192af0SSean MacLennan * Sean MacLennan <smaclennan@pikatech.com> 6*99192af0SSean MacLennan * 7*99192af0SSean MacLennan * This file is licensed under the terms of the GNU General Public 8*99192af0SSean MacLennan * License version 2. This program is licensed "as is" without 9*99192af0SSean MacLennan * any warranty of any kind, whether express or implied. 10*99192af0SSean MacLennan */ 11*99192af0SSean MacLennan 12*99192af0SSean MacLennan/ { 13*99192af0SSean MacLennan #address-cells = <2>; 14*99192af0SSean MacLennan #size-cells = <1>; 15*99192af0SSean MacLennan model = "pika,warp"; 16*99192af0SSean MacLennan compatible = "pika,warp"; 17*99192af0SSean MacLennan dcr-parent = <&/cpus/cpu@0>; 18*99192af0SSean MacLennan 19*99192af0SSean MacLennan aliases { 20*99192af0SSean MacLennan ethernet0 = &EMAC0; 21*99192af0SSean MacLennan serial0 = &UART0; 22*99192af0SSean MacLennan }; 23*99192af0SSean MacLennan 24*99192af0SSean MacLennan cpus { 25*99192af0SSean MacLennan #address-cells = <1>; 26*99192af0SSean MacLennan #size-cells = <0>; 27*99192af0SSean MacLennan 28*99192af0SSean MacLennan cpu@0 { 29*99192af0SSean MacLennan device_type = "cpu"; 30*99192af0SSean MacLennan model = "PowerPC,440EP"; 31*99192af0SSean MacLennan reg = <0>; 32*99192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 33*99192af0SSean MacLennan timebase-frequency = <0>; /* Filled in by zImage */ 34*99192af0SSean MacLennan i-cache-line-size = <20>; 35*99192af0SSean MacLennan d-cache-line-size = <20>; 36*99192af0SSean MacLennan i-cache-size = <8000>; 37*99192af0SSean MacLennan d-cache-size = <8000>; 38*99192af0SSean MacLennan dcr-controller; 39*99192af0SSean MacLennan dcr-access-method = "native"; 40*99192af0SSean MacLennan }; 41*99192af0SSean MacLennan }; 42*99192af0SSean MacLennan 43*99192af0SSean MacLennan memory { 44*99192af0SSean MacLennan device_type = "memory"; 45*99192af0SSean MacLennan reg = <0 0 0>; /* Filled in by zImage */ 46*99192af0SSean MacLennan }; 47*99192af0SSean MacLennan 48*99192af0SSean MacLennan UIC0: interrupt-controller0 { 49*99192af0SSean MacLennan compatible = "ibm,uic-440ep","ibm,uic"; 50*99192af0SSean MacLennan interrupt-controller; 51*99192af0SSean MacLennan cell-index = <0>; 52*99192af0SSean MacLennan dcr-reg = <0c0 009>; 53*99192af0SSean MacLennan #address-cells = <0>; 54*99192af0SSean MacLennan #size-cells = <0>; 55*99192af0SSean MacLennan #interrupt-cells = <2>; 56*99192af0SSean MacLennan }; 57*99192af0SSean MacLennan 58*99192af0SSean MacLennan UIC1: interrupt-controller1 { 59*99192af0SSean MacLennan compatible = "ibm,uic-440ep","ibm,uic"; 60*99192af0SSean MacLennan interrupt-controller; 61*99192af0SSean MacLennan cell-index = <1>; 62*99192af0SSean MacLennan dcr-reg = <0d0 009>; 63*99192af0SSean MacLennan #address-cells = <0>; 64*99192af0SSean MacLennan #size-cells = <0>; 65*99192af0SSean MacLennan #interrupt-cells = <2>; 66*99192af0SSean MacLennan interrupts = <1e 4 1f 4>; /* cascade */ 67*99192af0SSean MacLennan interrupt-parent = <&UIC0>; 68*99192af0SSean MacLennan }; 69*99192af0SSean MacLennan 70*99192af0SSean MacLennan SDR0: sdr { 71*99192af0SSean MacLennan compatible = "ibm,sdr-440ep"; 72*99192af0SSean MacLennan dcr-reg = <00e 002>; 73*99192af0SSean MacLennan }; 74*99192af0SSean MacLennan 75*99192af0SSean MacLennan CPR0: cpr { 76*99192af0SSean MacLennan compatible = "ibm,cpr-440ep"; 77*99192af0SSean MacLennan dcr-reg = <00c 002>; 78*99192af0SSean MacLennan }; 79*99192af0SSean MacLennan 80*99192af0SSean MacLennan plb { 81*99192af0SSean MacLennan compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 82*99192af0SSean MacLennan #address-cells = <2>; 83*99192af0SSean MacLennan #size-cells = <1>; 84*99192af0SSean MacLennan ranges; 85*99192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 86*99192af0SSean MacLennan 87*99192af0SSean MacLennan SDRAM0: sdram { 88*99192af0SSean MacLennan compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 89*99192af0SSean MacLennan dcr-reg = <010 2>; 90*99192af0SSean MacLennan }; 91*99192af0SSean MacLennan 92*99192af0SSean MacLennan DMA0: dma { 93*99192af0SSean MacLennan compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 94*99192af0SSean MacLennan dcr-reg = <100 027>; 95*99192af0SSean MacLennan }; 96*99192af0SSean MacLennan 97*99192af0SSean MacLennan MAL0: mcmal { 98*99192af0SSean MacLennan compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 99*99192af0SSean MacLennan dcr-reg = <180 62>; 100*99192af0SSean MacLennan num-tx-chans = <4>; 101*99192af0SSean MacLennan num-rx-chans = <2>; 102*99192af0SSean MacLennan interrupt-parent = <&MAL0>; 103*99192af0SSean MacLennan interrupts = <0 1 2 3 4>; 104*99192af0SSean MacLennan #interrupt-cells = <1>; 105*99192af0SSean MacLennan #address-cells = <0>; 106*99192af0SSean MacLennan #size-cells = <0>; 107*99192af0SSean MacLennan interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 108*99192af0SSean MacLennan /*RXEOB*/ 1 &UIC0 b 4 109*99192af0SSean MacLennan /*SERR*/ 2 &UIC1 0 4 110*99192af0SSean MacLennan /*TXDE*/ 3 &UIC1 1 4 111*99192af0SSean MacLennan /*RXDE*/ 4 &UIC1 2 4>; 112*99192af0SSean MacLennan }; 113*99192af0SSean MacLennan 114*99192af0SSean MacLennan POB0: opb { 115*99192af0SSean MacLennan compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 116*99192af0SSean MacLennan #address-cells = <1>; 117*99192af0SSean MacLennan #size-cells = <1>; 118*99192af0SSean MacLennan ranges = <00000000 0 00000000 80000000 119*99192af0SSean MacLennan 80000000 0 80000000 80000000>; 120*99192af0SSean MacLennan interrupt-parent = <&UIC1>; 121*99192af0SSean MacLennan interrupts = <7 4>; 122*99192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 123*99192af0SSean MacLennan 124*99192af0SSean MacLennan EBC0: ebc { 125*99192af0SSean MacLennan compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 126*99192af0SSean MacLennan dcr-reg = <012 2>; 127*99192af0SSean MacLennan #address-cells = <2>; 128*99192af0SSean MacLennan #size-cells = <1>; 129*99192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 130*99192af0SSean MacLennan interrupts = <5 1>; 131*99192af0SSean MacLennan interrupt-parent = <&UIC1>; 132*99192af0SSean MacLennan 133*99192af0SSean MacLennan fpga@2,0 { 134*99192af0SSean MacLennan compatible = "pika,fpga"; 135*99192af0SSean MacLennan reg = <2 0 2200>; 136*99192af0SSean MacLennan interrupts = <18 8>; 137*99192af0SSean MacLennan interrupt-parent = <&UIC0>; 138*99192af0SSean MacLennan }; 139*99192af0SSean MacLennan 140*99192af0SSean MacLennan nor_flash@0,0 { 141*99192af0SSean MacLennan compatible = "amd,s29gl512n", "cfi-flash"; 142*99192af0SSean MacLennan bank-width = <2>; 143*99192af0SSean MacLennan reg = <0 0 4000000>; 144*99192af0SSean MacLennan #address-cells = <1>; 145*99192af0SSean MacLennan #size-cells = <1>; 146*99192af0SSean MacLennan partition@0 { 147*99192af0SSean MacLennan label = "kernel"; 148*99192af0SSean MacLennan reg = <0 180000>; 149*99192af0SSean MacLennan }; 150*99192af0SSean MacLennan partition@180000 { 151*99192af0SSean MacLennan label = "root"; 152*99192af0SSean MacLennan reg = <180000 3480000>; 153*99192af0SSean MacLennan }; 154*99192af0SSean MacLennan partition@3600000 { 155*99192af0SSean MacLennan label = "user"; 156*99192af0SSean MacLennan reg = <3600000 900000>; 157*99192af0SSean MacLennan }; 158*99192af0SSean MacLennan partition@3f00000 { 159*99192af0SSean MacLennan label = "fpga"; 160*99192af0SSean MacLennan reg = <3f00000 40000>; 161*99192af0SSean MacLennan }; 162*99192af0SSean MacLennan partition@3f40000 { 163*99192af0SSean MacLennan label = "env"; 164*99192af0SSean MacLennan reg = <3f40000 40000>; 165*99192af0SSean MacLennan }; 166*99192af0SSean MacLennan partition@3f80000 { 167*99192af0SSean MacLennan label = "u-boot"; 168*99192af0SSean MacLennan reg = <3f80000 80000>; 169*99192af0SSean MacLennan }; 170*99192af0SSean MacLennan }; 171*99192af0SSean MacLennan }; 172*99192af0SSean MacLennan 173*99192af0SSean MacLennan UART0: serial@ef600300 { 174*99192af0SSean MacLennan device_type = "serial"; 175*99192af0SSean MacLennan compatible = "ns16550"; 176*99192af0SSean MacLennan reg = <ef600300 8>; 177*99192af0SSean MacLennan virtual-reg = <ef600300>; 178*99192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 179*99192af0SSean MacLennan current-speed = <1c200>; 180*99192af0SSean MacLennan interrupt-parent = <&UIC0>; 181*99192af0SSean MacLennan interrupts = <0 4>; 182*99192af0SSean MacLennan }; 183*99192af0SSean MacLennan 184*99192af0SSean MacLennan IIC0: i2c@ef600700 { 185*99192af0SSean MacLennan compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 186*99192af0SSean MacLennan reg = <ef600700 14>; 187*99192af0SSean MacLennan interrupt-parent = <&UIC0>; 188*99192af0SSean MacLennan interrupts = <2 4>; 189*99192af0SSean MacLennan }; 190*99192af0SSean MacLennan 191*99192af0SSean MacLennan GPIO0: gpio@ef600b00 { 192*99192af0SSean MacLennan compatible = "ibm,gpio-440ep"; 193*99192af0SSean MacLennan reg = <ef600b00 48>; 194*99192af0SSean MacLennan }; 195*99192af0SSean MacLennan 196*99192af0SSean MacLennan GPIO1: gpio@ef600c00 { 197*99192af0SSean MacLennan compatible = "ibm,gpio-440ep"; 198*99192af0SSean MacLennan reg = <ef600c00 48>; 199*99192af0SSean MacLennan }; 200*99192af0SSean MacLennan 201*99192af0SSean MacLennan ZMII0: emac-zmii@ef600d00 { 202*99192af0SSean MacLennan compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 203*99192af0SSean MacLennan reg = <ef600d00 c>; 204*99192af0SSean MacLennan }; 205*99192af0SSean MacLennan 206*99192af0SSean MacLennan EMAC0: ethernet@ef600e00 { 207*99192af0SSean MacLennan linux,network-index = <0>; 208*99192af0SSean MacLennan device_type = "network"; 209*99192af0SSean MacLennan compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 210*99192af0SSean MacLennan interrupt-parent = <&UIC1>; 211*99192af0SSean MacLennan interrupts = <1c 4 1d 4>; 212*99192af0SSean MacLennan reg = <ef600e00 70>; 213*99192af0SSean MacLennan local-mac-address = [000000000000]; 214*99192af0SSean MacLennan mal-device = <&MAL0>; 215*99192af0SSean MacLennan mal-tx-channel = <0 1>; 216*99192af0SSean MacLennan mal-rx-channel = <0>; 217*99192af0SSean MacLennan cell-index = <0>; 218*99192af0SSean MacLennan max-frame-size = <5dc>; 219*99192af0SSean MacLennan rx-fifo-size = <1000>; 220*99192af0SSean MacLennan tx-fifo-size = <800>; 221*99192af0SSean MacLennan phy-mode = "rmii"; 222*99192af0SSean MacLennan phy-map = <00000000>; 223*99192af0SSean MacLennan zmii-device = <&ZMII0>; 224*99192af0SSean MacLennan zmii-channel = <0>; 225*99192af0SSean MacLennan }; 226*99192af0SSean MacLennan 227*99192af0SSean MacLennan usb@ef601000 { 228*99192af0SSean MacLennan compatible = "ohci-be"; 229*99192af0SSean MacLennan reg = <ef601000 80>; 230*99192af0SSean MacLennan interrupts = <8 1 9 1>; 231*99192af0SSean MacLennan interrupt-parent = < &UIC1 >; 232*99192af0SSean MacLennan }; 233*99192af0SSean MacLennan }; 234*99192af0SSean MacLennan }; 235*99192af0SSean MacLennan 236*99192af0SSean MacLennan chosen { 237*99192af0SSean MacLennan linux,stdout-path = "/plb/opb/serial@ef600300"; 238*99192af0SSean MacLennan }; 239*99192af0SSean MacLennan}; 240