1/* 2 * Device Tree Source for AMCC Sequoia 3 * 4 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com> 5 * Copyright (c) 2006, 2007 IBM Corp. 6 * 7 * FIXME: Draft only! 8 * 9 * This file is licensed under the terms of the GNU General Public 10 * License version 2. This program is licensed "as is" without 11 * any warranty of any kind, whether express or implied. 12 * 13 */ 14 15/dts-v1/; 16 17/ { 18 #address-cells = <2>; 19 #size-cells = <1>; 20 model = "amcc,sequoia"; 21 compatible = "amcc,sequoia"; 22 dcr-parent = <&{/cpus/cpu@0}>; 23 24 aliases { 25 ethernet0 = &EMAC0; 26 ethernet1 = &EMAC1; 27 serial0 = &UART0; 28 serial1 = &UART1; 29 serial2 = &UART2; 30 serial3 = &UART3; 31 }; 32 33 cpus { 34 #address-cells = <1>; 35 #size-cells = <0>; 36 37 cpu@0 { 38 device_type = "cpu"; 39 model = "PowerPC,440EPx"; 40 reg = <0x00000000>; 41 clock-frequency = <0>; /* Filled in by zImage */ 42 timebase-frequency = <0>; /* Filled in by zImage */ 43 i-cache-line-size = <32>; 44 d-cache-line-size = <32>; 45 i-cache-size = <32768>; 46 d-cache-size = <32768>; 47 dcr-controller; 48 dcr-access-method = "native"; 49 }; 50 }; 51 52 memory { 53 device_type = "memory"; 54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ 55 }; 56 57 UIC0: interrupt-controller0 { 58 compatible = "ibm,uic-440epx","ibm,uic"; 59 interrupt-controller; 60 cell-index = <0>; 61 dcr-reg = <0x0c0 0x009>; 62 #address-cells = <0>; 63 #size-cells = <0>; 64 #interrupt-cells = <2>; 65 }; 66 67 UIC1: interrupt-controller1 { 68 compatible = "ibm,uic-440epx","ibm,uic"; 69 interrupt-controller; 70 cell-index = <1>; 71 dcr-reg = <0x0d0 0x009>; 72 #address-cells = <0>; 73 #size-cells = <0>; 74 #interrupt-cells = <2>; 75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 76 interrupt-parent = <&UIC0>; 77 }; 78 79 UIC2: interrupt-controller2 { 80 compatible = "ibm,uic-440epx","ibm,uic"; 81 interrupt-controller; 82 cell-index = <2>; 83 dcr-reg = <0x0e0 0x009>; 84 #address-cells = <0>; 85 #size-cells = <0>; 86 #interrupt-cells = <2>; 87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ 88 interrupt-parent = <&UIC0>; 89 }; 90 91 SDR0: sdr { 92 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; 93 dcr-reg = <0x00e 0x002>; 94 }; 95 96 CPR0: cpr { 97 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; 98 dcr-reg = <0x00c 0x002>; 99 }; 100 101 plb { 102 compatible = "ibm,plb-440epx", "ibm,plb4"; 103 #address-cells = <2>; 104 #size-cells = <1>; 105 ranges; 106 clock-frequency = <0>; /* Filled in by zImage */ 107 108 SDRAM0: sdram { 109 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; 110 dcr-reg = <0x010 0x002>; 111 }; 112 113 DMA0: dma { 114 compatible = "ibm,dma-440epx", "ibm,dma-4xx"; 115 dcr-reg = <0x100 0x027>; 116 }; 117 118 MAL0: mcmal { 119 compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; 120 dcr-reg = <0x180 0x062>; 121 num-tx-chans = <2>; 122 num-rx-chans = <2>; 123 interrupt-parent = <&MAL0>; 124 interrupts = <0x0 0x1 0x2 0x3 0x4>; 125 #interrupt-cells = <1>; 126 #address-cells = <0>; 127 #size-cells = <0>; 128 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 129 /*RXEOB*/ 0x1 &UIC0 0xb 0x4 130 /*SERR*/ 0x2 &UIC1 0x0 0x4 131 /*TXDE*/ 0x3 &UIC1 0x1 0x4 132 /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 133 interrupt-map-mask = <0xffffffff>; 134 }; 135 136 USB1: usb@e0000400 { 137 compatible = "ibm,usb-ohci-440epx", "ohci-be"; 138 reg = <0x00000000 0xe0000400 0x00000060>; 139 interrupt-parent = <&UIC0>; 140 interrupts = <0x15 0x8>; 141 }; 142 143 USB0: ehci@e0000300 { 144 compatible = "ibm,usb-ehci-440epx", "usb-ehci"; 145 interrupt-parent = <&UIC0>; 146 interrupts = <0x1a 0x4>; 147 reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>; 148 big-endian; 149 }; 150 151 POB0: opb { 152 compatible = "ibm,opb-440epx", "ibm,opb"; 153 #address-cells = <1>; 154 #size-cells = <1>; 155 ranges = <0x00000000 0x00000001 0x00000000 0x80000000 156 0x80000000 0x00000001 0x80000000 0x80000000>; 157 interrupt-parent = <&UIC1>; 158 interrupts = <0x7 0x4>; 159 clock-frequency = <0>; /* Filled in by zImage */ 160 161 EBC0: ebc { 162 compatible = "ibm,ebc-440epx", "ibm,ebc"; 163 dcr-reg = <0x012 0x002>; 164 #address-cells = <2>; 165 #size-cells = <1>; 166 clock-frequency = <0>; /* Filled in by zImage */ 167 interrupts = <0x5 0x1>; 168 interrupt-parent = <&UIC1>; 169 170 nor_flash@0,0 { 171 compatible = "amd,s29gl256n", "cfi-flash"; 172 bank-width = <2>; 173 reg = <0x00000000 0x00000000 0x04000000>; 174 #address-cells = <1>; 175 #size-cells = <1>; 176 partition@0 { 177 label = "Kernel"; 178 reg = <0x00000000 0x00180000>; 179 }; 180 partition@180000 { 181 label = "ramdisk"; 182 reg = <0x00180000 0x00200000>; 183 }; 184 partition@380000 { 185 label = "file system"; 186 reg = <0x00380000 0x03aa0000>; 187 }; 188 partition@3e20000 { 189 label = "kozio"; 190 reg = <0x03e20000 0x00140000>; 191 }; 192 partition@3f60000 { 193 label = "env"; 194 reg = <0x03f60000 0x00040000>; 195 }; 196 partition@3fa0000 { 197 label = "u-boot"; 198 reg = <0x03fa0000 0x00060000>; 199 }; 200 }; 201 202 }; 203 204 UART0: serial@ef600300 { 205 device_type = "serial"; 206 compatible = "ns16550"; 207 reg = <0xef600300 0x00000008>; 208 virtual-reg = <0xef600300>; 209 clock-frequency = <0>; /* Filled in by zImage */ 210 current-speed = <115200>; 211 interrupt-parent = <&UIC0>; 212 interrupts = <0x0 0x4>; 213 }; 214 215 UART1: serial@ef600400 { 216 device_type = "serial"; 217 compatible = "ns16550"; 218 reg = <0xef600400 0x00000008>; 219 virtual-reg = <0xef600400>; 220 clock-frequency = <0>; 221 current-speed = <0>; 222 interrupt-parent = <&UIC0>; 223 interrupts = <0x1 0x4>; 224 }; 225 226 UART2: serial@ef600500 { 227 device_type = "serial"; 228 compatible = "ns16550"; 229 reg = <0xef600500 0x00000008>; 230 virtual-reg = <0xef600500>; 231 clock-frequency = <0>; 232 current-speed = <0>; 233 interrupt-parent = <&UIC1>; 234 interrupts = <0x3 0x4>; 235 }; 236 237 UART3: serial@ef600600 { 238 device_type = "serial"; 239 compatible = "ns16550"; 240 reg = <0xef600600 0x00000008>; 241 virtual-reg = <0xef600600>; 242 clock-frequency = <0>; 243 current-speed = <0>; 244 interrupt-parent = <&UIC1>; 245 interrupts = <0x4 0x4>; 246 }; 247 248 IIC0: i2c@ef600700 { 249 #address-cells = <1>; 250 #size-cells = <0>; 251 compatible = "ibm,iic-440epx", "ibm,iic"; 252 reg = <0xef600700 0x00000014>; 253 interrupt-parent = <&UIC0>; 254 interrupts = <0x2 0x4>; 255 256 hwmon@48 { 257 compatible = "adi,ad7414"; 258 reg = <0x48>; 259 }; 260 }; 261 262 IIC1: i2c@ef600800 { 263 #address-cells = <1>; 264 #size-cells = <0>; 265 compatible = "ibm,iic-440epx", "ibm,iic"; 266 reg = <0xef600800 0x00000014>; 267 interrupt-parent = <&UIC0>; 268 interrupts = <0x7 0x4>; 269 }; 270 271 ZMII0: emac-zmii@ef600d00 { 272 compatible = "ibm,zmii-440epx", "ibm,zmii"; 273 reg = <0xef600d00 0x0000000c>; 274 }; 275 276 RGMII0: emac-rgmii@ef601000 { 277 compatible = "ibm,rgmii-440epx", "ibm,rgmii"; 278 reg = <0xef601000 0x00000008>; 279 has-mdio; 280 }; 281 282 EMAC0: ethernet@ef600e00 { 283 device_type = "network"; 284 compatible = "ibm,emac-440epx", "ibm,emac4"; 285 interrupt-parent = <&EMAC0>; 286 interrupts = <0x0 0x1>; 287 #interrupt-cells = <1>; 288 #address-cells = <0>; 289 #size-cells = <0>; 290 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 291 /*Wake*/ 0x1 &UIC1 0x1d 0x4>; 292 reg = <0xef600e00 0x00000074>; 293 local-mac-address = [000000000000]; 294 mal-device = <&MAL0>; 295 mal-tx-channel = <0>; 296 mal-rx-channel = <0>; 297 cell-index = <0>; 298 max-frame-size = <9000>; 299 rx-fifo-size = <4096>; 300 tx-fifo-size = <2048>; 301 phy-mode = "rgmii"; 302 phy-map = <0x00000000>; 303 zmii-device = <&ZMII0>; 304 zmii-channel = <0>; 305 rgmii-device = <&RGMII0>; 306 rgmii-channel = <0>; 307 has-inverted-stacr-oc; 308 has-new-stacr-staopc; 309 }; 310 311 EMAC1: ethernet@ef600f00 { 312 device_type = "network"; 313 compatible = "ibm,emac-440epx", "ibm,emac4"; 314 interrupt-parent = <&EMAC1>; 315 interrupts = <0x0 0x1>; 316 #interrupt-cells = <1>; 317 #address-cells = <0>; 318 #size-cells = <0>; 319 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 320 /*Wake*/ 0x1 &UIC1 0x1f 0x4>; 321 reg = <0xef600f00 0x00000074>; 322 local-mac-address = [000000000000]; 323 mal-device = <&MAL0>; 324 mal-tx-channel = <1>; 325 mal-rx-channel = <1>; 326 cell-index = <1>; 327 max-frame-size = <9000>; 328 rx-fifo-size = <4096>; 329 tx-fifo-size = <2048>; 330 phy-mode = "rgmii"; 331 phy-map = <0x00000000>; 332 zmii-device = <&ZMII0>; 333 zmii-channel = <1>; 334 rgmii-device = <&RGMII0>; 335 rgmii-channel = <1>; 336 has-inverted-stacr-oc; 337 has-new-stacr-staopc; 338 }; 339 }; 340 341 PCI0: pci@1ec000000 { 342 device_type = "pci"; 343 #interrupt-cells = <1>; 344 #size-cells = <2>; 345 #address-cells = <3>; 346 compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; 347 primary; 348 reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ 349 0x00000001 0xeed00000 0x00000004 /* IACK */ 350 0x00000001 0xeed00000 0x00000004 /* Special cycle */ 351 0x00000001 0xef400000 0x00000040>; /* Internal registers */ 352 353 /* Outbound ranges, one memory and one IO, 354 * later cannot be changed. Chip supports a second 355 * IO range but we don't use it for now 356 * From the 440EPx user manual: 357 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB 358 * I/O 1 E800 0000 1 E800 FFFF 64KB 359 * I/O 1 E880 0000 1 EBFF FFFF 56MB 360 */ 361 ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000 362 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000 363 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>; 364 365 /* Inbound 2GB range starting at 0 */ 366 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 367 368 /* All PCI interrupts are routed to IRQ 67 */ 369 interrupt-map-mask = <0x0 0x0 0x0 0x0>; 370 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; 371 }; 372 }; 373 374 chosen { 375 linux,stdout-path = "/plb/opb/serial@ef600300"; 376 bootargs = "console=ttyS0,115200"; 377 }; 378}; 379