xref: /linux/arch/powerpc/boot/dts/sequoia.dts (revision 72fda1148e14d2f06d8653c26f579b7d2dabba57)
1d60ff953SValentine Barshak/*
2d60ff953SValentine Barshak * Device Tree Source for AMCC Sequoia
3d60ff953SValentine Barshak *
4d60ff953SValentine Barshak * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
5d60ff953SValentine Barshak * Copyright (c) 2006, 2007 IBM Corp.
6d60ff953SValentine Barshak *
7d60ff953SValentine Barshak * FIXME: Draft only!
8d60ff953SValentine Barshak *
9d60ff953SValentine Barshak * This file is licensed under the terms of the GNU General Public
10d60ff953SValentine Barshak * License version 2.  This program is licensed "as is" without
11d60ff953SValentine Barshak * any warranty of any kind, whether express or implied.
12d60ff953SValentine Barshak *
13d60ff953SValentine Barshak */
14d60ff953SValentine Barshak
15d60ff953SValentine Barshak/ {
16d60ff953SValentine Barshak	#address-cells = <2>;
17d60ff953SValentine Barshak	#size-cells = <1>;
18d60ff953SValentine Barshak	model = "amcc,sequoia";
19d60ff953SValentine Barshak	compatible = "amcc,sequoia";
20*72fda114SJosh Boyer	dcr-parent = <&/cpus/cpu@0>;
21d60ff953SValentine Barshak
22d60ff953SValentine Barshak	cpus {
23d60ff953SValentine Barshak		#address-cells = <1>;
24d60ff953SValentine Barshak		#size-cells = <0>;
25d60ff953SValentine Barshak
26*72fda114SJosh Boyer		cpu@0 {
27d60ff953SValentine Barshak			device_type = "cpu";
28*72fda114SJosh Boyer			model = "PowerPC,440EPx";
29d60ff953SValentine Barshak			reg = <0>;
30d60ff953SValentine Barshak			clock-frequency = <0>; /* Filled in by zImage */
31d60ff953SValentine Barshak			timebase-frequency = <0>; /* Filled in by zImage */
32d60ff953SValentine Barshak			i-cache-line-size = <20>;
33d60ff953SValentine Barshak			d-cache-line-size = <20>;
34d60ff953SValentine Barshak			i-cache-size = <8000>;
35d60ff953SValentine Barshak			d-cache-size = <8000>;
36d60ff953SValentine Barshak			dcr-controller;
37d60ff953SValentine Barshak			dcr-access-method = "native";
38d60ff953SValentine Barshak		};
39d60ff953SValentine Barshak	};
40d60ff953SValentine Barshak
41d60ff953SValentine Barshak	memory {
42d60ff953SValentine Barshak		device_type = "memory";
43d60ff953SValentine Barshak		reg = <0 0 0>; /* Filled in by zImage */
44d60ff953SValentine Barshak	};
45d60ff953SValentine Barshak
46d60ff953SValentine Barshak	UIC0: interrupt-controller0 {
47d60ff953SValentine Barshak		compatible = "ibm,uic-440epx","ibm,uic";
48d60ff953SValentine Barshak		interrupt-controller;
49d60ff953SValentine Barshak		cell-index = <0>;
50d60ff953SValentine Barshak		dcr-reg = <0c0 009>;
51d60ff953SValentine Barshak		#address-cells = <0>;
52d60ff953SValentine Barshak		#size-cells = <0>;
53d60ff953SValentine Barshak		#interrupt-cells = <2>;
54d60ff953SValentine Barshak	};
55d60ff953SValentine Barshak
56d60ff953SValentine Barshak	UIC1: interrupt-controller1 {
57d60ff953SValentine Barshak		compatible = "ibm,uic-440epx","ibm,uic";
58d60ff953SValentine Barshak		interrupt-controller;
59d60ff953SValentine Barshak		cell-index = <1>;
60d60ff953SValentine Barshak		dcr-reg = <0d0 009>;
61d60ff953SValentine Barshak		#address-cells = <0>;
62d60ff953SValentine Barshak		#size-cells = <0>;
63d60ff953SValentine Barshak		#interrupt-cells = <2>;
64d60ff953SValentine Barshak		interrupts = <1e 4 1f 4>; /* cascade */
65d60ff953SValentine Barshak		interrupt-parent = <&UIC0>;
66d60ff953SValentine Barshak	};
67d60ff953SValentine Barshak
68d60ff953SValentine Barshak	UIC2: interrupt-controller2 {
69d60ff953SValentine Barshak		compatible = "ibm,uic-440epx","ibm,uic";
70d60ff953SValentine Barshak		interrupt-controller;
71d60ff953SValentine Barshak		cell-index = <2>;
72d60ff953SValentine Barshak		dcr-reg = <0e0 009>;
73d60ff953SValentine Barshak		#address-cells = <0>;
74d60ff953SValentine Barshak		#size-cells = <0>;
75d60ff953SValentine Barshak		#interrupt-cells = <2>;
76d60ff953SValentine Barshak		interrupts = <1c 4 1d 4>; /* cascade */
77d60ff953SValentine Barshak		interrupt-parent = <&UIC0>;
78d60ff953SValentine Barshak	};
79d60ff953SValentine Barshak
80d60ff953SValentine Barshak	SDR0: sdr {
81d60ff953SValentine Barshak		compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
82d60ff953SValentine Barshak		dcr-reg = <00e 002>;
83d60ff953SValentine Barshak	};
84d60ff953SValentine Barshak
85d60ff953SValentine Barshak	CPR0: cpr {
86d60ff953SValentine Barshak		compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
87d60ff953SValentine Barshak		dcr-reg = <00c 002>;
88d60ff953SValentine Barshak	};
89d60ff953SValentine Barshak
90d60ff953SValentine Barshak	plb {
91d60ff953SValentine Barshak		compatible = "ibm,plb-440epx", "ibm,plb4";
92d60ff953SValentine Barshak		#address-cells = <2>;
93d60ff953SValentine Barshak		#size-cells = <1>;
94d60ff953SValentine Barshak		ranges;
95d60ff953SValentine Barshak		clock-frequency = <0>; /* Filled in by zImage */
96d60ff953SValentine Barshak
97d60ff953SValentine Barshak		SDRAM0: sdram {
98d60ff953SValentine Barshak			compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
99d60ff953SValentine Barshak			dcr-reg = <010 2>;
100d60ff953SValentine Barshak		};
101d60ff953SValentine Barshak
102d60ff953SValentine Barshak		DMA0: dma {
103d60ff953SValentine Barshak			compatible = "ibm,dma-440epx", "ibm,dma-4xx";
104d60ff953SValentine Barshak			dcr-reg = <100 027>;
105d60ff953SValentine Barshak		};
106d60ff953SValentine Barshak
107d60ff953SValentine Barshak		MAL0: mcmal {
108d60ff953SValentine Barshak			compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
109d60ff953SValentine Barshak			dcr-reg = <180 62>;
110bd0076ccSValentine Barshak			num-tx-chans = <2>;
111bd0076ccSValentine Barshak			num-rx-chans = <2>;
112d60ff953SValentine Barshak			interrupt-parent = <&MAL0>;
113d60ff953SValentine Barshak			interrupts = <0 1 2 3 4>;
114d60ff953SValentine Barshak			#interrupt-cells = <1>;
115d60ff953SValentine Barshak			#address-cells = <0>;
116d60ff953SValentine Barshak			#size-cells = <0>;
117d60ff953SValentine Barshak			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
118d60ff953SValentine Barshak					/*RXEOB*/ 1 &UIC0 b 4
119d60ff953SValentine Barshak					/*SERR*/  2 &UIC1 0 4
120d60ff953SValentine Barshak					/*TXDE*/  3 &UIC1 1 4
121d60ff953SValentine Barshak					/*RXDE*/  4 &UIC1 2 4>;
122d60ff953SValentine Barshak			interrupt-map-mask = <ffffffff>;
123d60ff953SValentine Barshak		};
124d60ff953SValentine Barshak
125f82f5a26SValentine Barshak		USB1: usb@e0000400 {
126f82f5a26SValentine Barshak			compatible = "ohci-be";
127f82f5a26SValentine Barshak			reg = <0 e0000400 60>;
128f82f5a26SValentine Barshak			interrupt-parent = <&UIC0>;
129f82f5a26SValentine Barshak			interrupts = <15 8>;
130f82f5a26SValentine Barshak		};
131f82f5a26SValentine Barshak
132d60ff953SValentine Barshak		POB0: opb {
133d60ff953SValentine Barshak		  	compatible = "ibm,opb-440epx", "ibm,opb";
134d60ff953SValentine Barshak			#address-cells = <1>;
135d60ff953SValentine Barshak			#size-cells = <1>;
136d60ff953SValentine Barshak		  	ranges = <00000000 1 00000000 80000000
137d60ff953SValentine Barshak			          80000000 1 80000000 80000000>;
138d60ff953SValentine Barshak		  	interrupt-parent = <&UIC1>;
139d60ff953SValentine Barshak		  	interrupts = <7 4>;
140d60ff953SValentine Barshak		  	clock-frequency = <0>; /* Filled in by zImage */
141d60ff953SValentine Barshak
142d60ff953SValentine Barshak			EBC0: ebc {
143d60ff953SValentine Barshak				compatible = "ibm,ebc-440epx", "ibm,ebc";
144d60ff953SValentine Barshak				dcr-reg = <012 2>;
145d60ff953SValentine Barshak				#address-cells = <2>;
146d60ff953SValentine Barshak				#size-cells = <1>;
147d60ff953SValentine Barshak				clock-frequency = <0>; /* Filled in by zImage */
148d60ff953SValentine Barshak				interrupts = <5 1>;
149d60ff953SValentine Barshak				interrupt-parent = <&UIC1>;
150d60ff953SValentine Barshak
151d60ff953SValentine Barshak				nor_flash@0,0 {
152504ca43eSJosh Boyer					compatible = "amd,s29gl256n", "cfi-flash";
153d60ff953SValentine Barshak					bank-width = <2>;
154d60ff953SValentine Barshak					reg = <0 000000 4000000>;
155504ca43eSJosh Boyer					#address-cells = <1>;
156504ca43eSJosh Boyer					#size-cells = <1>;
157504ca43eSJosh Boyer					partition@0 {
158504ca43eSJosh Boyer						label = "Kernel";
159504ca43eSJosh Boyer						reg = <0 180000>;
160504ca43eSJosh Boyer					};
161504ca43eSJosh Boyer					partition@180000 {
162504ca43eSJosh Boyer						label = "ramdisk";
163504ca43eSJosh Boyer						reg = <180000 200000>;
164504ca43eSJosh Boyer					};
165504ca43eSJosh Boyer					partition@380000 {
166504ca43eSJosh Boyer						label = "file system";
167504ca43eSJosh Boyer						reg = <380000 3aa0000>;
168504ca43eSJosh Boyer					};
169504ca43eSJosh Boyer					partition@3e20000 {
170504ca43eSJosh Boyer						label = "kozio";
171504ca43eSJosh Boyer						reg = <3e20000 140000>;
172504ca43eSJosh Boyer					};
173504ca43eSJosh Boyer					partition@3f60000 {
174504ca43eSJosh Boyer						label = "env";
175504ca43eSJosh Boyer						reg = <3f60000 40000>;
176504ca43eSJosh Boyer					};
177504ca43eSJosh Boyer					partition@3fa0000 {
178504ca43eSJosh Boyer						label = "u-boot";
179504ca43eSJosh Boyer						reg = <3fa0000 60000>;
180504ca43eSJosh Boyer					};
181d60ff953SValentine Barshak				};
182d60ff953SValentine Barshak
183d60ff953SValentine Barshak			};
184d60ff953SValentine Barshak
185d60ff953SValentine Barshak			UART0: serial@ef600300 {
186d60ff953SValentine Barshak		   		device_type = "serial";
187d60ff953SValentine Barshak		   		compatible = "ns16550";
188d60ff953SValentine Barshak		   		reg = <ef600300 8>;
189d60ff953SValentine Barshak		   		virtual-reg = <ef600300>;
190d60ff953SValentine Barshak		   		clock-frequency = <0>; /* Filled in by zImage */
191d60ff953SValentine Barshak		   		current-speed = <1c200>;
192d60ff953SValentine Barshak		   		interrupt-parent = <&UIC0>;
193d60ff953SValentine Barshak		   		interrupts = <0 4>;
194d60ff953SValentine Barshak	   		};
195d60ff953SValentine Barshak
196d60ff953SValentine Barshak			UART1: serial@ef600400 {
197d60ff953SValentine Barshak		   		device_type = "serial";
198d60ff953SValentine Barshak		   		compatible = "ns16550";
199d60ff953SValentine Barshak		   		reg = <ef600400 8>;
200d60ff953SValentine Barshak		   		virtual-reg = <ef600400>;
201d60ff953SValentine Barshak		   		clock-frequency = <0>;
202d60ff953SValentine Barshak		   		current-speed = <0>;
203d60ff953SValentine Barshak		   		interrupt-parent = <&UIC0>;
204d60ff953SValentine Barshak		   		interrupts = <1 4>;
205d60ff953SValentine Barshak	   		};
206d60ff953SValentine Barshak
207d60ff953SValentine Barshak			UART2: serial@ef600500 {
208d60ff953SValentine Barshak		   		device_type = "serial";
209d60ff953SValentine Barshak		   		compatible = "ns16550";
210d60ff953SValentine Barshak		   		reg = <ef600500 8>;
211d60ff953SValentine Barshak		   		virtual-reg = <ef600500>;
212d60ff953SValentine Barshak		   		clock-frequency = <0>;
213d60ff953SValentine Barshak		   		current-speed = <0>;
214d60ff953SValentine Barshak		   		interrupt-parent = <&UIC1>;
215d60ff953SValentine Barshak		   		interrupts = <3 4>;
216d60ff953SValentine Barshak	   		};
217d60ff953SValentine Barshak
218d60ff953SValentine Barshak			UART3: serial@ef600600 {
219d60ff953SValentine Barshak		   		device_type = "serial";
220d60ff953SValentine Barshak		   		compatible = "ns16550";
221d60ff953SValentine Barshak		   		reg = <ef600600 8>;
222d60ff953SValentine Barshak		   		virtual-reg = <ef600600>;
223d60ff953SValentine Barshak		   		clock-frequency = <0>;
224d60ff953SValentine Barshak		   		current-speed = <0>;
225d60ff953SValentine Barshak		   		interrupt-parent = <&UIC1>;
226d60ff953SValentine Barshak		   		interrupts = <4 4>;
227d60ff953SValentine Barshak	   		};
228d60ff953SValentine Barshak
229d60ff953SValentine Barshak			IIC0: i2c@ef600700 {
230d60ff953SValentine Barshak				device_type = "i2c";
231d60ff953SValentine Barshak				compatible = "ibm,iic-440epx", "ibm,iic";
232d60ff953SValentine Barshak				reg = <ef600700 14>;
233d60ff953SValentine Barshak				interrupt-parent = <&UIC0>;
234d60ff953SValentine Barshak				interrupts = <2 4>;
235d60ff953SValentine Barshak			};
236d60ff953SValentine Barshak
237d60ff953SValentine Barshak			IIC1: i2c@ef600800 {
238d60ff953SValentine Barshak				device_type = "i2c";
239d60ff953SValentine Barshak				compatible = "ibm,iic-440epx", "ibm,iic";
240d60ff953SValentine Barshak				reg = <ef600800 14>;
241d60ff953SValentine Barshak				interrupt-parent = <&UIC0>;
242d60ff953SValentine Barshak				interrupts = <7 4>;
243d60ff953SValentine Barshak			};
244d60ff953SValentine Barshak
245d60ff953SValentine Barshak			ZMII0: emac-zmii@ef600d00 {
246d60ff953SValentine Barshak				device_type = "zmii-interface";
247d60ff953SValentine Barshak				compatible = "ibm,zmii-440epx", "ibm,zmii";
248d60ff953SValentine Barshak				reg = <ef600d00 c>;
249d60ff953SValentine Barshak			};
250d60ff953SValentine Barshak
2511f69dcfdSValentine Barshak			RGMII0: emac-rgmii@ef601000 {
2521f69dcfdSValentine Barshak				device_type = "rgmii-interface";
2531f69dcfdSValentine Barshak				compatible = "ibm,rgmii-440epx", "ibm,rgmii";
2541f69dcfdSValentine Barshak				reg = <ef601000 8>;
2551f57877aSBenjamin Herrenschmidt				has-mdio;
2561f69dcfdSValentine Barshak			};
2571f69dcfdSValentine Barshak
258d60ff953SValentine Barshak			EMAC0: ethernet@ef600e00 {
259d60ff953SValentine Barshak				linux,network-index = <0>;
260d60ff953SValentine Barshak				device_type = "network";
261d60ff953SValentine Barshak				compatible = "ibm,emac-440epx", "ibm,emac4";
262d60ff953SValentine Barshak				interrupt-parent = <&EMAC0>;
263d60ff953SValentine Barshak				interrupts = <0 1>;
264d60ff953SValentine Barshak				#interrupt-cells = <1>;
265d60ff953SValentine Barshak				#address-cells = <0>;
266d60ff953SValentine Barshak				#size-cells = <0>;
267d60ff953SValentine Barshak				interrupt-map = </*Status*/ 0 &UIC0 18 4
268d60ff953SValentine Barshak						/*Wake*/  1 &UIC1 1d 4>;
269d60ff953SValentine Barshak				reg = <ef600e00 70>;
270d60ff953SValentine Barshak				local-mac-address = [000000000000];
271d60ff953SValentine Barshak				mal-device = <&MAL0>;
272bd0076ccSValentine Barshak				mal-tx-channel = <0>;
273d60ff953SValentine Barshak				mal-rx-channel = <0>;
274d60ff953SValentine Barshak				cell-index = <0>;
275d60ff953SValentine Barshak				max-frame-size = <5dc>;
276d60ff953SValentine Barshak				rx-fifo-size = <1000>;
277d60ff953SValentine Barshak				tx-fifo-size = <800>;
2781f69dcfdSValentine Barshak				phy-mode = "rgmii";
279d60ff953SValentine Barshak				phy-map = <00000000>;
280d60ff953SValentine Barshak				zmii-device = <&ZMII0>;
281d60ff953SValentine Barshak				zmii-channel = <0>;
2821f69dcfdSValentine Barshak				rgmii-device = <&RGMII0>;
2831f69dcfdSValentine Barshak				rgmii-channel = <0>;
284bff713b5SBenjamin Herrenschmidt				has-inverted-stacr-oc;
285bff713b5SBenjamin Herrenschmidt				has-new-stacr-staopc;
286d60ff953SValentine Barshak			};
287d60ff953SValentine Barshak
288d60ff953SValentine Barshak			EMAC1: ethernet@ef600f00 {
289d60ff953SValentine Barshak				linux,network-index = <1>;
290d60ff953SValentine Barshak				device_type = "network";
291d60ff953SValentine Barshak				compatible = "ibm,emac-440epx", "ibm,emac4";
292d60ff953SValentine Barshak				interrupt-parent = <&EMAC1>;
293d60ff953SValentine Barshak				interrupts = <0 1>;
294d60ff953SValentine Barshak				#interrupt-cells = <1>;
295d60ff953SValentine Barshak				#address-cells = <0>;
296d60ff953SValentine Barshak				#size-cells = <0>;
297d60ff953SValentine Barshak				interrupt-map = </*Status*/ 0 &UIC0 19 4
298d60ff953SValentine Barshak						/*Wake*/  1 &UIC1 1f 4>;
299d60ff953SValentine Barshak				reg = <ef600f00 70>;
300d60ff953SValentine Barshak				local-mac-address = [000000000000];
301d60ff953SValentine Barshak				mal-device = <&MAL0>;
302bd0076ccSValentine Barshak				mal-tx-channel = <1>;
303d60ff953SValentine Barshak				mal-rx-channel = <1>;
304d60ff953SValentine Barshak				cell-index = <1>;
305d60ff953SValentine Barshak				max-frame-size = <5dc>;
306d60ff953SValentine Barshak				rx-fifo-size = <1000>;
307d60ff953SValentine Barshak				tx-fifo-size = <800>;
3081f69dcfdSValentine Barshak				phy-mode = "rgmii";
309d60ff953SValentine Barshak				phy-map = <00000000>;
310d60ff953SValentine Barshak				zmii-device = <&ZMII0>;
311d60ff953SValentine Barshak				zmii-channel = <1>;
3121f69dcfdSValentine Barshak				rgmii-device = <&RGMII0>;
3131f69dcfdSValentine Barshak				rgmii-channel = <1>;
314bff713b5SBenjamin Herrenschmidt				has-inverted-stacr-oc;
315bff713b5SBenjamin Herrenschmidt				has-new-stacr-staopc;
316d60ff953SValentine Barshak			};
317d60ff953SValentine Barshak		};
3182a13448aSValentine Barshak
3192a13448aSValentine Barshak		PCI0: pci@1ec000000 {
3202a13448aSValentine Barshak			device_type = "pci";
3212a13448aSValentine Barshak			#interrupt-cells = <1>;
3222a13448aSValentine Barshak			#size-cells = <2>;
3232a13448aSValentine Barshak			#address-cells = <3>;
3242a13448aSValentine Barshak			compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
3252a13448aSValentine Barshak			primary;
3262a13448aSValentine Barshak			reg = <1 eec00000 8	/* Config space access */
3272a13448aSValentine Barshak			       1 eed00000 4	/* IACK */
3282a13448aSValentine Barshak			       1 eed00000 4	/* Special cycle */
3292a13448aSValentine Barshak			       1 ef400000 40>;	/* Internal registers */
3302a13448aSValentine Barshak
3312a13448aSValentine Barshak			/* Outbound ranges, one memory and one IO,
3322a13448aSValentine Barshak			 * later cannot be changed. Chip supports a second
3332a13448aSValentine Barshak			 * IO range but we don't use it for now
3342a13448aSValentine Barshak			 */
3352a13448aSValentine Barshak			ranges = <02000000 0 80000000 1 80000000 0 10000000
3362a13448aSValentine Barshak				01000000 0 00000000 1 e8000000 0 00100000>;
3372a13448aSValentine Barshak
3382a13448aSValentine Barshak			/* Inbound 2GB range starting at 0 */
3392a13448aSValentine Barshak			dma-ranges = <42000000 0 0 0 0 0 80000000>;
3402a13448aSValentine Barshak
3412a13448aSValentine Barshak			/* All PCI interrupts are routed to IRQ 67 */
3422a13448aSValentine Barshak			interrupt-map-mask = <0000 0 0 0>;
3432a13448aSValentine Barshak			interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
3442a13448aSValentine Barshak		};
345d60ff953SValentine Barshak	};
346d60ff953SValentine Barshak
347d60ff953SValentine Barshak	chosen {
348d60ff953SValentine Barshak		linux,stdout-path = "/plb/opb/serial@ef600300";
349d60ff953SValentine Barshak		bootargs = "console=ttyS0,115200";
350d60ff953SValentine Barshak	};
351d60ff953SValentine Barshak};
352