1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * MPC8379E RDB Device Tree Source 4 * 5 * Copyright 2007, 2008 Freescale Semiconductor Inc. 6 */ 7 8/dts-v1/; 9 10/ { 11 compatible = "fsl,mpc8379rdb"; 12 model = "fsl,mpc8379rdb"; 13 #address-cells = <1>; 14 #size-cells = <1>; 15 16 aliases { 17 ethernet0 = &enet0; 18 ethernet1 = &enet1; 19 serial0 = &serial0; 20 serial1 = &serial1; 21 pci0 = &pci0; 22 }; 23 24 cpus { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 PowerPC,8379@0 { 29 device_type = "cpu"; 30 reg = <0x0>; 31 d-cache-line-size = <32>; 32 i-cache-line-size = <32>; 33 d-cache-size = <32768>; 34 i-cache-size = <32768>; 35 timebase-frequency = <0>; 36 bus-frequency = <0>; 37 clock-frequency = <0>; 38 }; 39 }; 40 41 memory@0 { 42 device_type = "memory"; 43 reg = <0x00000000 0x10000000>; // 256MB at 0 44 }; 45 46 localbus@e0005000 { 47 #address-cells = <2>; 48 #size-cells = <1>; 49 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; 50 reg = <0xe0005000 0x1000>; 51 interrupts = <77 0x8>; 52 interrupt-parent = <&ipic>; 53 54 // CS0 and CS1 are swapped when 55 // booting from nand, but the 56 // addresses are the same. 57 ranges = <0x0 0x0 0xfe000000 0x00800000 58 0x1 0x0 0xe0600000 0x00008000 59 0x2 0x0 0xf0000000 0x00020000 60 0x3 0x0 0xfa000000 0x00008000>; 61 62 flash@0,0 { 63 #address-cells = <1>; 64 #size-cells = <1>; 65 compatible = "cfi-flash"; 66 reg = <0x0 0x0 0x800000>; 67 bank-width = <2>; 68 device-width = <1>; 69 }; 70 71 nand@1,0 { 72 #address-cells = <1>; 73 #size-cells = <1>; 74 compatible = "fsl,mpc8379-fcm-nand", 75 "fsl,elbc-fcm-nand"; 76 reg = <0x1 0x0 0x8000>; 77 78 u-boot@0 { 79 reg = <0x0 0x100000>; 80 read-only; 81 }; 82 83 kernel@100000 { 84 reg = <0x100000 0x300000>; 85 }; 86 fs@400000 { 87 reg = <0x400000 0x1c00000>; 88 }; 89 }; 90 }; 91 92 immr@e0000000 { 93 #address-cells = <1>; 94 #size-cells = <1>; 95 device_type = "soc"; 96 compatible = "simple-bus"; 97 ranges = <0x0 0xe0000000 0x00100000>; 98 reg = <0xe0000000 0x00000200>; 99 bus-frequency = <0>; 100 101 watchdog@200 { 102 device_type = "watchdog"; 103 compatible = "mpc83xx_wdt"; 104 reg = <0x200 0x100>; 105 }; 106 107 gpio1: gpio-controller@c00 { 108 #gpio-cells = <2>; 109 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; 110 reg = <0xc00 0x100>; 111 interrupts = <74 0x8>; 112 interrupt-parent = <&ipic>; 113 gpio-controller; 114 }; 115 116 gpio2: gpio-controller@d00 { 117 #gpio-cells = <2>; 118 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; 119 reg = <0xd00 0x100>; 120 interrupts = <75 0x8>; 121 interrupt-parent = <&ipic>; 122 gpio-controller; 123 }; 124 125 sleep-nexus { 126 #address-cells = <1>; 127 #size-cells = <1>; 128 compatible = "simple-bus"; 129 sleep = <&pmc 0x0c000000>; 130 ranges; 131 132 i2c@3000 { 133 #address-cells = <1>; 134 #size-cells = <0>; 135 cell-index = <0>; 136 compatible = "fsl-i2c"; 137 reg = <0x3000 0x100>; 138 interrupts = <14 0x8>; 139 interrupt-parent = <&ipic>; 140 dfsrr; 141 142 dtt@48 { 143 compatible = "national,lm75"; 144 reg = <0x48>; 145 }; 146 147 at24@50 { 148 compatible = "atmel,24c256"; 149 reg = <0x50>; 150 }; 151 152 rtc@68 { 153 compatible = "dallas,ds1339"; 154 reg = <0x68>; 155 }; 156 157 mcu_pio: mcu@a { 158 #gpio-cells = <2>; 159 compatible = "fsl,mc9s08qg8-mpc8379erdb", 160 "fsl,mcu-mpc8349emitx"; 161 reg = <0x0a>; 162 gpio-controller; 163 }; 164 }; 165 166 sdhci@2e000 { 167 compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; 168 reg = <0x2e000 0x1000>; 169 interrupts = <42 0x8>; 170 interrupt-parent = <&ipic>; 171 sdhci,wp-inverted; 172 /* Filled in by U-Boot */ 173 clock-frequency = <111111111>; 174 }; 175 }; 176 177 i2c@3100 { 178 #address-cells = <1>; 179 #size-cells = <0>; 180 cell-index = <1>; 181 compatible = "fsl-i2c"; 182 reg = <0x3100 0x100>; 183 interrupts = <15 0x8>; 184 interrupt-parent = <&ipic>; 185 dfsrr; 186 }; 187 188 spi@7000 { 189 cell-index = <0>; 190 compatible = "fsl,spi"; 191 reg = <0x7000 0x1000>; 192 interrupts = <16 0x8>; 193 interrupt-parent = <&ipic>; 194 mode = "cpu"; 195 }; 196 197 dma@82a8 { 198 #address-cells = <1>; 199 #size-cells = <1>; 200 compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; 201 reg = <0x82a8 4>; 202 ranges = <0 0x8100 0x1a8>; 203 interrupt-parent = <&ipic>; 204 interrupts = <71 8>; 205 cell-index = <0>; 206 dma-channel@0 { 207 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 208 reg = <0 0x80>; 209 cell-index = <0>; 210 interrupt-parent = <&ipic>; 211 interrupts = <71 8>; 212 }; 213 dma-channel@80 { 214 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 215 reg = <0x80 0x80>; 216 cell-index = <1>; 217 interrupt-parent = <&ipic>; 218 interrupts = <71 8>; 219 }; 220 dma-channel@100 { 221 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 222 reg = <0x100 0x80>; 223 cell-index = <2>; 224 interrupt-parent = <&ipic>; 225 interrupts = <71 8>; 226 }; 227 dma-channel@180 { 228 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 229 reg = <0x180 0x28>; 230 cell-index = <3>; 231 interrupt-parent = <&ipic>; 232 interrupts = <71 8>; 233 }; 234 }; 235 236 usb@23000 { 237 compatible = "fsl-usb2-dr"; 238 reg = <0x23000 0x1000>; 239 #address-cells = <1>; 240 #size-cells = <0>; 241 interrupt-parent = <&ipic>; 242 interrupts = <38 0x8>; 243 phy_type = "ulpi"; 244 sleep = <&pmc 0x00c00000>; 245 }; 246 247 enet0: ethernet@24000 { 248 #address-cells = <1>; 249 #size-cells = <1>; 250 cell-index = <0>; 251 device_type = "network"; 252 model = "eTSEC"; 253 compatible = "gianfar"; 254 reg = <0x24000 0x1000>; 255 ranges = <0x0 0x24000 0x1000>; 256 local-mac-address = [ 00 00 00 00 00 00 ]; 257 interrupts = <32 0x8 33 0x8 34 0x8>; 258 phy-connection-type = "mii"; 259 interrupt-parent = <&ipic>; 260 tbi-handle = <&tbi0>; 261 phy-handle = <&phy2>; 262 sleep = <&pmc 0xc0000000>; 263 fsl,magic-packet; 264 265 mdio@520 { 266 #address-cells = <1>; 267 #size-cells = <0>; 268 compatible = "fsl,gianfar-mdio"; 269 reg = <0x520 0x20>; 270 271 phy2: ethernet-phy@2 { 272 interrupt-parent = <&ipic>; 273 interrupts = <17 0x8>; 274 reg = <0x2>; 275 }; 276 277 tbi0: tbi-phy@11 { 278 reg = <0x11>; 279 device_type = "tbi-phy"; 280 }; 281 }; 282 }; 283 284 enet1: ethernet@25000 { 285 #address-cells = <1>; 286 #size-cells = <1>; 287 cell-index = <1>; 288 device_type = "network"; 289 model = "eTSEC"; 290 compatible = "gianfar"; 291 reg = <0x25000 0x1000>; 292 ranges = <0x0 0x25000 0x1000>; 293 local-mac-address = [ 00 00 00 00 00 00 ]; 294 interrupts = <35 0x8 36 0x8 37 0x8>; 295 phy-connection-type = "mii"; 296 interrupt-parent = <&ipic>; 297 fixed-link = <1 1 1000 0 0>; 298 tbi-handle = <&tbi1>; 299 sleep = <&pmc 0x30000000>; 300 fsl,magic-packet; 301 302 mdio@520 { 303 #address-cells = <1>; 304 #size-cells = <0>; 305 compatible = "fsl,gianfar-tbi"; 306 reg = <0x520 0x20>; 307 308 tbi1: tbi-phy@11 { 309 reg = <0x11>; 310 device_type = "tbi-phy"; 311 }; 312 }; 313 }; 314 315 serial0: serial@4500 { 316 cell-index = <0>; 317 device_type = "serial"; 318 compatible = "fsl,ns16550", "ns16550"; 319 reg = <0x4500 0x100>; 320 clock-frequency = <0>; 321 interrupts = <9 0x8>; 322 interrupt-parent = <&ipic>; 323 }; 324 325 serial1: serial@4600 { 326 cell-index = <1>; 327 device_type = "serial"; 328 compatible = "fsl,ns16550", "ns16550"; 329 reg = <0x4600 0x100>; 330 clock-frequency = <0>; 331 interrupts = <10 0x8>; 332 interrupt-parent = <&ipic>; 333 }; 334 335 crypto@30000 { 336 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 337 "fsl,sec2.1", "fsl,sec2.0"; 338 reg = <0x30000 0x10000>; 339 interrupts = <11 0x8>; 340 interrupt-parent = <&ipic>; 341 fsl,num-channels = <4>; 342 fsl,channel-fifo-len = <24>; 343 fsl,exec-units-mask = <0x9fe>; 344 fsl,descriptor-types-mask = <0x3ab0ebf>; 345 sleep = <&pmc 0x03000000>; 346 }; 347 348 sata@18000 { 349 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 350 reg = <0x18000 0x1000>; 351 interrupts = <44 0x8>; 352 interrupt-parent = <&ipic>; 353 sleep = <&pmc 0x000000c0>; 354 }; 355 356 sata@19000 { 357 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 358 reg = <0x19000 0x1000>; 359 interrupts = <45 0x8>; 360 interrupt-parent = <&ipic>; 361 sleep = <&pmc 0x00000030>; 362 }; 363 364 sata@1a000 { 365 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 366 reg = <0x1a000 0x1000>; 367 interrupts = <46 0x8>; 368 interrupt-parent = <&ipic>; 369 sleep = <&pmc 0x0000000c>; 370 }; 371 372 sata@1b000 { 373 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 374 reg = <0x1b000 0x1000>; 375 interrupts = <47 0x8>; 376 interrupt-parent = <&ipic>; 377 sleep = <&pmc 0x00000003>; 378 }; 379 380 /* IPIC 381 * interrupts cell = <intr #, sense> 382 * sense values match linux IORESOURCE_IRQ_* defines: 383 * sense == 8: Level, low assertion 384 * sense == 2: Edge, high-to-low change 385 */ 386 ipic: interrupt-controller@700 { 387 compatible = "fsl,ipic"; 388 interrupt-controller; 389 #address-cells = <0>; 390 #interrupt-cells = <2>; 391 reg = <0x700 0x100>; 392 }; 393 394 pmc: power@b00 { 395 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; 396 reg = <0xb00 0x100 0xa00 0x100>; 397 interrupts = <80 0x8>; 398 interrupt-parent = <&ipic>; 399 }; 400 }; 401 402 pci0: pci@e0008500 { 403 interrupt-map-mask = <0xf800 0 0 7>; 404 interrupt-map = < 405 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 406 407 /* IDSEL AD14 IRQ6 inta */ 408 0x7000 0x0 0x0 0x1 &ipic 22 0x8 409 410 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 411 0x7800 0x0 0x0 0x1 &ipic 21 0x8 412 0x7800 0x0 0x0 0x2 &ipic 22 0x8 413 0x7800 0x0 0x0 0x4 &ipic 23 0x8 414 415 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 416 0xE000 0x0 0x0 0x1 &ipic 23 0x8 417 0xE000 0x0 0x0 0x2 &ipic 21 0x8 418 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 419 interrupt-parent = <&ipic>; 420 interrupts = <66 0x8>; 421 bus-range = <0x0 0x0>; 422 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 423 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 424 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 425 sleep = <&pmc 0x00010000>; 426 clock-frequency = <66666666>; 427 #interrupt-cells = <1>; 428 #size-cells = <2>; 429 #address-cells = <3>; 430 reg = <0xe0008500 0x100 /* internal registers */ 431 0xe0008300 0x8>; /* config space access registers */ 432 compatible = "fsl,mpc8349-pci"; 433 device_type = "pci"; 434 }; 435 436 leds { 437 compatible = "gpio-leds"; 438 439 pwr { 440 gpios = <&mcu_pio 0 0>; 441 default-state = "on"; 442 }; 443 444 hdd { 445 gpios = <&mcu_pio 1 0>; 446 linux,default-trigger = "disk-activity"; 447 }; 448 }; 449}; 450