xref: /linux/arch/powerpc/boot/dts/lite5200b.dts (revision 4413e16d9d21673bb5048a2e542f1aaa00015c2e)
1/*
2 * Lite5200B board Device Tree Source
3 *
4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
6 *
7 * This program is free software; you can redistribute  it and/or modify it
8 * under  the terms of  the GNU General  Public License as published by the
9 * Free Software Foundation;  either version 2 of the  License, or (at your
10 * option) any later version.
11 */
12
13/include/ "mpc5200b.dtsi"
14
15/ {
16	model = "fsl,lite5200b";
17	compatible = "fsl,lite5200b";
18
19	memory {
20		reg = <0x00000000 0x10000000>;	// 256MB
21	};
22
23	soc5200@f0000000 {
24		timer@600 {	// General Purpose Timer
25			fsl,has-wdt;
26		};
27
28		psc@2000 {		// PSC1
29			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
30			cell-index = <0>;
31		};
32
33		psc@2200 {		// PSC2
34			status = "disabled";
35		};
36
37		psc@2400 {		// PSC3
38			status = "disabled";
39		};
40
41		psc@2600 {		// PSC4
42			status = "disabled";
43		};
44
45		psc@2800 {		// PSC5
46			status = "disabled";
47		};
48
49		psc@2c00 {		// PSC6
50			status = "disabled";
51		};
52
53		// PSC2 in ac97 mode example
54		//ac97@2200 {		// PSC2
55		//	compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
56		//	cell-index = <1>;
57		//};
58
59		// PSC3 in CODEC mode example
60		//i2s@2400 {		// PSC3
61		//	compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
62		//	cell-index = <2>;
63		//};
64
65		// PSC6 in spi mode example
66		//spi@2c00 {		// PSC6
67		//	compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
68		//	cell-index = <5>;
69		//};
70
71		ethernet@3000 {
72			phy-handle = <&phy0>;
73		};
74
75		mdio@3000 {
76			phy0: ethernet-phy@0 {
77				reg = <0>;
78			};
79		};
80
81		i2c@3d40 {
82			eeprom@50 {
83				compatible = "atmel,24c02";
84				reg = <0x50>;
85			};
86		};
87
88		sram@8000 {
89			compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
90			reg = <0x8000 0x4000>;
91		};
92	};
93
94	pci@f0000d00 {
95		interrupt-map-mask = <0xf800 0 0 7>;
96		interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
97				 0xc000 0 0 2 &mpc5200_pic 1 1 3
98				 0xc000 0 0 3 &mpc5200_pic 1 2 3
99				 0xc000 0 0 4 &mpc5200_pic 1 3 3
100
101				 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
102				 0xc800 0 0 2 &mpc5200_pic 1 2 3
103				 0xc800 0 0 3 &mpc5200_pic 1 3 3
104				 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
105		clock-frequency = <0>; // From boot loader
106		interrupts = <2 8 0 2 9 0 2 10 0>;
107		bus-range = <0 0>;
108		ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
109			  0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
110			  0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
111	};
112
113	localbus {
114		ranges = <0 0 0xfe000000 0x02000000>;
115
116		flash@0,0 {
117			compatible = "cfi-flash";
118			reg = <0 0 0x02000000>;
119			bank-width = <1>;
120			#size-cells = <1>;
121			#address-cells = <1>;
122
123			partition@0 {
124				label = "kernel";
125				reg = <0x00000000 0x00200000>;
126			};
127			partition@200000 {
128				label = "rootfs";
129				reg = <0x00200000 0x01d00000>;
130			};
131			partition@1f00000 {
132				label = "u-boot";
133				reg = <0x01f00000 0x00060000>;
134			};
135			partition@1f60000 {
136				label = "u-boot-env";
137				reg = <0x01f60000 0x00020000>;
138			};
139			partition@1f80000 {
140				label = "dtb";
141				reg = <0x01f80000 0x00080000>;
142			};
143		};
144	};
145
146};
147