xref: /linux/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1/*
2 * T1023 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *	 notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *	 notice, this list of conditions and the following disclaimer in the
12 *	 documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *	 names of its contributors may be used to endorse or promote products
15 *	 derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <dt-bindings/thermal/thermal.h>
36
37&bman_fbpr {
38	compatible = "fsl,bman-fbpr";
39	alloc-ranges = <0 0 0x10000 0>;
40};
41
42&qman_fqd {
43	compatible = "fsl,qman-fqd";
44	alloc-ranges = <0 0 0x10000 0>;
45};
46
47&qman_pfdr {
48	compatible = "fsl,qman-pfdr";
49	alloc-ranges = <0 0 0x10000 0>;
50};
51
52&ifc {
53	#address-cells = <2>;
54	#size-cells = <1>;
55	compatible = "fsl,ifc";
56	interrupts = <25 2 0 0>;
57};
58
59&pci0 {
60	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
61	device_type = "pci";
62	#size-cells = <2>;
63	#address-cells = <3>;
64	bus-range = <0x0 0xff>;
65	interrupts = <20 2 0 0>;
66	fsl,iommu-parent = <&pamu0>;
67	pcie@0 {
68		reg = <0 0 0 0 0>;
69		#interrupt-cells = <1>;
70		#size-cells = <2>;
71		#address-cells = <3>;
72		device_type = "pci";
73		interrupts = <20 2 0 0>;
74		interrupt-map-mask = <0xf800 0 0 7>;
75		interrupt-map = <
76			/* IDSEL 0x0 */
77			0000 0 0 1 &mpic 40 1 0 0
78			0000 0 0 2 &mpic 1 1 0 0
79			0000 0 0 3 &mpic 2 1 0 0
80			0000 0 0 4 &mpic 3 1 0 0
81			>;
82	};
83};
84
85&pci1 {
86	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
87	device_type = "pci";
88	#size-cells = <2>;
89	#address-cells = <3>;
90	bus-range = <0 0xff>;
91	interrupts = <21 2 0 0>;
92	fsl,iommu-parent = <&pamu0>;
93	pcie@0 {
94		reg = <0 0 0 0 0>;
95		#interrupt-cells = <1>;
96		#size-cells = <2>;
97		#address-cells = <3>;
98		device_type = "pci";
99		interrupts = <21 2 0 0>;
100		interrupt-map-mask = <0xf800 0 0 7>;
101		interrupt-map = <
102			/* IDSEL 0x0 */
103			0000 0 0 1 &mpic 41 1 0 0
104			0000 0 0 2 &mpic 5 1 0 0
105			0000 0 0 3 &mpic 6 1 0 0
106			0000 0 0 4 &mpic 7 1 0 0
107			>;
108	};
109};
110
111&pci2 {
112	compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
113	device_type = "pci";
114	#size-cells = <2>;
115	#address-cells = <3>;
116	bus-range = <0x0 0xff>;
117	interrupts = <22 2 0 0>;
118	fsl,iommu-parent = <&pamu0>;
119	pcie@0 {
120		reg = <0 0 0 0 0>;
121		#interrupt-cells = <1>;
122		#size-cells = <2>;
123		#address-cells = <3>;
124		device_type = "pci";
125		interrupts = <22 2 0 0>;
126		interrupt-map-mask = <0xf800 0 0 7>;
127		interrupt-map = <
128			/* IDSEL 0x0 */
129			0000 0 0 1 &mpic 42 1 0 0
130			0000 0 0 2 &mpic 9 1 0 0
131			0000 0 0 3 &mpic 10 1 0 0
132			0000 0 0 4 &mpic 11 1 0 0
133			>;
134	};
135};
136
137&dcsr {
138	#address-cells = <1>;
139	#size-cells = <1>;
140	compatible = "fsl,dcsr", "simple-bus";
141
142	dcsr-epu@0 {
143		compatible = "fsl,t1023-dcsr-epu", "fsl,dcsr-epu";
144		interrupts = <52 2 0 0
145			      84 2 0 0
146			      85 2 0 0>;
147		reg = <0x0 0x1000>;
148	};
149	dcsr-npc {
150		compatible = "fsl,t1023-dcsr-cnpc", "fsl,dcsr-cnpc";
151		reg = <0x1000 0x1000 0x1002000 0x10000>;
152	};
153	dcsr-nxc@2000 {
154		compatible = "fsl,dcsr-nxc";
155		reg = <0x2000 0x1000>;
156	};
157	dcsr-corenet {
158		compatible = "fsl,dcsr-corenet";
159		reg = <0x8000 0x1000 0x1A000 0x1000>;
160	};
161	dcsr-ocn@11000 {
162		compatible = "fsl,t1023-dcsr-ocn", "fsl,dcsr-ocn";
163		reg = <0x11000 0x1000>;
164	};
165	dcsr-ddr@12000 {
166		compatible = "fsl,dcsr-ddr";
167		dev-handle = <&ddr1>;
168		reg = <0x12000 0x1000>;
169	};
170	dcsr-nal@18000 {
171		compatible = "fsl,t1023-dcsr-nal", "fsl,dcsr-nal";
172		reg = <0x18000 0x1000>;
173	};
174	dcsr-rcpm@22000 {
175		compatible = "fsl,t1023-dcsr-rcpm", "fsl,dcsr-rcpm";
176		reg = <0x22000 0x1000>;
177	};
178	dcsr-snpc@30000 {
179		compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";
180		reg = <0x30000 0x1000 0x1022000 0x10000>;
181	};
182	dcsr-snpc@31000 {
183		compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc";
184		reg = <0x31000 0x1000 0x1042000 0x10000>;
185	};
186	dcsr-cpu-sb-proxy@100000 {
187		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
188		cpu-handle = <&cpu0>;
189		reg = <0x100000 0x1000 0x101000 0x1000>;
190	};
191	dcsr-cpu-sb-proxy@108000 {
192		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
193		cpu-handle = <&cpu1>;
194		reg = <0x108000 0x1000 0x109000 0x1000>;
195	};
196};
197
198&bportals {
199	#address-cells = <0x1>;
200	#size-cells = <0x1>;
201	compatible = "simple-bus";
202
203	bman-portal@0 {
204		cell-index = <0x0>;
205		compatible = "fsl,bman-portal";
206		reg = <0x0 0x4000>, <0x1000000 0x1000>;
207		interrupts = <105 2 0 0>;
208	};
209	bman-portal@4000 {
210		cell-index = <0x1>;
211		compatible = "fsl,bman-portal";
212		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
213		interrupts = <107 2 0 0>;
214	};
215	bman-portal@8000 {
216		cell-index = <2>;
217		compatible = "fsl,bman-portal";
218		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
219		interrupts = <109 2 0 0>;
220	};
221	bman-portal@c000 {
222		cell-index = <0x3>;
223		compatible = "fsl,bman-portal";
224		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
225		interrupts = <111 2 0 0>;
226	};
227	bman-portal@10000 {
228		cell-index = <0x4>;
229		compatible = "fsl,bman-portal";
230		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
231		interrupts = <113 2 0 0>;
232	};
233	bman-portal@14000 {
234		cell-index = <0x5>;
235		compatible = "fsl,bman-portal";
236		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
237		interrupts = <115 2 0 0>;
238	};
239};
240
241&qportals {
242	#address-cells = <0x1>;
243	#size-cells = <0x1>;
244	compatible = "simple-bus";
245
246	qportal0: qman-portal@0 {
247		compatible = "fsl,qman-portal";
248		reg = <0x0 0x4000>, <0x1000000 0x1000>;
249		interrupts = <104 0x2 0 0>;
250		cell-index = <0x0>;
251	};
252	qportal1: qman-portal@4000 {
253		compatible = "fsl,qman-portal";
254		reg = <0x4000 0x4000>, <0x1001000 0x1000>;
255		interrupts = <106 0x2 0 0>;
256		cell-index = <0x1>;
257	};
258	qportal2: qman-portal@8000 {
259		compatible = "fsl,qman-portal";
260		reg = <0x8000 0x4000>, <0x1002000 0x1000>;
261		interrupts = <108 0x2 0 0>;
262		cell-index = <0x2>;
263	};
264	qportal3: qman-portal@c000 {
265		compatible = "fsl,qman-portal";
266		reg = <0xc000 0x4000>, <0x1003000 0x1000>;
267		interrupts = <110 0x2 0 0>;
268		cell-index = <0x3>;
269	};
270	qportal4: qman-portal@10000 {
271		compatible = "fsl,qman-portal";
272		reg = <0x10000 0x4000>, <0x1004000 0x1000>;
273		interrupts = <112 0x2 0 0>;
274		cell-index = <0x4>;
275	};
276	qportal5: qman-portal@14000 {
277		compatible = "fsl,qman-portal";
278		reg = <0x14000 0x4000>, <0x1005000 0x1000>;
279		interrupts = <114 0x2 0 0>;
280		cell-index = <0x5>;
281	};
282};
283
284&soc {
285	#address-cells = <1>;
286	#size-cells = <1>;
287	device_type = "soc";
288	compatible = "simple-bus";
289
290	soc-sram-error {
291		compatible = "fsl,soc-sram-error";
292		interrupts = <16 2 1 29>;
293	};
294
295	corenet-law@0 {
296		compatible = "fsl,corenet-law";
297		reg = <0x0 0x1000>;
298		fsl,num-laws = <16>;
299	};
300
301	ddr1: memory-controller@8000 {
302		compatible = "fsl,qoriq-memory-controller-v5.0",
303				"fsl,qoriq-memory-controller";
304		reg = <0x8000 0x1000>;
305		interrupts = <16 2 1 23>;
306	};
307
308	cpc: l3-cache-controller@10000 {
309		compatible = "fsl,t1023-l3-cache-controller", "cache";
310		reg = <0x10000 0x1000>;
311		interrupts = <16 2 1 27>;
312	};
313
314	corenet-cf@18000 {
315		compatible = "fsl,corenet2-cf";
316		reg = <0x18000 0x1000>;
317		interrupts = <16 2 1 31>;
318	};
319
320	iommu@20000 {
321		compatible = "fsl,pamu-v1.0", "fsl,pamu";
322		reg = <0x20000 0x1000>;
323		ranges = <0 0x20000 0x1000>;
324		#address-cells = <1>;
325		#size-cells = <1>;
326		interrupts = <
327			24 2 0 0
328			16 2 1 30>;
329		pamu0: pamu@0 {
330			reg = <0 0x1000>;
331			fsl,primary-cache-geometry = <128 1>;
332			fsl,secondary-cache-geometry = <32 2>;
333		};
334	};
335
336/include/ "qoriq-mpic.dtsi"
337
338	guts: global-utilities@e0000 {
339		compatible = "fsl,t1023-device-config", "fsl,qoriq-device-config-2.0";
340		reg = <0xe0000 0xe00>;
341		fsl,has-rstcr;
342		fsl,liodn-bits = <12>;
343	};
344
345/include/ "qoriq-clockgen2.dtsi"
346	global-utilities@e1000 {
347		compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0";
348	};
349
350	rcpm: global-utilities@e2000 {
351		compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.1";
352		reg = <0xe2000 0x1000>;
353	};
354
355	sfp: sfp@e8000 {
356		compatible = "fsl,t1023-sfp";
357		reg = <0xe8000 0x1000>;
358	};
359
360	serdes: serdes@ea000 {
361		compatible = "fsl,t1023-serdes";
362		reg = <0xea000 0x4000>;
363	};
364
365	tmu: tmu@f0000 {
366		compatible = "fsl,qoriq-tmu";
367		reg = <0xf0000 0x1000>;
368		interrupts = <18 2 0 0>;
369		fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
370		fsl,tmu-calibration =
371				<0x00000000 0x0000000f>,
372				<0x00000001 0x00000017>,
373				<0x00000002 0x0000001e>,
374				<0x00000003 0x00000026>,
375				<0x00000004 0x0000002e>,
376				<0x00000005 0x00000035>,
377				<0x00000006 0x0000003d>,
378				<0x00000007 0x00000044>,
379				<0x00000008 0x0000004c>,
380				<0x00000009 0x00000053>,
381				<0x0000000a 0x0000005b>,
382				<0x0000000b 0x00000064>,
383
384				<0x00010000 0x00000011>,
385				<0x00010001 0x0000001c>,
386				<0x00010002 0x00000024>,
387				<0x00010003 0x0000002b>,
388				<0x00010004 0x00000034>,
389				<0x00010005 0x00000039>,
390				<0x00010006 0x00000042>,
391				<0x00010007 0x0000004c>,
392				<0x00010008 0x00000051>,
393				<0x00010009 0x0000005a>,
394				<0x0001000a 0x00000063>,
395
396				<0x00020000 0x00000013>,
397				<0x00020001 0x00000019>,
398				<0x00020002 0x00000024>,
399				<0x00020003 0x0000002c>,
400				<0x00020004 0x00000035>,
401				<0x00020005 0x0000003d>,
402				<0x00020006 0x00000046>,
403				<0x00020007 0x00000050>,
404				<0x00020008 0x00000059>,
405
406				<0x00030000 0x00000002>,
407				<0x00030001 0x0000000d>,
408				<0x00030002 0x00000019>,
409				<0x00030003 0x00000024>;
410		#thermal-sensor-cells = <1>;
411	};
412
413	thermal-zones {
414		cpu_thermal: cpu-thermal {
415			polling-delay-passive = <1000>;
416			polling-delay = <5000>;
417
418			thermal-sensors = <&tmu 0>;
419
420			trips {
421				cpu_alert: cpu-alert {
422					temperature = <85000>;
423					hysteresis = <2000>;
424					type = "passive";
425				};
426				cpu_crit: cpu-crit {
427					temperature = <95000>;
428					hysteresis = <2000>;
429					type = "critical";
430				};
431			};
432
433			cooling-maps {
434				map0 {
435					trip = <&cpu_alert>;
436					cooling-device =
437						<&cpu0 THERMAL_NO_LIMIT
438							THERMAL_NO_LIMIT>;
439				};
440				map1 {
441					trip = <&cpu_alert>;
442					cooling-device =
443						<&cpu1 THERMAL_NO_LIMIT
444							THERMAL_NO_LIMIT>;
445				};
446			};
447		};
448	};
449
450	scfg: global-utilities@fc000 {
451		compatible = "fsl,t1023-scfg";
452		reg = <0xfc000 0x1000>;
453	};
454
455/include/ "elo3-dma-0.dtsi"
456/include/ "elo3-dma-1.dtsi"
457
458/include/ "qoriq-espi-0.dtsi"
459	spi@110000 {
460		fsl,espi-num-chipselects = <4>;
461	};
462
463/include/ "qoriq-esdhc-0.dtsi"
464	sdhc@114000 {
465		compatible = "fsl,t1023-esdhc", "fsl,esdhc";
466		fsl,iommu-parent = <&pamu0>;
467		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
468		sdhci,auto-cmd12;
469		no-1-8-v;
470	};
471/include/ "qoriq-i2c-0.dtsi"
472/include/ "qoriq-i2c-1.dtsi"
473/include/ "qoriq-duart-0.dtsi"
474/include/ "qoriq-duart-1.dtsi"
475/include/ "qoriq-gpio-0.dtsi"
476/include/ "qoriq-gpio-1.dtsi"
477/include/ "qoriq-gpio-2.dtsi"
478/include/ "qoriq-gpio-3.dtsi"
479/include/ "qoriq-usb2-mph-0.dtsi"
480	usb0: usb@210000 {
481		compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
482		fsl,iommu-parent = <&pamu0>;
483		fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
484		phy_type = "utmi";
485		port0;
486	};
487/include/ "qoriq-usb2-dr-0.dtsi"
488	usb1: usb@211000 {
489		compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
490		fsl,iommu-parent = <&pamu0>;
491		fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
492		dr_mode = "host";
493		phy_type = "utmi";
494	};
495/include/ "qoriq-sata2-0.dtsi"
496	sata@220000 {
497		fsl,iommu-parent = <&pamu0>;
498		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
499	};
500
501/include/ "qoriq-sec5.0-0.dtsi"
502/include/ "qoriq-qman3.dtsi"
503/include/ "qoriq-bman1.dtsi"
504
505/include/ "qoriq-fman3l-0.dtsi"
506/include/ "qoriq-fman3-0-10g-0-best-effort.dtsi"
507/include/ "qoriq-fman3-0-1g-1.dtsi"
508/include/ "qoriq-fman3-0-1g-2.dtsi"
509/include/ "qoriq-fman3-0-1g-3.dtsi"
510	fman@400000 {
511		enet0: ethernet@e0000 {
512		};
513
514		enet1: ethernet@e2000 {
515		};
516
517		enet2: ethernet@e4000 {
518		};
519
520		enet3: ethernet@e6000 {
521		};
522	};
523};
524