xref: /linux/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi (revision a2adb1aee19687e9f0f398abaceb31ee5a2b68b8)
1/*
2 * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36	compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
37	fsl,sec-era = <3>;
38	#address-cells = <1>;
39	#size-cells = <1>;
40	ranges		 = <0x0 0x30000 0x10000>;
41	reg		 = <0x30000 0x10000>;
42	interrupts	 = <58 2 0 0>;
43
44	sec_jr0: jr@1000 {
45		compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
46		reg	   = <0x1000 0x1000>;
47		interrupts	 = <45 2 0 0>;
48	};
49
50	sec_jr1: jr@2000 {
51		compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
52		reg	   = <0x2000 0x1000>;
53		interrupts	 = <45 2 0 0>;
54	};
55
56	sec_jr2: jr@3000 {
57		compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
58		reg	   = <0x3000 0x1000>;
59		interrupts	 = <45 2 0 0>;
60	};
61
62	sec_jr3: jr@4000 {
63		compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
64		reg	   = <0x4000 0x1000>;
65		interrupts	 = <45 2 0 0>;
66	};
67};
68