xref: /linux/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
1*54986964SKumar Gala/*
2*54986964SKumar Gala * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
3*54986964SKumar Gala *
4*54986964SKumar Gala * Copyright 2011 Freescale Semiconductor Inc.
5*54986964SKumar Gala *
6*54986964SKumar Gala * Redistribution and use in source and binary forms, with or without
7*54986964SKumar Gala * modification, are permitted provided that the following conditions are met:
8*54986964SKumar Gala *     * Redistributions of source code must retain the above copyright
9*54986964SKumar Gala *       notice, this list of conditions and the following disclaimer.
10*54986964SKumar Gala *     * Redistributions in binary form must reproduce the above copyright
11*54986964SKumar Gala *       notice, this list of conditions and the following disclaimer in the
12*54986964SKumar Gala *       documentation and/or other materials provided with the distribution.
13*54986964SKumar Gala *     * Neither the name of Freescale Semiconductor nor the
14*54986964SKumar Gala *       names of its contributors may be used to endorse or promote products
15*54986964SKumar Gala *       derived from this software without specific prior written permission.
16*54986964SKumar Gala *
17*54986964SKumar Gala *
18*54986964SKumar Gala * ALTERNATIVELY, this software may be distributed under the terms of the
19*54986964SKumar Gala * GNU General Public License ("GPL") as published by the Free Software
20*54986964SKumar Gala * Foundation, either version 2 of that License or (at your option) any
21*54986964SKumar Gala * later version.
22*54986964SKumar Gala *
23*54986964SKumar Gala * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24*54986964SKumar Gala * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25*54986964SKumar Gala * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26*54986964SKumar Gala * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27*54986964SKumar Gala * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28*54986964SKumar Gala * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29*54986964SKumar Gala * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30*54986964SKumar Gala * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31*54986964SKumar Gala * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32*54986964SKumar Gala * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33*54986964SKumar Gala */
34*54986964SKumar Gala
35*54986964SKumar Galarmu: rmu@d3000 {
36*54986964SKumar Gala	#address-cells = <1>;
37*54986964SKumar Gala	#size-cells = <1>;
38*54986964SKumar Gala	compatible = "fsl,srio-rmu";
39*54986964SKumar Gala	reg = <0xd3000 0x500>;
40*54986964SKumar Gala	ranges = <0x0 0xd3000 0x500>;
41*54986964SKumar Gala
42*54986964SKumar Gala	message-unit@0 {
43*54986964SKumar Gala		compatible = "fsl,srio-msg-unit";
44*54986964SKumar Gala		reg = <0x0 0x100>;
45*54986964SKumar Gala		interrupts = <
46*54986964SKumar Gala			53 2 0 0 /* msg1_tx_irq */
47*54986964SKumar Gala			54 2 0 0>;/* msg1_rx_irq */
48*54986964SKumar Gala	};
49*54986964SKumar Gala	message-unit@100 {
50*54986964SKumar Gala		compatible = "fsl,srio-msg-unit";
51*54986964SKumar Gala		reg = <0x100 0x100>;
52*54986964SKumar Gala		interrupts = <
53*54986964SKumar Gala			55 2 0 0  /* msg2_tx_irq */
54*54986964SKumar Gala			56 2 0 0>;/* msg2_rx_irq */
55*54986964SKumar Gala	};
56*54986964SKumar Gala	doorbell-unit@400 {
57*54986964SKumar Gala		compatible = "fsl,srio-dbell-unit";
58*54986964SKumar Gala		reg = <0x400 0x80>;
59*54986964SKumar Gala		interrupts = <
60*54986964SKumar Gala			49 2 0 0  /* bell_outb_irq */
61*54986964SKumar Gala			50 2 0 0>;/* bell_inb_irq */
62*54986964SKumar Gala	};
63*54986964SKumar Gala	port-write-unit@4e0 {
64*54986964SKumar Gala		compatible = "fsl,srio-port-write-unit";
65*54986964SKumar Gala		reg = <0x4e0 0x20>;
66*54986964SKumar Gala		interrupts = <48 2 0 0>;
67*54986964SKumar Gala	};
68*54986964SKumar Gala};
69