1/* 2 * P5040 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * This software is provided by Freescale Semiconductor "as is" and any 24 * express or implied warranties, including, but not limited to, the implied 25 * warranties of merchantability and fitness for a particular purpose are 26 * disclaimed. In no event shall Freescale Semiconductor be liable for any 27 * direct, indirect, incidental, special, exemplary, or consequential damages 28 * (including, but not limited to, procurement of substitute goods or services; 29 * loss of use, data, or profits; or business interruption) however caused and 30 * on any theory of liability, whether in contract, strict liability, or tort 31 * (including negligence or otherwise) arising in any way out of the use of this 32 * software, even if advised of the possibility of such damage. 33 */ 34 35&bman_fbpr { 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 38}; 39 40&qman_fqd { 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 43}; 44 45&qman_pfdr { 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 48}; 49 50&lbc { 51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus"; 52 interrupts = <25 2 0 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; 55}; 56 57/* controller at 0x200000 */ 58&pci0 { 59 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4"; 60 device_type = "pci"; 61 #size-cells = <2>; 62 #address-cells = <3>; 63 bus-range = <0x0 0xff>; 64 clock-frequency = <33333333>; 65 interrupts = <16 2 1 15>; 66 fsl,iommu-parent = <&pamu0>; 67 pcie@0 { 68 reg = <0 0 0 0 0>; 69 #interrupt-cells = <1>; 70 #size-cells = <2>; 71 #address-cells = <3>; 72 device_type = "pci"; 73 interrupts = <16 2 1 15>; 74 interrupt-map-mask = <0xf800 0 0 7>; 75 interrupt-map = < 76 /* IDSEL 0x0 */ 77 0000 0 0 1 &mpic 40 1 0 0 78 0000 0 0 2 &mpic 1 1 0 0 79 0000 0 0 3 &mpic 2 1 0 0 80 0000 0 0 4 &mpic 3 1 0 0 81 >; 82 }; 83}; 84 85/* controller at 0x201000 */ 86&pci1 { 87 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4"; 88 device_type = "pci"; 89 #size-cells = <2>; 90 #address-cells = <3>; 91 bus-range = <0 0xff>; 92 clock-frequency = <33333333>; 93 interrupts = <16 2 1 14>; 94 fsl,iommu-parent = <&pamu0>; 95 pcie@0 { 96 reg = <0 0 0 0 0>; 97 #interrupt-cells = <1>; 98 #size-cells = <2>; 99 #address-cells = <3>; 100 device_type = "pci"; 101 interrupts = <16 2 1 14>; 102 interrupt-map-mask = <0xf800 0 0 7>; 103 interrupt-map = < 104 /* IDSEL 0x0 */ 105 0000 0 0 1 &mpic 41 1 0 0 106 0000 0 0 2 &mpic 5 1 0 0 107 0000 0 0 3 &mpic 6 1 0 0 108 0000 0 0 4 &mpic 7 1 0 0 109 >; 110 }; 111}; 112 113/* controller at 0x202000 */ 114&pci2 { 115 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4"; 116 device_type = "pci"; 117 #size-cells = <2>; 118 #address-cells = <3>; 119 bus-range = <0x0 0xff>; 120 clock-frequency = <33333333>; 121 interrupts = <16 2 1 13>; 122 fsl,iommu-parent = <&pamu0>; 123 pcie@0 { 124 reg = <0 0 0 0 0>; 125 #interrupt-cells = <1>; 126 #size-cells = <2>; 127 #address-cells = <3>; 128 device_type = "pci"; 129 interrupts = <16 2 1 13>; 130 interrupt-map-mask = <0xf800 0 0 7>; 131 interrupt-map = < 132 /* IDSEL 0x0 */ 133 0000 0 0 1 &mpic 42 1 0 0 134 0000 0 0 2 &mpic 9 1 0 0 135 0000 0 0 3 &mpic 10 1 0 0 136 0000 0 0 4 &mpic 11 1 0 0 137 >; 138 }; 139}; 140 141&dcsr { 142 #address-cells = <1>; 143 #size-cells = <1>; 144 compatible = "fsl,dcsr", "simple-bus"; 145 146 dcsr-epu@0 { 147 compatible = "fsl,p5040-dcsr-epu", "fsl,dcsr-epu"; 148 interrupts = <52 2 0 0 149 84 2 0 0 150 85 2 0 0>; 151 reg = <0x0 0x1000>; 152 }; 153 dcsr-npc { 154 compatible = "fsl,dcsr-npc"; 155 reg = <0x1000 0x1000 0x1000000 0x8000>; 156 }; 157 dcsr-nxc@2000 { 158 compatible = "fsl,dcsr-nxc"; 159 reg = <0x2000 0x1000>; 160 }; 161 dcsr-corenet { 162 compatible = "fsl,dcsr-corenet"; 163 reg = <0x8000 0x1000 0xB0000 0x1000>; 164 }; 165 dcsr-dpaa@9000 { 166 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa"; 167 reg = <0x9000 0x1000>; 168 }; 169 dcsr-ocn@11000 { 170 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn"; 171 reg = <0x11000 0x1000>; 172 }; 173 dcsr-ddr@12000 { 174 compatible = "fsl,dcsr-ddr"; 175 dev-handle = <&ddr1>; 176 reg = <0x12000 0x1000>; 177 }; 178 dcsr-ddr@13000 { 179 compatible = "fsl,dcsr-ddr"; 180 dev-handle = <&ddr2>; 181 reg = <0x13000 0x1000>; 182 }; 183 dcsr-nal@18000 { 184 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal"; 185 reg = <0x18000 0x1000>; 186 }; 187 dcsr-rcpm@22000 { 188 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm"; 189 reg = <0x22000 0x1000>; 190 }; 191 dcsr-cpu-sb-proxy@40000 { 192 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 193 cpu-handle = <&cpu0>; 194 reg = <0x40000 0x1000>; 195 }; 196 dcsr-cpu-sb-proxy@41000 { 197 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 198 cpu-handle = <&cpu1>; 199 reg = <0x41000 0x1000>; 200 }; 201 dcsr-cpu-sb-proxy@42000 { 202 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 203 cpu-handle = <&cpu2>; 204 reg = <0x42000 0x1000>; 205 }; 206 dcsr-cpu-sb-proxy@43000 { 207 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 208 cpu-handle = <&cpu3>; 209 reg = <0x43000 0x1000>; 210 }; 211}; 212 213/include/ "qoriq-bman1-portals.dtsi" 214 215/include/ "qoriq-qman1-portals.dtsi" 216 217&soc { 218 #address-cells = <1>; 219 #size-cells = <1>; 220 device_type = "soc"; 221 compatible = "simple-bus"; 222 223 soc-sram-error { 224 compatible = "fsl,soc-sram-error"; 225 interrupts = <16 2 1 29>; 226 }; 227 228 corenet-law@0 { 229 compatible = "fsl,corenet-law"; 230 reg = <0x0 0x1000>; 231 fsl,num-laws = <32>; 232 }; 233 234 ddr1: memory-controller@8000 { 235 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 236 reg = <0x8000 0x1000>; 237 interrupts = <16 2 1 23>; 238 }; 239 240 ddr2: memory-controller@9000 { 241 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller"; 242 reg = <0x9000 0x1000>; 243 interrupts = <16 2 1 22>; 244 }; 245 246 cpc: l3-cache-controller@10000 { 247 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; 248 reg = <0x10000 0x1000 249 0x11000 0x1000>; 250 interrupts = <16 2 1 27 251 16 2 1 26>; 252 }; 253 254 corenet-cf@18000 { 255 compatible = "fsl,corenet1-cf", "fsl,corenet-cf"; 256 reg = <0x18000 0x1000>; 257 interrupts = <16 2 1 31>; 258 fsl,ccf-num-csdids = <32>; 259 fsl,ccf-num-snoopids = <32>; 260 }; 261 262 iommu@20000 { 263 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 264 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */ 265 ranges = <0 0x20000 0x5000>; 266 #address-cells = <1>; 267 #size-cells = <1>; 268 interrupts = <24 2 0 0 269 16 2 1 30>; 270 fsl,portid-mapping = <0x0f800000>; 271 272 pamu0: pamu@0 { 273 reg = <0 0x1000>; 274 fsl,primary-cache-geometry = <32 1>; 275 fsl,secondary-cache-geometry = <128 2>; 276 }; 277 278 pamu1: pamu@1000 { 279 reg = <0x1000 0x1000>; 280 fsl,primary-cache-geometry = <32 1>; 281 fsl,secondary-cache-geometry = <128 2>; 282 }; 283 284 pamu2: pamu@2000 { 285 reg = <0x2000 0x1000>; 286 fsl,primary-cache-geometry = <32 1>; 287 fsl,secondary-cache-geometry = <128 2>; 288 }; 289 290 pamu3: pamu@3000 { 291 reg = <0x3000 0x1000>; 292 fsl,primary-cache-geometry = <32 1>; 293 fsl,secondary-cache-geometry = <128 2>; 294 }; 295 296 pamu4: pamu@4000 { 297 reg = <0x4000 0x1000>; 298 fsl,primary-cache-geometry = <32 1>; 299 fsl,secondary-cache-geometry = <128 2>; 300 }; 301 }; 302 303/include/ "qoriq-mpic.dtsi" 304 305 guts: global-utilities@e0000 { 306 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0"; 307 reg = <0xe0000 0xe00>; 308 fsl,has-rstcr; 309 #sleep-cells = <1>; 310 fsl,liodn-bits = <12>; 311 }; 312 313 pins: global-utilities@e0e00 { 314 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0"; 315 reg = <0xe0e00 0x200>; 316 #sleep-cells = <2>; 317 }; 318 319/include/ "qoriq-clockgen1.dtsi" 320 global-utilities@e1000 { 321 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0"; 322 323 mux2: mux2@40 { 324 #clock-cells = <0>; 325 reg = <0x40 0x4>; 326 compatible = "fsl,qoriq-core-mux-1.0"; 327 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 328 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 329 clock-output-names = "cmux2"; 330 }; 331 332 mux3: mux3@60 { 333 #clock-cells = <0>; 334 reg = <0x60 0x4>; 335 compatible = "fsl,qoriq-core-mux-1.0"; 336 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 337 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 338 clock-output-names = "cmux3"; 339 }; 340 }; 341 342 rcpm: global-utilities@e2000 { 343 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0"; 344 reg = <0xe2000 0x1000>; 345 #sleep-cells = <1>; 346 }; 347 348 sfp: sfp@e8000 { 349 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0"; 350 reg = <0xe8000 0x1000>; 351 }; 352 353 serdes: serdes@ea000 { 354 compatible = "fsl,p5040-serdes"; 355 reg = <0xea000 0x1000>; 356 }; 357 358/include/ "qoriq-dma-0.dtsi" 359 dma@100300 { 360 fsl,iommu-parent = <&pamu0>; 361 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */ 362 }; 363 364/include/ "qoriq-dma-1.dtsi" 365 dma@101300 { 366 fsl,iommu-parent = <&pamu0>; 367 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */ 368 }; 369 370/include/ "qoriq-espi-0.dtsi" 371 spi@110000 { 372 fsl,espi-num-chipselects = <4>; 373 }; 374 375/include/ "qoriq-esdhc-0.dtsi" 376 sdhc@114000 { 377 compatible = "fsl,p5040-esdhc", "fsl,esdhc"; 378 fsl,iommu-parent = <&pamu2>; 379 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 380 sdhci,auto-cmd12; 381 }; 382 383/include/ "qoriq-i2c-0.dtsi" 384/include/ "qoriq-i2c-1.dtsi" 385/include/ "qoriq-duart-0.dtsi" 386/include/ "qoriq-duart-1.dtsi" 387/include/ "qoriq-gpio-0.dtsi" 388/include/ "qoriq-usb2-mph-0.dtsi" 389 usb0: usb@210000 { 390 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 391 fsl,iommu-parent = <&pamu4>; 392 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 393 phy_type = "utmi"; 394 port0; 395 }; 396 397/include/ "qoriq-usb2-dr-0.dtsi" 398 usb1: usb@211000 { 399 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 400 fsl,iommu-parent = <&pamu4>; 401 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 402 dr_mode = "host"; 403 phy_type = "utmi"; 404 }; 405 406/include/ "qoriq-sata2-0.dtsi" 407 sata@220000 { 408 fsl,iommu-parent = <&pamu4>; 409 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */ 410 }; 411 412/include/ "qoriq-sata2-1.dtsi" 413 sata@221000 { 414 fsl,iommu-parent = <&pamu4>; 415 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */ 416 }; 417 418/include/ "qoriq-sec5.2-0.dtsi" 419 crypto@300000 { 420 fsl,iommu-parent = <&pamu4>; 421 }; 422 423/include/ "qoriq-qman1.dtsi" 424/include/ "qoriq-bman1.dtsi" 425}; 426