1/* 2 * P2041RDB Device Tree Source 3 * 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/include/ "p2041si-pre.dtsi" 36 37/ { 38 model = "fsl,P2041RDB"; 39 compatible = "fsl,P2041RDB"; 40 #address-cells = <2>; 41 #size-cells = <2>; 42 interrupt-parent = <&mpic>; 43 44 memory { 45 device_type = "memory"; 46 }; 47 48 reserved-memory { 49 #address-cells = <2>; 50 #size-cells = <2>; 51 ranges; 52 53 bman_fbpr: bman-fbpr { 54 size = <0 0x1000000>; 55 alignment = <0 0x1000000>; 56 }; 57 qman_fqd: qman-fqd { 58 size = <0 0x400000>; 59 alignment = <0 0x400000>; 60 }; 61 qman_pfdr: qman-pfdr { 62 size = <0 0x2000000>; 63 alignment = <0 0x2000000>; 64 }; 65 }; 66 67 dcsr: dcsr@f00000000 { 68 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 69 }; 70 71 bportals: bman-portals@ff4000000 { 72 ranges = <0x0 0xf 0xf4000000 0x200000>; 73 }; 74 75 qportals: qman-portals@ff4200000 { 76 ranges = <0x0 0xf 0xf4200000 0x200000>; 77 }; 78 79 soc: soc@ffe000000 { 80 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 81 reg = <0xf 0xfe000000 0 0x00001000>; 82 spi@110000 { 83 flash@0 { 84 #address-cells = <1>; 85 #size-cells = <1>; 86 compatible = "spansion,s25sl12801"; 87 reg = <0>; 88 spi-max-frequency = <40000000>; /* input clock */ 89 partition@u-boot { 90 label = "u-boot"; 91 reg = <0x00000000 0x00100000>; 92 read-only; 93 }; 94 partition@kernel { 95 label = "kernel"; 96 reg = <0x00100000 0x00500000>; 97 read-only; 98 }; 99 partition@dtb { 100 label = "dtb"; 101 reg = <0x00600000 0x00100000>; 102 read-only; 103 }; 104 partition@fs { 105 label = "file system"; 106 reg = <0x00700000 0x00900000>; 107 }; 108 }; 109 }; 110 111 i2c@118000 { 112 lm75b@48 { 113 compatible = "nxp,lm75a"; 114 reg = <0x48>; 115 }; 116 eeprom@50 { 117 compatible = "at24,24c256"; 118 reg = <0x50>; 119 }; 120 rtc@68 { 121 compatible = "pericom,pt7c4338"; 122 reg = <0x68>; 123 }; 124 adt7461@4c { 125 compatible = "adi,adt7461"; 126 reg = <0x4c>; 127 }; 128 }; 129 130 i2c@118100 { 131 eeprom@50 { 132 compatible = "at24,24c256"; 133 reg = <0x50>; 134 }; 135 }; 136 137 usb1: usb@211000 { 138 dr_mode = "host"; 139 }; 140 }; 141 142 rio: rapidio@ffe0c0000 { 143 reg = <0xf 0xfe0c0000 0 0x11000>; 144 145 port1 { 146 ranges = <0 0 0xc 0x20000000 0 0x10000000>; 147 }; 148 port2 { 149 ranges = <0 0 0xc 0x30000000 0 0x10000000>; 150 }; 151 }; 152 153 lbc: localbus@ffe124000 { 154 reg = <0xf 0xfe124000 0 0x1000>; 155 ranges = <0 0 0xf 0xe8000000 0x08000000 156 1 0 0xf 0xffa00000 0x00040000>; 157 158 flash@0,0 { 159 compatible = "cfi-flash"; 160 reg = <0 0 0x08000000>; 161 bank-width = <2>; 162 device-width = <2>; 163 }; 164 165 nand@1,0 { 166 #address-cells = <1>; 167 #size-cells = <1>; 168 compatible = "fsl,elbc-fcm-nand"; 169 reg = <0x1 0x0 0x40000>; 170 171 partition@0 { 172 label = "NAND U-Boot Image"; 173 reg = <0x0 0x02000000>; 174 read-only; 175 }; 176 177 partition@2000000 { 178 label = "NAND Root File System"; 179 reg = <0x02000000 0x10000000>; 180 }; 181 182 partition@12000000 { 183 label = "NAND Compressed RFS Image"; 184 reg = <0x12000000 0x08000000>; 185 }; 186 187 partition@1a000000 { 188 label = "NAND Linux Kernel Image"; 189 reg = <0x1a000000 0x04000000>; 190 }; 191 192 partition@1e000000 { 193 label = "NAND DTB Image"; 194 reg = <0x1e000000 0x01000000>; 195 }; 196 197 partition@1f000000 { 198 label = "NAND Writable User area"; 199 reg = <0x1f000000 0x01000000>; 200 }; 201 }; 202 }; 203 204 pci0: pcie@ffe200000 { 205 reg = <0xf 0xfe200000 0 0x1000>; 206 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 207 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 208 pcie@0 { 209 ranges = <0x02000000 0 0xe0000000 210 0x02000000 0 0xe0000000 211 0 0x20000000 212 213 0x01000000 0 0x00000000 214 0x01000000 0 0x00000000 215 0 0x00010000>; 216 }; 217 }; 218 219 pci1: pcie@ffe201000 { 220 reg = <0xf 0xfe201000 0 0x1000>; 221 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 222 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 223 pcie@0 { 224 ranges = <0x02000000 0 0xe0000000 225 0x02000000 0 0xe0000000 226 0 0x20000000 227 228 0x01000000 0 0x00000000 229 0x01000000 0 0x00000000 230 0 0x00010000>; 231 }; 232 }; 233 234 pci2: pcie@ffe202000 { 235 reg = <0xf 0xfe202000 0 0x1000>; 236 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 237 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 238 pcie@0 { 239 ranges = <0x02000000 0 0xe0000000 240 0x02000000 0 0xe0000000 241 0 0x20000000 242 243 0x01000000 0 0x00000000 244 0x01000000 0 0x00000000 245 0 0x00010000>; 246 }; 247 }; 248}; 249 250/include/ "p2041si-post.dtsi" 251