1/* 2 * P1023/P1017 Silicon/SoC Device Tree Source (post include) 3 * 4 * Copyright 2011 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35&lbc { 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; 39 interrupts = <19 2 0 0>, 40 <16 2 0 0>; 41}; 42 43/* controller at 0xa000 */ 44&pci0 { 45 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 46 device_type = "pci"; 47 #size-cells = <2>; 48 #address-cells = <3>; 49 bus-range = <0x0 0xff>; 50 clock-frequency = <33333333>; 51 interrupts = <16 2 0 0>; 52 pcie@0 { 53 reg = <0 0 0 0 0>; 54 #interrupt-cells = <1>; 55 #size-cells = <2>; 56 #address-cells = <3>; 57 device_type = "pci"; 58 interrupts = <16 2 0 0>; 59 }; 60}; 61 62/* controller at 0x9000 */ 63&pci1 { 64 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 65 device_type = "pci"; 66 #size-cells = <2>; 67 #address-cells = <3>; 68 bus-range = <0 0xff>; 69 clock-frequency = <33333333>; 70 interrupts = <16 2 0 0>; 71 pcie@0 { 72 reg = <0 0 0 0 0>; 73 #interrupt-cells = <1>; 74 #size-cells = <2>; 75 #address-cells = <3>; 76 device_type = "pci"; 77 interrupts = <16 2 0 0>; 78 }; 79}; 80 81/* controller at 0xb000 */ 82&pci2 { 83 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 84 device_type = "pci"; 85 #size-cells = <2>; 86 #address-cells = <3>; 87 bus-range = <0x0 0xff>; 88 clock-frequency = <33333333>; 89 interrupts = <16 2 0 0>; 90 pcie@0 { 91 reg = <0 0 0 0 0>; 92 #interrupt-cells = <1>; 93 #size-cells = <2>; 94 #address-cells = <3>; 95 device_type = "pci"; 96 interrupts = <16 2 0 0>; 97 }; 98}; 99 100&soc { 101 #address-cells = <1>; 102 #size-cells = <1>; 103 device_type = "soc"; 104 compatible = "fsl,p1023-immr", "simple-bus"; 105 bus-frequency = <0>; // Filled out by uboot. 106 107 ecm-law@0 { 108 compatible = "fsl,ecm-law"; 109 reg = <0x0 0x1000>; 110 fsl,num-laws = <12>; 111 }; 112 113 ecm@1000 { 114 compatible = "fsl,p1023-ecm", "fsl,ecm"; 115 reg = <0x1000 0x1000>; 116 interrupts = <16 2 0 0>; 117 }; 118 119 memory-controller@2000 { 120 compatible = "fsl,p1023-memory-controller"; 121 reg = <0x2000 0x1000>; 122 interrupts = <16 2 0 0>; 123 }; 124 125/include/ "pq3-i2c-0.dtsi" 126/include/ "pq3-i2c-1.dtsi" 127/include/ "pq3-duart-0.dtsi" 128 129/include/ "pq3-espi-0.dtsi" 130 spi@7000 { 131 fsl,espi-num-chipselects = <4>; 132 }; 133 134/include/ "pq3-gpio-0.dtsi" 135 136 L2: l2-cache-controller@20000 { 137 compatible = "fsl,p1023-l2-cache-controller"; 138 reg = <0x20000 0x1000>; 139 cache-line-size = <32>; // 32 bytes 140 cache-size = <0x40000>; // L2,256K 141 interrupts = <16 2 0 0>; 142 }; 143 144/include/ "pq3-dma-0.dtsi" 145/include/ "pq3-usb2-dr-0.dtsi" 146 usb@22000 { 147 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; 148 }; 149 150 crypto: crypto@300000 { 151 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 152 fsl,sec-era = <3>; 153 #address-cells = <1>; 154 #size-cells = <1>; 155 reg = <0x30000 0x10000>; 156 ranges = <0 0x30000 0x10000>; 157 interrupts = <58 2 0 0>; 158 159 sec_jr0: jr@1000 { 160 compatible = "fsl,sec-v4.2-job-ring", 161 "fsl,sec-v4.0-job-ring"; 162 reg = <0x1000 0x1000>; 163 interrupts = <45 2 0 0>; 164 }; 165 166 sec_jr1: jr@2000 { 167 compatible = "fsl,sec-v4.2-job-ring", 168 "fsl,sec-v4.0-job-ring"; 169 reg = <0x2000 0x1000>; 170 interrupts = <45 2 0 0>; 171 }; 172 173 sec_jr2: jr@3000 { 174 compatible = "fsl,sec-v4.2-job-ring", 175 "fsl,sec-v4.0-job-ring"; 176 reg = <0x3000 0x1000>; 177 interrupts = <57 2 0 0>; 178 }; 179 180 sec_jr3: jr@4000 { 181 compatible = "fsl,sec-v4.2-job-ring", 182 "fsl,sec-v4.0-job-ring"; 183 reg = <0x4000 0x1000>; 184 interrupts = <57 2 0 0>; 185 }; 186 187 rtic@6000 { 188 compatible = "fsl,sec-v4.2-rtic", 189 "fsl,sec-v4.0-rtic"; 190 #address-cells = <1>; 191 #size-cells = <1>; 192 reg = <0x6000 0x100>; 193 ranges = <0x0 0x6100 0xe00>; 194 195 rtic_a: rtic-a@0 { 196 compatible = "fsl,sec-v4.2-rtic-memory", 197 "fsl,sec-v4.0-rtic-memory"; 198 reg = <0x00 0x20 0x100 0x80>; 199 }; 200 201 rtic_b: rtic-b@20 { 202 compatible = "fsl,sec-v4.2-rtic-memory", 203 "fsl,sec-v4.0-rtic-memory"; 204 reg = <0x20 0x20 0x200 0x80>; 205 }; 206 207 rtic_c: rtic-c@40 { 208 compatible = "fsl,sec-v4.2-rtic-memory", 209 "fsl,sec-v4.0-rtic-memory"; 210 reg = <0x40 0x20 0x300 0x80>; 211 }; 212 213 rtic_d: rtic-d@60 { 214 compatible = "fsl,sec-v4.2-rtic-memory", 215 "fsl,sec-v4.0-rtic-memory"; 216 reg = <0x60 0x20 0x500 0x80>; 217 }; 218 }; 219 }; 220 221/include/ "pq3-mpic.dtsi" 222/include/ "pq3-mpic-timer-B.dtsi" 223 224 global-utilities@e0000 { 225 compatible = "fsl,p1023-guts"; 226 reg = <0xe0000 0x1000>; 227 fsl,has-rstcr; 228 }; 229}; 230