1/* 2 * GE SBC310 Device Tree Source 3 * 4 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * Based on: SBS CM6 Device Tree Source 12 * Copyright 2007 SBS Technologies GmbH & Co. KG 13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) 14 * Copyright 2006 Freescale Semiconductor Inc. 15 */ 16 17/* 18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts 19 */ 20 21/include/ "mpc8641si-pre.dtsi" 22 23/ { 24 model = "GEF_SBC310"; 25 compatible = "gef,sbc310"; 26 27 memory { 28 device_type = "memory"; 29 reg = <0x0 0x40000000>; // set by uboot 30 }; 31 32 lbc: localbus@fef05000 { 33 reg = <0xfef05000 0x1000>; 34 35 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash 36 1 0 0xe0000000 0x08000000 // Paged Flash 0 37 2 0 0xe8000000 0x08000000 // Paged Flash 1 38 3 0 0xfc100000 0x00020000 // NVRAM 39 4 0 0xfc000000 0x00010000>; // FPGA 40 41 /* flash@0,0 is a mirror of part of the memory in flash@1,0 42 flash@0,0 { 43 compatible = "gef,sbc310-firmware-mirror", "cfi-flash"; 44 reg = <0x0 0x0 0x01000000>; 45 bank-width = <2>; 46 device-width = <2>; 47 #address-cells = <1>; 48 #size-cells = <1>; 49 partition@0 { 50 label = "firmware"; 51 reg = <0x0 0x01000000>; 52 read-only; 53 }; 54 }; 55 */ 56 57 flash@1,0 { 58 compatible = "gef,sbc310-paged-flash", "cfi-flash"; 59 reg = <0x1 0x0 0x8000000>; 60 bank-width = <2>; 61 device-width = <2>; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 partition@0 { 65 label = "user"; 66 reg = <0x0 0x7800000>; 67 }; 68 partition@7800000 { 69 label = "firmware"; 70 reg = <0x7800000 0x800000>; 71 read-only; 72 }; 73 }; 74 75 nvram@3,0 { 76 device_type = "nvram"; 77 compatible = "simtek,stk14ca8"; 78 reg = <0x3 0x0 0x20000>; 79 }; 80 81 fpga@4,0 { 82 compatible = "gef,fpga-regs"; 83 reg = <0x4 0x0 0x40>; 84 }; 85 86 wdt@4,2000 { 87 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00", 88 "gef,fpga-wdt"; 89 reg = <0x4 0x2000 0x8>; 90 interrupts = <0x1a 0x4>; 91 interrupt-parent = <&gef_pic>; 92 }; 93/* 94 wdt@4,2010 { 95 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00", 96 "gef,fpga-wdt"; 97 reg = <0x4 0x2010 0x8>; 98 interrupts = <0x1b 0x4>; 99 interrupt-parent = <&gef_pic>; 100 }; 101*/ 102 gef_pic: pic@4,4000 { 103 #interrupt-cells = <1>; 104 interrupt-controller; 105 compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic"; 106 reg = <0x4 0x4000 0x20>; 107 interrupts = <0x8 0x9 0 0>; 108 109 }; 110 gef_gpio: gpio@4,8000 { 111 #gpio-cells = <2>; 112 compatible = "gef,sbc310-gpio"; 113 reg = <0x4 0x8000 0x24>; 114 gpio-controller; 115 }; 116 }; 117 118 soc: soc@fef00000 { 119 ranges = <0x0 0xfef00000 0x00100000>; 120 121 i2c@3000 { 122 rtc@51 { 123 compatible = "epson,rx8581"; 124 reg = <0x00000051>; 125 }; 126 }; 127 128 i2c@3100 { 129 hwmon@48 { 130 compatible = "national,lm92"; 131 reg = <0x48>; 132 }; 133 134 hwmon@4c { 135 compatible = "adi,adt7461"; 136 reg = <0x4c>; 137 }; 138 139 eti@6b { 140 compatible = "dallas,ds1682"; 141 reg = <0x6b>; 142 }; 143 }; 144 145 enet0: ethernet@24000 { 146 tbi-handle = <&tbi0>; 147 phy-handle = <&phy0>; 148 phy-connection-type = "gmii"; 149 }; 150 151 mdio@24520 { 152 phy0: ethernet-phy@0 { 153 interrupt-parent = <&gef_pic>; 154 interrupts = <0x9 0x4>; 155 reg = <1>; 156 }; 157 phy2: ethernet-phy@2 { 158 interrupt-parent = <&gef_pic>; 159 interrupts = <0x8 0x4>; 160 reg = <3>; 161 }; 162 tbi0: tbi-phy@11 { 163 reg = <0x11>; 164 device_type = "tbi-phy"; 165 }; 166 }; 167 168 enet1: ethernet@26000 { 169 tbi-handle = <&tbi2>; 170 phy-handle = <&phy2>; 171 phy-connection-type = "gmii"; 172 }; 173 174 mdio@26520 { 175 tbi2: tbi-phy@11 { 176 reg = <0x11>; 177 device_type = "tbi-phy"; 178 }; 179 }; 180 181 enet2: ethernet@25000 { 182 status = "disabled"; 183 }; 184 185 mdio@25520 { 186 status = "disabled"; 187 }; 188 189 enet3: ethernet@27000 { 190 status = "disabled"; 191 }; 192 193 mdio@27520 { 194 status = "disabled"; 195 }; 196 }; 197 198 pci0: pcie@fef08000 { 199 reg = <0xfef08000 0x1000>; 200 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 201 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; 202 interrupt-map-mask = <0xff00 0x0 0x0 0x7>; 203 interrupt-map = < 204 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2 205 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2 206 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2 207 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2 208 >; 209 210 pcie@0 { 211 ranges = <0x02000000 0x0 0x80000000 212 0x02000000 0x0 0x80000000 213 0x0 0x40000000 214 215 0x01000000 0x0 0x00000000 216 0x01000000 0x0 0x00000000 217 0x0 0x00400000>; 218 }; 219 }; 220 221 pci1: pcie@fef09000 { 222 reg = <0xfef09000 0x1000>; 223 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 224 0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>; 225 226 pcie@0 { 227 ranges = <0x02000000 0x0 0xc0000000 228 0x02000000 0x0 0xc0000000 229 0x0 0x20000000 230 231 0x01000000 0x0 0x00000000 232 0x01000000 0x0 0x00000000 233 0x0 0x00400000>; 234 }; 235 }; 236}; 237 238/include/ "mpc8641si-post.dtsi" 239