xref: /linux/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1/*
2 * BSC9132 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36	#address-cells = <2>;
37	#size-cells = <1>;
38	compatible = "fsl,ifc", "simple-bus";
39	/* FIXME: Test whether interrupts are split */
40	interrupts = <16 2 0 0 20 2 0 0>;
41};
42
43&soc {
44	#address-cells = <1>;
45	#size-cells = <1>;
46	device_type = "soc";
47	compatible = "fsl,bsc9132-immr", "simple-bus";
48	bus-frequency = <0>;		// Filled out by uboot.
49
50	ecm-law@0 {
51		compatible = "fsl,ecm-law";
52		reg = <0x0 0x1000>;
53		fsl,num-laws = <12>;
54	};
55
56	ecm@1000 {
57		compatible = "fsl,bsc9132-ecm", "fsl,ecm";
58		reg = <0x1000 0x1000>;
59		interrupts = <16 2 0 0>;
60	};
61
62	memory-controller@2000 {
63		compatible = "fsl,bsc9132-memory-controller";
64		reg = <0x2000 0x1000>;
65		interrupts = <16 2 1 8>;
66	};
67
68/include/ "pq3-i2c-0.dtsi"
69	i2c@3000 {
70		interrupts = <17 2 0 0>;
71	};
72
73/include/ "pq3-i2c-1.dtsi"
74	i2c@3100 {
75		interrupts = <17 2 0 0>;
76	};
77
78/include/ "pq3-duart-0.dtsi"
79	serial0: serial@4500 {
80		interrupts = <18 2 0 0>;
81	};
82
83	serial1: serial@4600 {
84		interrupts = <18 2 0 0 >;
85	};
86/include/ "pq3-espi-0.dtsi"
87	spi0: spi@7000 {
88		fsl,espi-num-chipselects = <1>;
89		interrupts = <22 0x2 0 0>;
90	};
91
92/include/ "pq3-gpio-0.dtsi"
93	gpio-controller@f000 {
94		interrupts = <19 0x2 0 0>;
95		};
96
97	L2: l2-cache-controller@20000 {
98		compatible = "fsl,bsc9132-l2-cache-controller";
99		reg = <0x20000 0x1000>;
100		cache-line-size = <32>;	// 32 bytes
101		cache-size = <0x40000>; // L2,256K
102		interrupts = <16 2 1 0>;
103	};
104
105/include/ "pq3-dma-0.dtsi"
106
107dma@21300 {
108
109	dma-channel@0 {
110		interrupts = <62 2 0 0>;
111	};
112
113	dma-channel@80 {
114		interrupts = <63 2 0 0>;
115	};
116
117	dma-channel@100 {
118		interrupts = <64 2 0 0>;
119	};
120
121	dma-channel@180 {
122		interrupts = <65 2 0 0>;
123	};
124};
125
126/include/ "pq3-usb2-dr-0.dtsi"
127usb@22000 {
128	compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
129	interrupts = <40 0x2 0 0>;
130};
131
132/include/ "pq3-esdhc-0.dtsi"
133	sdhc@2e000 {
134		fsl,sdhci-auto-cmd12;
135		interrupts = <41 0x2 0 0>;
136	};
137
138/include/ "pq3-sec4.4-0.dtsi"
139crypto@30000 {
140	interrupts	 = <57 2 0 0>;
141
142	sec_jr0: jr@1000 {
143		interrupts	 = <58 2 0 0>;
144	};
145
146	sec_jr1: jr@2000 {
147		interrupts	 = <59 2 0 0>;
148	};
149
150	sec_jr2: jr@3000 {
151		interrupts	 = <60 2 0 0>;
152	};
153
154	sec_jr3: jr@4000 {
155		interrupts	 = <61 2 0 0>;
156	};
157};
158
159/include/ "pq3-mpic.dtsi"
160/include/ "pq3-mpic-timer-B.dtsi"
161
162/include/ "pq3-etsec2-0.dtsi"
163enet0: ethernet@b0000 {
164	queue-group@b0000 {
165		fsl,rx-bit-map = <0xff>;
166		fsl,tx-bit-map = <0xff>;
167		interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
168	};
169};
170
171/include/ "pq3-etsec2-1.dtsi"
172enet1: ethernet@b1000 {
173	queue-group@b1000 {
174		fsl,rx-bit-map = <0xff>;
175		fsl,tx-bit-map = <0xff>;
176		interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
177	};
178};
179
180global-utilities@e0000 {
181		compatible = "fsl,bsc9132-guts";
182		reg = <0xe0000 0x1000>;
183		fsl,has-rstcr;
184	};
185};
186