xref: /linux/arch/powerpc/boot/dts/bluestone.dts (revision 9c6b2353dfb80ae843b831c03fc53ddc5c3949ff)
16edc323dSTirumala Marri/*
26edc323dSTirumala Marri * Device Tree for Bluestone (APM821xx) board.
36edc323dSTirumala Marri *
46edc323dSTirumala Marri * Copyright (c) 2010, Applied Micro Circuits Corporation
56edc323dSTirumala Marri * Author: Tirumala R Marri <tmarri@apm.com>
66edc323dSTirumala Marri *
76edc323dSTirumala Marri * This program is free software; you can redistribute it and/or
86edc323dSTirumala Marri * modify it under the terms of the GNU General Public License as
96edc323dSTirumala Marri * published by the Free Software Foundation; either version 2 of
106edc323dSTirumala Marri * the License, or (at your option) any later version.
116edc323dSTirumala Marri *
126edc323dSTirumala Marri * This program is distributed in the hope that it will be useful,
136edc323dSTirumala Marri * but WITHOUT ANY WARRANTY; without even the implied warranty of
146edc323dSTirumala Marri * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
156edc323dSTirumala Marri * GNU General Public License for more details.
166edc323dSTirumala Marri *
176edc323dSTirumala Marri * You should have received a copy of the GNU General Public License
186edc323dSTirumala Marri * along with this program; if not, write to the Free Software
196edc323dSTirumala Marri * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
206edc323dSTirumala Marri * MA 02111-1307 USA
216edc323dSTirumala Marri *
226edc323dSTirumala Marri */
236edc323dSTirumala Marri
246edc323dSTirumala Marri/dts-v1/;
256edc323dSTirumala Marri
266edc323dSTirumala Marri/ {
276edc323dSTirumala Marri	#address-cells = <2>;
286edc323dSTirumala Marri	#size-cells = <1>;
296edc323dSTirumala Marri	model = "apm,bluestone";
306edc323dSTirumala Marri	compatible = "apm,bluestone";
316edc323dSTirumala Marri	dcr-parent = <&{/cpus/cpu@0}>;
326edc323dSTirumala Marri
336edc323dSTirumala Marri	aliases {
346edc323dSTirumala Marri		ethernet0 = &EMAC0;
356edc323dSTirumala Marri		serial0 = &UART0;
36b5594a77SVinh Nguyen Huu Tuong		serial1 = &UART1;
376edc323dSTirumala Marri	};
386edc323dSTirumala Marri
396edc323dSTirumala Marri	cpus {
406edc323dSTirumala Marri		#address-cells = <1>;
416edc323dSTirumala Marri		#size-cells = <0>;
426edc323dSTirumala Marri
436edc323dSTirumala Marri		cpu@0 {
446edc323dSTirumala Marri			device_type = "cpu";
456edc323dSTirumala Marri			model = "PowerPC,apm821xx";
466edc323dSTirumala Marri			reg = <0x00000000>;
476edc323dSTirumala Marri			clock-frequency = <0>; /* Filled in by U-Boot */
486edc323dSTirumala Marri			timebase-frequency = <0>; /* Filled in by U-Boot */
496edc323dSTirumala Marri			i-cache-line-size = <32>;
506edc323dSTirumala Marri			d-cache-line-size = <32>;
516edc323dSTirumala Marri			i-cache-size = <32768>;
526edc323dSTirumala Marri			d-cache-size = <32768>;
536edc323dSTirumala Marri			dcr-controller;
546edc323dSTirumala Marri			dcr-access-method = "native";
55b5594a77SVinh Nguyen Huu Tuong			next-level-cache = <&L2C0>;
566edc323dSTirumala Marri		};
576edc323dSTirumala Marri	};
586edc323dSTirumala Marri
596edc323dSTirumala Marri	memory {
606edc323dSTirumala Marri		device_type = "memory";
616edc323dSTirumala Marri		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
626edc323dSTirumala Marri	};
636edc323dSTirumala Marri
646edc323dSTirumala Marri	UIC0: interrupt-controller0 {
656edc323dSTirumala Marri		compatible = "ibm,uic";
666edc323dSTirumala Marri		interrupt-controller;
676edc323dSTirumala Marri		cell-index = <0>;
686edc323dSTirumala Marri		dcr-reg = <0x0c0 0x009>;
696edc323dSTirumala Marri		#address-cells = <0>;
706edc323dSTirumala Marri		#size-cells = <0>;
716edc323dSTirumala Marri		#interrupt-cells = <2>;
726edc323dSTirumala Marri	};
736edc323dSTirumala Marri
746edc323dSTirumala Marri	UIC1: interrupt-controller1 {
756edc323dSTirumala Marri		compatible = "ibm,uic";
766edc323dSTirumala Marri		interrupt-controller;
776edc323dSTirumala Marri		cell-index = <1>;
786edc323dSTirumala Marri		dcr-reg = <0x0d0 0x009>;
796edc323dSTirumala Marri		#address-cells = <0>;
806edc323dSTirumala Marri		#size-cells = <0>;
816edc323dSTirumala Marri		#interrupt-cells = <2>;
826edc323dSTirumala Marri		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
836edc323dSTirumala Marri		interrupt-parent = <&UIC0>;
846edc323dSTirumala Marri	};
856edc323dSTirumala Marri
866edc323dSTirumala Marri	UIC2: interrupt-controller2 {
876edc323dSTirumala Marri		compatible = "ibm,uic";
886edc323dSTirumala Marri		interrupt-controller;
896edc323dSTirumala Marri		cell-index = <2>;
906edc323dSTirumala Marri		dcr-reg = <0x0e0 0x009>;
916edc323dSTirumala Marri		#address-cells = <0>;
926edc323dSTirumala Marri		#size-cells = <0>;
936edc323dSTirumala Marri		#interrupt-cells = <2>;
946edc323dSTirumala Marri		interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
956edc323dSTirumala Marri		interrupt-parent = <&UIC0>;
966edc323dSTirumala Marri	};
976edc323dSTirumala Marri
986edc323dSTirumala Marri	UIC3: interrupt-controller3 {
996edc323dSTirumala Marri		compatible = "ibm,uic";
1006edc323dSTirumala Marri		interrupt-controller;
1016edc323dSTirumala Marri		cell-index = <3>;
1026edc323dSTirumala Marri		dcr-reg = <0x0f0 0x009>;
1036edc323dSTirumala Marri		#address-cells = <0>;
1046edc323dSTirumala Marri		#size-cells = <0>;
1056edc323dSTirumala Marri		#interrupt-cells = <2>;
1066edc323dSTirumala Marri		interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
1076edc323dSTirumala Marri		interrupt-parent = <&UIC0>;
1086edc323dSTirumala Marri	};
1096edc323dSTirumala Marri
1106edc323dSTirumala Marri	SDR0: sdr {
1116edc323dSTirumala Marri		compatible = "ibm,sdr-apm821xx";
1126edc323dSTirumala Marri		dcr-reg = <0x00e 0x002>;
1136edc323dSTirumala Marri	};
1146edc323dSTirumala Marri
1156edc323dSTirumala Marri	CPR0: cpr {
1166edc323dSTirumala Marri		compatible = "ibm,cpr-apm821xx";
1176edc323dSTirumala Marri		dcr-reg = <0x00c 0x002>;
1186edc323dSTirumala Marri	};
1196edc323dSTirumala Marri
120b5594a77SVinh Nguyen Huu Tuong	L2C0: l2c {
121b5594a77SVinh Nguyen Huu Tuong		compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
122b5594a77SVinh Nguyen Huu Tuong		dcr-reg = <0x020 0x008
123b5594a77SVinh Nguyen Huu Tuong			   0x030 0x008>;
124b5594a77SVinh Nguyen Huu Tuong		cache-line-size = <32>;
125b5594a77SVinh Nguyen Huu Tuong		cache-size = <262144>;
126b5594a77SVinh Nguyen Huu Tuong		interrupt-parent = <&UIC1>;
127b5594a77SVinh Nguyen Huu Tuong		interrupts = <11 1>;
128b5594a77SVinh Nguyen Huu Tuong	};
129b5594a77SVinh Nguyen Huu Tuong
1306edc323dSTirumala Marri	plb {
1316edc323dSTirumala Marri		compatible = "ibm,plb4";
1326edc323dSTirumala Marri		#address-cells = <2>;
1336edc323dSTirumala Marri		#size-cells = <1>;
1346edc323dSTirumala Marri		ranges;
1356edc323dSTirumala Marri		clock-frequency = <0>; /* Filled in by U-Boot */
1366edc323dSTirumala Marri
1376edc323dSTirumala Marri		SDRAM0: sdram {
1386edc323dSTirumala Marri			compatible = "ibm,sdram-apm821xx";
1396edc323dSTirumala Marri			dcr-reg = <0x010 0x002>;
1406edc323dSTirumala Marri		};
1416edc323dSTirumala Marri
1426edc323dSTirumala Marri		MAL0: mcmal {
1436edc323dSTirumala Marri			compatible = "ibm,mcmal2";
1446edc323dSTirumala Marri			descriptor-memory = "ocm";
1456edc323dSTirumala Marri			dcr-reg = <0x180 0x062>;
1466edc323dSTirumala Marri			num-tx-chans = <1>;
1476edc323dSTirumala Marri			num-rx-chans = <1>;
1486edc323dSTirumala Marri			#address-cells = <0>;
1496edc323dSTirumala Marri			#size-cells = <0>;
1506edc323dSTirumala Marri			interrupt-parent = <&UIC2>;
1516edc323dSTirumala Marri			interrupts = <	/*TXEOB*/ 0x6 0x4
1526edc323dSTirumala Marri					/*RXEOB*/ 0x7 0x4
1536edc323dSTirumala Marri					/*SERR*/  0x3 0x4
1546edc323dSTirumala Marri					/*TXDE*/  0x4 0x4
1556bd121e2SGrant Likely					/*RXDE*/  0x5 0x4>;
1566edc323dSTirumala Marri		};
1576edc323dSTirumala Marri
1586edc323dSTirumala Marri		POB0: opb {
1596edc323dSTirumala Marri			compatible = "ibm,opb";
1606edc323dSTirumala Marri			#address-cells = <1>;
1616edc323dSTirumala Marri			#size-cells = <1>;
1626edc323dSTirumala Marri			ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
1636edc323dSTirumala Marri			clock-frequency = <0>; /* Filled in by U-Boot */
1646edc323dSTirumala Marri
1656edc323dSTirumala Marri			EBC0: ebc {
1666edc323dSTirumala Marri				compatible = "ibm,ebc";
1676edc323dSTirumala Marri				dcr-reg = <0x012 0x002>;
1686edc323dSTirumala Marri				#address-cells = <2>;
1696edc323dSTirumala Marri				#size-cells = <1>;
1706edc323dSTirumala Marri				clock-frequency = <0>; /* Filled in by U-Boot */
1716edc323dSTirumala Marri				/* ranges property is supplied by U-Boot */
1726edc323dSTirumala Marri				ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;
1736edc323dSTirumala Marri				interrupts = <0x6 0x4>;
1746edc323dSTirumala Marri				interrupt-parent = <&UIC1>;
1756edc323dSTirumala Marri
1766edc323dSTirumala Marri				nor_flash@0,0 {
1776edc323dSTirumala Marri					compatible = "amd,s29gl512n", "cfi-flash";
1786edc323dSTirumala Marri					bank-width = <2>;
1796edc323dSTirumala Marri					reg = <0x00000000 0x00000000 0x00400000>;
1806edc323dSTirumala Marri					#address-cells = <1>;
1816edc323dSTirumala Marri					#size-cells = <1>;
1826edc323dSTirumala Marri					partition@0 {
1836edc323dSTirumala Marri						label = "kernel";
1846edc323dSTirumala Marri						reg = <0x00000000 0x00180000>;
1856edc323dSTirumala Marri					};
1866edc323dSTirumala Marri					partition@180000 {
1876edc323dSTirumala Marri						label = "env";
1886edc323dSTirumala Marri						reg = <0x00180000 0x00020000>;
1896edc323dSTirumala Marri					};
1906edc323dSTirumala Marri					partition@1a0000 {
1916edc323dSTirumala Marri						label = "u-boot";
1926edc323dSTirumala Marri						reg = <0x001a0000 0x00060000>;
1936edc323dSTirumala Marri					};
1946edc323dSTirumala Marri				};
195b5594a77SVinh Nguyen Huu Tuong
196b5594a77SVinh Nguyen Huu Tuong				ndfc@1,0 {
197b5594a77SVinh Nguyen Huu Tuong					compatible = "ibm,ndfc";
198b5594a77SVinh Nguyen Huu Tuong					reg = <0x00000003 0x00000000 0x00002000>;
199b5594a77SVinh Nguyen Huu Tuong					ccr = <0x00001000>;
200b5594a77SVinh Nguyen Huu Tuong					bank-settings = <0x80002222>;
201b5594a77SVinh Nguyen Huu Tuong					#address-cells = <1>;
202b5594a77SVinh Nguyen Huu Tuong					#size-cells = <1>;
203b5594a77SVinh Nguyen Huu Tuong					/* 2Gb Nand Flash */
204b5594a77SVinh Nguyen Huu Tuong					nand {
205b5594a77SVinh Nguyen Huu Tuong						#address-cells = <1>;
206b5594a77SVinh Nguyen Huu Tuong						#size-cells = <1>;
207b5594a77SVinh Nguyen Huu Tuong
208b5594a77SVinh Nguyen Huu Tuong						partition@0 {
209b5594a77SVinh Nguyen Huu Tuong							label = "firmware";
210b5594a77SVinh Nguyen Huu Tuong							reg   = <0x00000000 0x00C00000>;
211b5594a77SVinh Nguyen Huu Tuong						};
212b5594a77SVinh Nguyen Huu Tuong						partition@c00000 {
213b5594a77SVinh Nguyen Huu Tuong							label = "environment";
214b5594a77SVinh Nguyen Huu Tuong							reg   = <0x00C00000 0x00B00000>;
215b5594a77SVinh Nguyen Huu Tuong						};
216b5594a77SVinh Nguyen Huu Tuong						partition@1700000 {
217b5594a77SVinh Nguyen Huu Tuong							label = "kernel";
218b5594a77SVinh Nguyen Huu Tuong							reg   = <0x01700000 0x00E00000>;
219b5594a77SVinh Nguyen Huu Tuong						};
220b5594a77SVinh Nguyen Huu Tuong						partition@2500000 {
221b5594a77SVinh Nguyen Huu Tuong							label = "root";
222b5594a77SVinh Nguyen Huu Tuong							reg   = <0x02500000 0x08200000>;
223b5594a77SVinh Nguyen Huu Tuong						};
224b5594a77SVinh Nguyen Huu Tuong						partition@a700000 {
225b5594a77SVinh Nguyen Huu Tuong							label = "device-tree";
226b5594a77SVinh Nguyen Huu Tuong							reg   = <0x0A700000 0x00B00000>;
227b5594a77SVinh Nguyen Huu Tuong						};
228b5594a77SVinh Nguyen Huu Tuong						partition@b200000 {
229b5594a77SVinh Nguyen Huu Tuong							label = "config";
230b5594a77SVinh Nguyen Huu Tuong							reg   = <0x0B200000 0x00D00000>;
231b5594a77SVinh Nguyen Huu Tuong						};
232b5594a77SVinh Nguyen Huu Tuong						partition@bf00000 {
233b5594a77SVinh Nguyen Huu Tuong							label = "diag";
234b5594a77SVinh Nguyen Huu Tuong							reg   = <0x0BF00000 0x00C00000>;
235b5594a77SVinh Nguyen Huu Tuong						};
236b5594a77SVinh Nguyen Huu Tuong						partition@cb00000 {
237b5594a77SVinh Nguyen Huu Tuong							label = "vendor";
238b5594a77SVinh Nguyen Huu Tuong							reg   = <0x0CB00000 0x3500000>;
239b5594a77SVinh Nguyen Huu Tuong						};
240b5594a77SVinh Nguyen Huu Tuong					};
241b5594a77SVinh Nguyen Huu Tuong				};
2426bd121e2SGrant Likely			};
2436edc323dSTirumala Marri
2446edc323dSTirumala Marri			UART0: serial@ef600300 {
2456edc323dSTirumala Marri				device_type = "serial";
2466edc323dSTirumala Marri				compatible = "ns16550";
2476edc323dSTirumala Marri				reg = <0xef600300 0x00000008>;
2486edc323dSTirumala Marri				virtual-reg = <0xef600300>;
2496edc323dSTirumala Marri				clock-frequency = <0>; /* Filled in by U-Boot */
2506edc323dSTirumala Marri				current-speed = <0>; /* Filled in by U-Boot */
2516edc323dSTirumala Marri				interrupt-parent = <&UIC1>;
2526edc323dSTirumala Marri				interrupts = <0x1 0x4>;
2536edc323dSTirumala Marri			};
2546edc323dSTirumala Marri
255b5594a77SVinh Nguyen Huu Tuong			UART1: serial@ef600400 {
256b5594a77SVinh Nguyen Huu Tuong				device_type = "serial";
257b5594a77SVinh Nguyen Huu Tuong				compatible = "ns16550";
258b5594a77SVinh Nguyen Huu Tuong				reg = <0xef600400 0x00000008>;
259b5594a77SVinh Nguyen Huu Tuong				virtual-reg = <0xef600400>;
260b5594a77SVinh Nguyen Huu Tuong				clock-frequency = <0>; /* Filled in by U-Boot */
261b5594a77SVinh Nguyen Huu Tuong				current-speed = <0>; /* Filled in by U-Boot */
262b5594a77SVinh Nguyen Huu Tuong				interrupt-parent = <&UIC0>;
263b5594a77SVinh Nguyen Huu Tuong				interrupts = <0x1 0x4>;
264b5594a77SVinh Nguyen Huu Tuong			};
265b5594a77SVinh Nguyen Huu Tuong
2666edc323dSTirumala Marri			IIC0: i2c@ef600700 {
2676edc323dSTirumala Marri				compatible = "ibm,iic";
2686edc323dSTirumala Marri				reg = <0xef600700 0x00000014>;
2696edc323dSTirumala Marri				interrupt-parent = <&UIC0>;
2706edc323dSTirumala Marri				interrupts = <0x2 0x4>;
271b5594a77SVinh Nguyen Huu Tuong				#address-cells = <1>;
272b5594a77SVinh Nguyen Huu Tuong				#size-cells = <0>;
273b5594a77SVinh Nguyen Huu Tuong				rtc@68 {
274b5594a77SVinh Nguyen Huu Tuong					compatible = "stm,m41t80";
275b5594a77SVinh Nguyen Huu Tuong					reg = <0x68>;
276b5594a77SVinh Nguyen Huu Tuong					interrupt-parent = <&UIC0>;
277b5594a77SVinh Nguyen Huu Tuong					interrupts = <0x9 0x8>;
278b5594a77SVinh Nguyen Huu Tuong				};
279b5594a77SVinh Nguyen Huu Tuong				sttm@4C {
280b5594a77SVinh Nguyen Huu Tuong					compatible = "adm,adm1032";
281b5594a77SVinh Nguyen Huu Tuong					reg = <0x4C>;
282b5594a77SVinh Nguyen Huu Tuong					interrupt-parent = <&UIC1>;
283b5594a77SVinh Nguyen Huu Tuong					interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */
284b5594a77SVinh Nguyen Huu Tuong				};
2856edc323dSTirumala Marri			};
2866edc323dSTirumala Marri
2876edc323dSTirumala Marri			IIC1: i2c@ef600800 {
2886edc323dSTirumala Marri				compatible = "ibm,iic";
2896edc323dSTirumala Marri				reg = <0xef600800 0x00000014>;
2906edc323dSTirumala Marri				interrupt-parent = <&UIC0>;
2916edc323dSTirumala Marri				interrupts = <0x3 0x4>;
2926edc323dSTirumala Marri			};
2936edc323dSTirumala Marri
2946edc323dSTirumala Marri			RGMII0: emac-rgmii@ef601500 {
2956edc323dSTirumala Marri				compatible = "ibm,rgmii";
2966edc323dSTirumala Marri				reg = <0xef601500 0x00000008>;
2976edc323dSTirumala Marri				has-mdio;
2986edc323dSTirumala Marri			};
2996edc323dSTirumala Marri
3006edc323dSTirumala Marri			TAH0: emac-tah@ef601350 {
3016edc323dSTirumala Marri				compatible = "ibm,tah";
3026edc323dSTirumala Marri				reg = <0xef601350 0x00000030>;
3036edc323dSTirumala Marri			};
3046edc323dSTirumala Marri
3056edc323dSTirumala Marri			EMAC0: ethernet@ef600c00 {
3066edc323dSTirumala Marri				device_type = "network";
3078dfc2b45SDuc Dang				compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
3086edc323dSTirumala Marri				interrupt-parent = <&EMAC0>;
3096edc323dSTirumala Marri				interrupts = <0x0 0x1>;
3106edc323dSTirumala Marri				#interrupt-cells = <1>;
3116edc323dSTirumala Marri				#address-cells = <0>;
3126edc323dSTirumala Marri				#size-cells = <0>;
3136edc323dSTirumala Marri				interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
3146edc323dSTirumala Marri						 /*Wake*/   0x1 &UIC2 0x14 0x4>;
3156edc323dSTirumala Marri				reg = <0xef600c00 0x000000c4>;
3166edc323dSTirumala Marri				local-mac-address = [000000000000]; /* Filled in by U-Boot */
3176edc323dSTirumala Marri				mal-device = <&MAL0>;
3186edc323dSTirumala Marri				mal-tx-channel = <0>;
3196edc323dSTirumala Marri				mal-rx-channel = <0>;
3206edc323dSTirumala Marri				cell-index = <0>;
3216edc323dSTirumala Marri				max-frame-size = <9000>;
3226edc323dSTirumala Marri				rx-fifo-size = <16384>;
3236edc323dSTirumala Marri				tx-fifo-size = <2048>;
3246edc323dSTirumala Marri				phy-mode = "rgmii";
3256edc323dSTirumala Marri				phy-map = <0x00000000>;
3266edc323dSTirumala Marri				rgmii-device = <&RGMII0>;
3276edc323dSTirumala Marri				rgmii-channel = <0>;
3286edc323dSTirumala Marri				tah-device = <&TAH0>;
3296edc323dSTirumala Marri				tah-channel = <0>;
3306edc323dSTirumala Marri				has-inverted-stacr-oc;
3316edc323dSTirumala Marri				has-new-stacr-staopc;
3326edc323dSTirumala Marri			};
3336edc323dSTirumala Marri		};
3346edc323dSTirumala Marri
335b5594a77SVinh Nguyen Huu Tuong		PCIE0: pciex@d00000000 {
336b5594a77SVinh Nguyen Huu Tuong			device_type = "pci";
337b5594a77SVinh Nguyen Huu Tuong			#interrupt-cells = <1>;
338b5594a77SVinh Nguyen Huu Tuong			#size-cells = <2>;
339b5594a77SVinh Nguyen Huu Tuong			#address-cells = <3>;
340b5594a77SVinh Nguyen Huu Tuong			compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
341b5594a77SVinh Nguyen Huu Tuong			primary;
342b5594a77SVinh Nguyen Huu Tuong			port = <0x0>; /* port number */
343b5594a77SVinh Nguyen Huu Tuong			reg = <0x0000000d 0x00000000 0x20000000	/* Config space access */
344b5594a77SVinh Nguyen Huu Tuong			       0x0000000c 0x08010000 0x00001000>;	/* Registers */
345b5594a77SVinh Nguyen Huu Tuong			dcr-reg = <0x100 0x020>;
346b5594a77SVinh Nguyen Huu Tuong			sdr-base = <0x300>;
347b5594a77SVinh Nguyen Huu Tuong
348b5594a77SVinh Nguyen Huu Tuong			/* Outbound ranges, one memory and one IO,
349b5594a77SVinh Nguyen Huu Tuong			 * later cannot be changed
350b5594a77SVinh Nguyen Huu Tuong			 */
351b5594a77SVinh Nguyen Huu Tuong			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
352b5594a77SVinh Nguyen Huu Tuong				  0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
353b5594a77SVinh Nguyen Huu Tuong				  0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
354b5594a77SVinh Nguyen Huu Tuong
355b5594a77SVinh Nguyen Huu Tuong			/* Inbound 2GB range starting at 0 */
356b5594a77SVinh Nguyen Huu Tuong			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
357b5594a77SVinh Nguyen Huu Tuong
358b5594a77SVinh Nguyen Huu Tuong			/* This drives busses 40 to 0x7f */
359b5594a77SVinh Nguyen Huu Tuong			bus-range = <0x40 0x7f>;
360b5594a77SVinh Nguyen Huu Tuong
361b5594a77SVinh Nguyen Huu Tuong			/* Legacy interrupts (note the weird polarity, the bridge seems
362b5594a77SVinh Nguyen Huu Tuong			 * to invert PCIe legacy interrupts).
363b5594a77SVinh Nguyen Huu Tuong			 * We are de-swizzling here because the numbers are actually for
364b5594a77SVinh Nguyen Huu Tuong			 * port of the root complex virtual P2P bridge. But I want
365b5594a77SVinh Nguyen Huu Tuong			 * to avoid putting a node for it in the tree, so the numbers
366b5594a77SVinh Nguyen Huu Tuong			 * below are basically de-swizzled numbers.
367b5594a77SVinh Nguyen Huu Tuong			 * The real slot is on idsel 0, so the swizzling is 1:1
368b5594a77SVinh Nguyen Huu Tuong			 */
369b5594a77SVinh Nguyen Huu Tuong			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
370b5594a77SVinh Nguyen Huu Tuong			interrupt-map = <
371b5594a77SVinh Nguyen Huu Tuong				0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
372b5594a77SVinh Nguyen Huu Tuong				0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
373b5594a77SVinh Nguyen Huu Tuong				0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
374b5594a77SVinh Nguyen Huu Tuong				0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
375b5594a77SVinh Nguyen Huu Tuong		};
376*9c6b2353SMai La
377*9c6b2353SMai La		MSI: ppc4xx-msi@C10000000 {
378*9c6b2353SMai La			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
379*9c6b2353SMai La			reg = < 0xC 0x10000000 0x100
380*9c6b2353SMai La				0xC 0x10000000 0x100>;
381*9c6b2353SMai La			sdr-base = <0x36C>;
382*9c6b2353SMai La			msi-data = <0x00004440>;
383*9c6b2353SMai La			msi-mask = <0x0000ffe0>;
384*9c6b2353SMai La			interrupts =<0 1 2 3 4 5 6 7>;
385*9c6b2353SMai La			interrupt-parent = <&MSI>;
386*9c6b2353SMai La			#interrupt-cells = <1>;
387*9c6b2353SMai La			#address-cells = <0>;
388*9c6b2353SMai La			#size-cells = <0>;
389*9c6b2353SMai La			msi-available-ranges = <0x0 0x100>;
390*9c6b2353SMai La			interrupt-map = <
391*9c6b2353SMai La				0 &UIC3 0x18 1
392*9c6b2353SMai La				1 &UIC3 0x19 1
393*9c6b2353SMai La				2 &UIC3 0x1A 1
394*9c6b2353SMai La				3 &UIC3 0x1B 1
395*9c6b2353SMai La				4 &UIC3 0x1C 1
396*9c6b2353SMai La				5 &UIC3 0x1D 1
397*9c6b2353SMai La				6 &UIC3 0x1E 1
398*9c6b2353SMai La				7 &UIC3 0x1F 1
399*9c6b2353SMai La			>;
400*9c6b2353SMai La		};
4016edc323dSTirumala Marri	};
4026edc323dSTirumala Marri};
403