xref: /linux/arch/parisc/kernel/processor.c (revision 1f2367a39f17bd553a75e179a747f9b257bc9478)
1 /*
2  *    Initial setup-routines for HP 9000 based hardware.
3  *
4  *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
5  *    Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
6  *    Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
7  *    Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
8  *    Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
9  *    Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
10  *
11  *    Initial PA-RISC Version: 04-23-1999 by Helge Deller
12  *
13  *    This program is free software; you can redistribute it and/or modify
14  *    it under the terms of the GNU General Public License as published by
15  *    the Free Software Foundation; either version 2, or (at your option)
16  *    any later version.
17  *
18  *    This program is distributed in the hope that it will be useful,
19  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
20  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  *    GNU General Public License for more details.
22  *
23  *    You should have received a copy of the GNU General Public License
24  *    along with this program; if not, write to the Free Software
25  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26  *
27  */
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/mm.h>
31 #include <linux/module.h>
32 #include <linux/seq_file.h>
33 #include <linux/random.h>
34 #include <linux/slab.h>
35 #include <linux/cpu.h>
36 #include <asm/param.h>
37 #include <asm/cache.h>
38 #include <asm/hardware.h>	/* for register_parisc_driver() stuff */
39 #include <asm/processor.h>
40 #include <asm/page.h>
41 #include <asm/pdc.h>
42 #include <asm/pdcpat.h>
43 #include <asm/irq.h>		/* for struct irq_region */
44 #include <asm/parisc-device.h>
45 
46 struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
47 EXPORT_SYMBOL(boot_cpu_data);
48 #ifdef CONFIG_PA8X00
49 int _parisc_requires_coherency __read_mostly;
50 EXPORT_SYMBOL(_parisc_requires_coherency);
51 #endif
52 
53 DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
54 
55 /*
56 **  	PARISC CPU driver - claim "device" and initialize CPU data structures.
57 **
58 ** Consolidate per CPU initialization into (mostly) one module.
59 ** Monarch CPU will initialize boot_cpu_data which shouldn't
60 ** change once the system has booted.
61 **
62 ** The callback *should* do per-instance initialization of
63 ** everything including the monarch. "Per CPU" init code in
64 ** setup.c:start_parisc() has migrated here and start_parisc()
65 ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
66 **
67 ** The goal of consolidating CPU initialization into one place is
68 ** to make sure all CPUs get initialized the same way.
69 ** The code path not shared is how PDC hands control of the CPU to the OS.
70 ** The initialization of OS data structures is the same (done below).
71 */
72 
73 /**
74  * init_cpu_profiler - enable/setup per cpu profiling hooks.
75  * @cpunum: The processor instance.
76  *
77  * FIXME: doesn't do much yet...
78  */
79 static void
80 init_percpu_prof(unsigned long cpunum)
81 {
82 }
83 
84 
85 /**
86  * processor_probe - Determine if processor driver should claim this device.
87  * @dev: The device which has been found.
88  *
89  * Determine if processor driver should claim this chip (return 0) or not
90  * (return 1).  If so, initialize the chip and tell other partners in crime
91  * they have work to do.
92  */
93 static int __init processor_probe(struct parisc_device *dev)
94 {
95 	unsigned long txn_addr;
96 	unsigned long cpuid;
97 	struct cpuinfo_parisc *p;
98 	struct pdc_pat_cpu_num cpu_info = { };
99 
100 #ifdef CONFIG_SMP
101 	if (num_online_cpus() >= nr_cpu_ids) {
102 		printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
103 		return 1;
104 	}
105 #else
106 	if (boot_cpu_data.cpu_count > 0) {
107 		printk(KERN_INFO "CONFIG_SMP=n  ignoring additional CPUs\n");
108 		return 1;
109 	}
110 #endif
111 
112 	/* logical CPU ID and update global counter
113 	 * May get overwritten by PAT code.
114 	 */
115 	cpuid = boot_cpu_data.cpu_count;
116 	txn_addr = dev->hpa.start;	/* for legacy PDC */
117 	cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
118 
119 #ifdef CONFIG_64BIT
120 	if (is_pdc_pat()) {
121 		ulong status;
122 		unsigned long bytecnt;
123 	        pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
124 
125 		pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
126 		if (!pa_pdc_cell)
127 			panic("couldn't allocate memory for PDC_PAT_CELL!");
128 
129 		status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
130 			dev->mod_index, PA_VIEW, pa_pdc_cell);
131 
132 		BUG_ON(PDC_OK != status);
133 
134 		/* verify it's the same as what do_pat_inventory() found */
135 		BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
136 		BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
137 
138 		txn_addr = pa_pdc_cell->mod[0];   /* id_eid for IO sapic */
139 
140 		kfree(pa_pdc_cell);
141 
142 		/* get the cpu number */
143 		status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
144 		BUG_ON(PDC_OK != status);
145 
146 		pr_info("Logical CPU #%lu is physical cpu #%lu at location "
147 			"0x%lx with hpa %pa\n",
148 			cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
149 			&dev->hpa.start);
150 
151 #undef USE_PAT_CPUID
152 #ifdef USE_PAT_CPUID
153 /* We need contiguous numbers for cpuid. Firmware's notion
154  * of cpuid is for physical CPUs and we just don't care yet.
155  * We'll care when we need to query PAT PDC about a CPU *after*
156  * boot time (ie shutdown a CPU from an OS perspective).
157  */
158 		if (cpu_info.cpu_num >= NR_CPUS) {
159 			printk(KERN_WARNING "IGNORING CPU at %pa,"
160 				" cpu_slot_id > NR_CPUS"
161 				" (%ld > %d)\n",
162 				&dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
163 			/* Ignore CPU since it will only crash */
164 			boot_cpu_data.cpu_count--;
165 			return 1;
166 		} else {
167 			cpuid = cpu_info.cpu_num;
168 		}
169 #endif
170 	}
171 #endif
172 
173 	p = &per_cpu(cpu_data, cpuid);
174 	boot_cpu_data.cpu_count++;
175 
176 	/* initialize counters - CPU 0 gets it_value set in time_init() */
177 	if (cpuid)
178 		memset(p, 0, sizeof(struct cpuinfo_parisc));
179 
180 	p->loops_per_jiffy = loops_per_jiffy;
181 	p->dev = dev;		/* Save IODC data in case we need it */
182 	p->hpa = dev->hpa.start;	/* save CPU hpa */
183 	p->cpuid = cpuid;	/* save CPU id */
184 	p->txn_addr = txn_addr;	/* save CPU IRQ address */
185 	p->cpu_num = cpu_info.cpu_num;
186 	p->cpu_loc = cpu_info.cpu_loc;
187 
188 	store_cpu_topology(cpuid);
189 
190 #ifdef CONFIG_SMP
191 	/*
192 	** FIXME: review if any other initialization is clobbered
193 	**	  for boot_cpu by the above memset().
194 	*/
195 	init_percpu_prof(cpuid);
196 #endif
197 
198 	/*
199 	** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
200 	** OS control. RENDEZVOUS is the default state - see mem_set above.
201 	**	p->state = STATE_RENDEZVOUS;
202 	*/
203 
204 #if 0
205 	/* CPU 0 IRQ table is statically allocated/initialized */
206 	if (cpuid) {
207 		struct irqaction actions[];
208 
209 		/*
210 		** itimer and ipi IRQ handlers are statically initialized in
211 		** arch/parisc/kernel/irq.c. ie Don't need to register them.
212 		*/
213 		actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
214 		if (!actions) {
215 			/* not getting it's own table, share with monarch */
216 			actions = cpu_irq_actions[0];
217 		}
218 
219 		cpu_irq_actions[cpuid] = actions;
220 	}
221 #endif
222 
223 	/*
224 	 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
225 	 */
226 #ifdef CONFIG_SMP
227 	if (cpuid) {
228 		set_cpu_present(cpuid, true);
229 		cpu_up(cpuid);
230 	}
231 #endif
232 
233 	return 0;
234 }
235 
236 /**
237  * collect_boot_cpu_data - Fill the boot_cpu_data structure.
238  *
239  * This function collects and stores the generic processor information
240  * in the boot_cpu_data structure.
241  */
242 void __init collect_boot_cpu_data(void)
243 {
244 	unsigned long cr16_seed;
245 	char orig_prod_num[64], current_prod_num[64], serial_no[64];
246 
247 	memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
248 
249 	cr16_seed = get_cycles();
250 	add_device_randomness(&cr16_seed, sizeof(cr16_seed));
251 
252 	boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
253 
254 	/* get CPU-Model Information... */
255 #define p ((unsigned long *)&boot_cpu_data.pdc.model)
256 	if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
257 		printk(KERN_INFO
258 			"model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
259 			p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
260 
261 		add_device_randomness(&boot_cpu_data.pdc.model,
262 			sizeof(boot_cpu_data.pdc.model));
263 	}
264 #undef p
265 
266 	if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
267 		printk(KERN_INFO "vers  %08lx\n",
268 			boot_cpu_data.pdc.versions);
269 
270 		add_device_randomness(&boot_cpu_data.pdc.versions,
271 			sizeof(boot_cpu_data.pdc.versions));
272 	}
273 
274 	if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
275 		printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
276 			(boot_cpu_data.pdc.cpuid >> 5) & 127,
277 			boot_cpu_data.pdc.cpuid & 31,
278 			boot_cpu_data.pdc.cpuid);
279 
280 		add_device_randomness(&boot_cpu_data.pdc.cpuid,
281 			sizeof(boot_cpu_data.pdc.cpuid));
282 	}
283 
284 	if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
285 		printk(KERN_INFO "capabilities 0x%lx\n",
286 			boot_cpu_data.pdc.capabilities);
287 
288 	if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
289 		printk(KERN_INFO "model %s\n",
290 			boot_cpu_data.pdc.sys_model_name);
291 
292 	dump_stack_set_arch_desc("%s", boot_cpu_data.pdc.sys_model_name);
293 
294 	boot_cpu_data.hversion =  boot_cpu_data.pdc.model.hversion;
295 	boot_cpu_data.sversion =  boot_cpu_data.pdc.model.sversion;
296 
297 	boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
298 	boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
299 	boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
300 
301 #ifdef CONFIG_PA8X00
302 	_parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
303 				(boot_cpu_data.cpu_type == mako2);
304 #endif
305 
306 	if (pdc_model_platform_info(orig_prod_num, current_prod_num, serial_no) == PDC_OK) {
307 		printk(KERN_INFO "product %s, original product %s, S/N: %s\n",
308 			current_prod_num, orig_prod_num, serial_no);
309 		add_device_randomness(orig_prod_num, strlen(orig_prod_num));
310 		add_device_randomness(current_prod_num, strlen(current_prod_num));
311 		add_device_randomness(serial_no, strlen(serial_no));
312 	}
313 }
314 
315 
316 /**
317  * init_per_cpu - Handle individual processor initializations.
318  * @cpunum: logical processor number.
319  *
320  * This function handles initialization for *every* CPU
321  * in the system:
322  *
323  * o Set "default" CPU width for trap handlers
324  *
325  * o Enable FP coprocessor
326  *   REVISIT: this could be done in the "code 22" trap handler.
327  *	(frowands idea - that way we know which processes need FP
328  *	registers saved on the interrupt stack.)
329  *   NEWS FLASH: wide kernels need FP coprocessor enabled to handle
330  *	formatted printing of %lx for example (double divides I think)
331  *
332  * o Enable CPU profiling hooks.
333  */
334 int __init init_per_cpu(int cpunum)
335 {
336 	int ret;
337 	struct pdc_coproc_cfg coproc_cfg;
338 
339 	set_firmware_width();
340 	ret = pdc_coproc_cfg(&coproc_cfg);
341 
342 	store_cpu_topology(cpunum);
343 
344 	if(ret >= 0 && coproc_cfg.ccr_functional) {
345 		mtctl(coproc_cfg.ccr_functional, 10);  /* 10 == Coprocessor Control Reg */
346 
347 		/* FWIW, FP rev/model is a more accurate way to determine
348 		** CPU type. CPU rev/model has some ambiguous cases.
349 		*/
350 		per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
351 		per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
352 
353 		if (cpunum == 0)
354 			printk(KERN_INFO  "FP[%d] enabled: Rev %ld Model %ld\n",
355 				cpunum, coproc_cfg.revision, coproc_cfg.model);
356 
357 		/*
358 		** store status register to stack (hopefully aligned)
359 		** and clear the T-bit.
360 		*/
361 		asm volatile ("fstd    %fr0,8(%sp)");
362 
363 	} else {
364 		printk(KERN_WARNING  "WARNING: No FP CoProcessor?!"
365 			" (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
366 #ifdef CONFIG_64BIT
367 			"Halting Machine - FP required\n"
368 #endif
369 			, coproc_cfg.ccr_functional);
370 #ifdef CONFIG_64BIT
371 		mdelay(100);	/* previous chars get pushed to console */
372 		panic("FP CoProc not reported");
373 #endif
374 	}
375 
376 	/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
377 	init_percpu_prof(cpunum);
378 
379 	return ret;
380 }
381 
382 /*
383  * Display CPU info for all CPUs.
384  */
385 int
386 show_cpuinfo (struct seq_file *m, void *v)
387 {
388 	unsigned long cpu;
389 
390 	for_each_online_cpu(cpu) {
391 		const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
392 #ifdef CONFIG_SMP
393 		if (0 == cpuinfo->hpa)
394 			continue;
395 #endif
396 		seq_printf(m, "processor\t: %lu\n"
397 				"cpu family\t: PA-RISC %s\n",
398 				 cpu, boot_cpu_data.family_name);
399 
400 		seq_printf(m, "cpu\t\t: %s\n",  boot_cpu_data.cpu_name );
401 
402 		/* cpu MHz */
403 		seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
404 				 boot_cpu_data.cpu_hz / 1000000,
405 				 boot_cpu_data.cpu_hz % 1000000  );
406 
407 #ifdef CONFIG_PARISC_CPU_TOPOLOGY
408 		seq_printf(m, "physical id\t: %d\n",
409 				topology_physical_package_id(cpu));
410 		seq_printf(m, "siblings\t: %d\n",
411 				cpumask_weight(topology_core_cpumask(cpu)));
412 		seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
413 #endif
414 
415 		seq_printf(m, "capabilities\t:");
416 		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
417 			seq_puts(m, " os32");
418 		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
419 			seq_puts(m, " os64");
420 		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
421 			seq_puts(m, " iopdir_fdc");
422 		switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
423 		case PDC_MODEL_NVA_SUPPORTED:
424 			seq_puts(m, " nva_supported");
425 			break;
426 		case PDC_MODEL_NVA_SLOW:
427 			seq_puts(m, " nva_slow");
428 			break;
429 		case PDC_MODEL_NVA_UNSUPPORTED:
430 			seq_puts(m, " needs_equivalent_aliasing");
431 			break;
432 		}
433 		seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
434 
435 		seq_printf(m, "model\t\t: %s\n"
436 				"model name\t: %s\n",
437 				 boot_cpu_data.pdc.sys_model_name,
438 				 cpuinfo->dev ?
439 				 cpuinfo->dev->name : "Unknown");
440 
441 		seq_printf(m, "hversion\t: 0x%08x\n"
442 			        "sversion\t: 0x%08x\n",
443 				 boot_cpu_data.hversion,
444 				 boot_cpu_data.sversion );
445 
446 		/* print cachesize info */
447 		show_cache_info(m);
448 
449 		seq_printf(m, "bogomips\t: %lu.%02lu\n",
450 			     cpuinfo->loops_per_jiffy / (500000 / HZ),
451 			     (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
452 
453 		seq_printf(m, "software id\t: %ld\n\n",
454 				boot_cpu_data.pdc.model.sw_id);
455 	}
456 	return 0;
457 }
458 
459 static const struct parisc_device_id processor_tbl[] __initconst = {
460 	{ HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
461 	{ 0, }
462 };
463 
464 static struct parisc_driver cpu_driver __refdata = {
465 	.name		= "CPU",
466 	.id_table	= processor_tbl,
467 	.probe		= processor_probe
468 };
469 
470 /**
471  * processor_init - Processor initialization procedure.
472  *
473  * Register this driver.
474  */
475 void __init processor_init(void)
476 {
477 	register_parisc_driver(&cpu_driver);
478 }
479