1 /* 2 * Initial setup-routines for HP 9000 based hardware. 3 * 4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 5 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de> 6 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf) 7 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net> 8 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org> 9 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net> 10 * 11 * Initial PA-RISC Version: 04-23-1999 by Helge Deller 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2, or (at your option) 16 * any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 26 * 27 */ 28 #include <linux/delay.h> 29 #include <linux/init.h> 30 #include <linux/mm.h> 31 #include <linux/module.h> 32 #include <linux/seq_file.h> 33 #include <linux/slab.h> 34 #include <linux/cpu.h> 35 #include <asm/param.h> 36 #include <asm/cache.h> 37 #include <asm/hardware.h> /* for register_parisc_driver() stuff */ 38 #include <asm/processor.h> 39 #include <asm/page.h> 40 #include <asm/pdc.h> 41 #include <asm/pdcpat.h> 42 #include <asm/irq.h> /* for struct irq_region */ 43 #include <asm/parisc-device.h> 44 45 struct system_cpuinfo_parisc boot_cpu_data __read_mostly; 46 EXPORT_SYMBOL(boot_cpu_data); 47 #ifdef CONFIG_PA8X00 48 int _parisc_requires_coherency __read_mostly; 49 EXPORT_SYMBOL(_parisc_requires_coherency); 50 #endif 51 52 DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data); 53 54 extern int update_cr16_clocksource(void); /* from time.c */ 55 56 /* 57 ** PARISC CPU driver - claim "device" and initialize CPU data structures. 58 ** 59 ** Consolidate per CPU initialization into (mostly) one module. 60 ** Monarch CPU will initialize boot_cpu_data which shouldn't 61 ** change once the system has booted. 62 ** 63 ** The callback *should* do per-instance initialization of 64 ** everything including the monarch. "Per CPU" init code in 65 ** setup.c:start_parisc() has migrated here and start_parisc() 66 ** will call register_parisc_driver(&cpu_driver) before calling do_inventory(). 67 ** 68 ** The goal of consolidating CPU initialization into one place is 69 ** to make sure all CPUs get initialized the same way. 70 ** The code path not shared is how PDC hands control of the CPU to the OS. 71 ** The initialization of OS data structures is the same (done below). 72 */ 73 74 /** 75 * init_cpu_profiler - enable/setup per cpu profiling hooks. 76 * @cpunum: The processor instance. 77 * 78 * FIXME: doesn't do much yet... 79 */ 80 static void 81 init_percpu_prof(unsigned long cpunum) 82 { 83 struct cpuinfo_parisc *p; 84 85 p = &per_cpu(cpu_data, cpunum); 86 p->prof_counter = 1; 87 p->prof_multiplier = 1; 88 } 89 90 91 /** 92 * processor_probe - Determine if processor driver should claim this device. 93 * @dev: The device which has been found. 94 * 95 * Determine if processor driver should claim this chip (return 0) or not 96 * (return 1). If so, initialize the chip and tell other partners in crime 97 * they have work to do. 98 */ 99 static int processor_probe(struct parisc_device *dev) 100 { 101 unsigned long txn_addr; 102 unsigned long cpuid; 103 struct cpuinfo_parisc *p; 104 105 #ifdef CONFIG_SMP 106 if (num_online_cpus() >= nr_cpu_ids) { 107 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n"); 108 return 1; 109 } 110 #else 111 if (boot_cpu_data.cpu_count > 0) { 112 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n"); 113 return 1; 114 } 115 #endif 116 117 /* logical CPU ID and update global counter 118 * May get overwritten by PAT code. 119 */ 120 cpuid = boot_cpu_data.cpu_count; 121 txn_addr = dev->hpa.start; /* for legacy PDC */ 122 123 #ifdef CONFIG_64BIT 124 if (is_pdc_pat()) { 125 ulong status; 126 unsigned long bytecnt; 127 pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell; 128 #undef USE_PAT_CPUID 129 #ifdef USE_PAT_CPUID 130 struct pdc_pat_cpu_num cpu_info; 131 #endif 132 133 pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL); 134 if (!pa_pdc_cell) 135 panic("couldn't allocate memory for PDC_PAT_CELL!"); 136 137 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc, 138 dev->mod_index, PA_VIEW, pa_pdc_cell); 139 140 BUG_ON(PDC_OK != status); 141 142 /* verify it's the same as what do_pat_inventory() found */ 143 BUG_ON(dev->mod_info != pa_pdc_cell->mod_info); 144 BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location); 145 146 txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */ 147 148 kfree(pa_pdc_cell); 149 150 #ifdef USE_PAT_CPUID 151 /* We need contiguous numbers for cpuid. Firmware's notion 152 * of cpuid is for physical CPUs and we just don't care yet. 153 * We'll care when we need to query PAT PDC about a CPU *after* 154 * boot time (ie shutdown a CPU from an OS perspective). 155 */ 156 /* get the cpu number */ 157 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start); 158 159 BUG_ON(PDC_OK != status); 160 161 if (cpu_info.cpu_num >= NR_CPUS) { 162 printk(KERN_WARNING "IGNORING CPU at 0x%x," 163 " cpu_slot_id > NR_CPUS" 164 " (%ld > %d)\n", 165 dev->hpa.start, cpu_info.cpu_num, NR_CPUS); 166 /* Ignore CPU since it will only crash */ 167 boot_cpu_data.cpu_count--; 168 return 1; 169 } else { 170 cpuid = cpu_info.cpu_num; 171 } 172 #endif 173 } 174 #endif 175 176 p = &per_cpu(cpu_data, cpuid); 177 boot_cpu_data.cpu_count++; 178 179 /* initialize counters - CPU 0 gets it_value set in time_init() */ 180 if (cpuid) 181 memset(p, 0, sizeof(struct cpuinfo_parisc)); 182 183 p->loops_per_jiffy = loops_per_jiffy; 184 p->dev = dev; /* Save IODC data in case we need it */ 185 p->hpa = dev->hpa.start; /* save CPU hpa */ 186 p->cpuid = cpuid; /* save CPU id */ 187 p->txn_addr = txn_addr; /* save CPU IRQ address */ 188 #ifdef CONFIG_SMP 189 /* 190 ** FIXME: review if any other initialization is clobbered 191 ** for boot_cpu by the above memset(). 192 */ 193 init_percpu_prof(cpuid); 194 #endif 195 196 /* 197 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into 198 ** OS control. RENDEZVOUS is the default state - see mem_set above. 199 ** p->state = STATE_RENDEZVOUS; 200 */ 201 202 #if 0 203 /* CPU 0 IRQ table is statically allocated/initialized */ 204 if (cpuid) { 205 struct irqaction actions[]; 206 207 /* 208 ** itimer and ipi IRQ handlers are statically initialized in 209 ** arch/parisc/kernel/irq.c. ie Don't need to register them. 210 */ 211 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC); 212 if (!actions) { 213 /* not getting it's own table, share with monarch */ 214 actions = cpu_irq_actions[0]; 215 } 216 217 cpu_irq_actions[cpuid] = actions; 218 } 219 #endif 220 221 /* 222 * Bring this CPU up now! (ignore bootstrap cpuid == 0) 223 */ 224 #ifdef CONFIG_SMP 225 if (cpuid) { 226 set_cpu_present(cpuid, true); 227 cpu_up(cpuid); 228 } 229 #endif 230 231 /* If we've registered more than one cpu, 232 * we'll use the jiffies clocksource since cr16 233 * is not synchronized between CPUs. 234 */ 235 update_cr16_clocksource(); 236 237 return 0; 238 } 239 240 /** 241 * collect_boot_cpu_data - Fill the boot_cpu_data structure. 242 * 243 * This function collects and stores the generic processor information 244 * in the boot_cpu_data structure. 245 */ 246 void __init collect_boot_cpu_data(void) 247 { 248 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data)); 249 250 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */ 251 252 /* get CPU-Model Information... */ 253 #define p ((unsigned long *)&boot_cpu_data.pdc.model) 254 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) 255 printk(KERN_INFO 256 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", 257 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]); 258 #undef p 259 260 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) 261 printk(KERN_INFO "vers %08lx\n", 262 boot_cpu_data.pdc.versions); 263 264 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) 265 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n", 266 (boot_cpu_data.pdc.cpuid >> 5) & 127, 267 boot_cpu_data.pdc.cpuid & 31, 268 boot_cpu_data.pdc.cpuid); 269 270 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK) 271 printk(KERN_INFO "capabilities 0x%lx\n", 272 boot_cpu_data.pdc.capabilities); 273 274 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK) 275 printk(KERN_INFO "model %s\n", 276 boot_cpu_data.pdc.sys_model_name); 277 278 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion; 279 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion; 280 281 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion); 282 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0]; 283 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1]; 284 285 #ifdef CONFIG_PA8X00 286 _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) || 287 (boot_cpu_data.cpu_type == mako2); 288 #endif 289 } 290 291 292 /** 293 * init_per_cpu - Handle individual processor initializations. 294 * @cpunum: logical processor number. 295 * 296 * This function handles initialization for *every* CPU 297 * in the system: 298 * 299 * o Set "default" CPU width for trap handlers 300 * 301 * o Enable FP coprocessor 302 * REVISIT: this could be done in the "code 22" trap handler. 303 * (frowands idea - that way we know which processes need FP 304 * registers saved on the interrupt stack.) 305 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle 306 * formatted printing of %lx for example (double divides I think) 307 * 308 * o Enable CPU profiling hooks. 309 */ 310 int init_per_cpu(int cpunum) 311 { 312 int ret; 313 struct pdc_coproc_cfg coproc_cfg; 314 315 set_firmware_width(); 316 ret = pdc_coproc_cfg(&coproc_cfg); 317 318 if(ret >= 0 && coproc_cfg.ccr_functional) { 319 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */ 320 321 /* FWIW, FP rev/model is a more accurate way to determine 322 ** CPU type. CPU rev/model has some ambiguous cases. 323 */ 324 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision; 325 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model; 326 327 if (cpunum == 0) 328 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n", 329 cpunum, coproc_cfg.revision, coproc_cfg.model); 330 331 /* 332 ** store status register to stack (hopefully aligned) 333 ** and clear the T-bit. 334 */ 335 asm volatile ("fstd %fr0,8(%sp)"); 336 337 } else { 338 printk(KERN_WARNING "WARNING: No FP CoProcessor?!" 339 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n" 340 #ifdef CONFIG_64BIT 341 "Halting Machine - FP required\n" 342 #endif 343 , coproc_cfg.ccr_functional); 344 #ifdef CONFIG_64BIT 345 mdelay(100); /* previous chars get pushed to console */ 346 panic("FP CoProc not reported"); 347 #endif 348 } 349 350 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */ 351 init_percpu_prof(cpunum); 352 353 return ret; 354 } 355 356 /* 357 * Display CPU info for all CPUs. 358 */ 359 int 360 show_cpuinfo (struct seq_file *m, void *v) 361 { 362 unsigned long cpu; 363 364 for_each_online_cpu(cpu) { 365 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); 366 #ifdef CONFIG_SMP 367 if (0 == cpuinfo->hpa) 368 continue; 369 #endif 370 seq_printf(m, "processor\t: %lu\n" 371 "cpu family\t: PA-RISC %s\n", 372 cpu, boot_cpu_data.family_name); 373 374 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name ); 375 376 /* cpu MHz */ 377 seq_printf(m, "cpu MHz\t\t: %d.%06d\n", 378 boot_cpu_data.cpu_hz / 1000000, 379 boot_cpu_data.cpu_hz % 1000000 ); 380 381 seq_printf(m, "capabilities\t:"); 382 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32) 383 seq_puts(m, " os32"); 384 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64) 385 seq_puts(m, " os64"); 386 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC) 387 seq_puts(m, " iopdir_fdc"); 388 switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) { 389 case PDC_MODEL_NVA_SUPPORTED: 390 seq_puts(m, " nva_supported"); 391 break; 392 case PDC_MODEL_NVA_SLOW: 393 seq_puts(m, " nva_slow"); 394 break; 395 case PDC_MODEL_NVA_UNSUPPORTED: 396 seq_puts(m, " needs_equivalent_aliasing"); 397 break; 398 } 399 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities); 400 401 seq_printf(m, "model\t\t: %s\n" 402 "model name\t: %s\n", 403 boot_cpu_data.pdc.sys_model_name, 404 cpuinfo->dev ? 405 cpuinfo->dev->name : "Unknown"); 406 407 seq_printf(m, "hversion\t: 0x%08x\n" 408 "sversion\t: 0x%08x\n", 409 boot_cpu_data.hversion, 410 boot_cpu_data.sversion ); 411 412 /* print cachesize info */ 413 show_cache_info(m); 414 415 seq_printf(m, "bogomips\t: %lu.%02lu\n", 416 cpuinfo->loops_per_jiffy / (500000 / HZ), 417 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100); 418 419 seq_printf(m, "software id\t: %ld\n\n", 420 boot_cpu_data.pdc.model.sw_id); 421 } 422 return 0; 423 } 424 425 static const struct parisc_device_id processor_tbl[] = { 426 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID }, 427 { 0, } 428 }; 429 430 static struct parisc_driver cpu_driver = { 431 .name = "CPU", 432 .id_table = processor_tbl, 433 .probe = processor_probe 434 }; 435 436 /** 437 * processor_init - Processor initialization procedure. 438 * 439 * Register this driver. 440 */ 441 void __init processor_init(void) 442 { 443 register_parisc_driver(&cpu_driver); 444 } 445