1/* 2 * HPMC (High Priority Machine Check) handler. 3 * 4 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org> 5 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) 6 * Copyright (C) 2000 Hewlett-Packard (John Marvin) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23 24/* 25 * This HPMC handler retrieves the HPMC pim data, resets IO and 26 * returns to the default trap handler with code set to 1 (HPMC). 27 * The default trap handler calls handle interruption, which 28 * does a stack and register dump. This at least allows kernel 29 * developers to get back to C code in virtual mode, where they 30 * have the option to examine and print values from memory that 31 * would help in debugging an HPMC caused by a software bug. 32 * 33 * There is more to do here: 34 * 35 * 1) On MP systems we need to synchronize processors 36 * before calling pdc/iodc. 37 * 2) We should be checking the system state and not 38 * returning to the fault handler if things are really 39 * bad. 40 * 41 */ 42 43 .level 1.1 44 45#include <asm/assembly.h> 46#include <asm/pdc.h> 47#include <asm/psw.h> 48 49#include <linux/linkage.h> 50#include <linux/init.h> 51 52 /* 53 * stack for os_hpmc, the HPMC handler. 54 * buffer for IODC procedures (for the HPMC handler). 55 * 56 * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc. 57 */ 58 59 __PAGE_ALIGNED_BSS 60 .align 4096 61hpmc_stack: 62 .block 16384 63 64#define HPMC_IODC_BUF_SIZE 0x8000 65 66 __PAGE_ALIGNED_BSS 67 .align 4096 68hpmc_iodc_buf: 69 .block HPMC_IODC_BUF_SIZE 70 71 .section .bss 72 .align 8 73hpmc_raddr: 74 .block 128 75 76#define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */ 77 78 .section .bss 79 .align 8 80ENTRY(hpmc_pim_data) 81 .block HPMC_PIM_DATA_SIZE 82END(hpmc_pim_data) 83 84 .text 85 86 .import intr_save, code 87 .align 16 88ENTRY(os_hpmc) 89.os_hpmc: 90 91 /* 92 * registers modified: 93 * 94 * Using callee saves registers without saving them. The 95 * original values are in the pim dump if we need them. 96 * 97 * r2 (rp) return pointer 98 * r3 address of PDCE_PROC 99 * r4 scratch 100 * r5 scratch 101 * r23 (arg3) procedure arg 102 * r24 (arg2) procedure arg 103 * r25 (arg1) procedure arg 104 * r26 (arg0) procedure arg 105 * r30 (sp) stack pointer 106 * 107 * registers read: 108 * 109 * r26 contains address of PDCE_PROC on entry 110 * r28 (ret0) return value from procedure 111 */ 112 113 copy arg0, %r3 /* save address of PDCE_PROC */ 114 115 /* 116 * disable nested HPMCs 117 * 118 * Increment os_hpmc checksum to invalidate it. 119 * Do this before turning the PSW M bit off. 120 */ 121 122 mfctl %cr14, %r4 123 ldw 52(%r4),%r5 124 addi 1,%r5,%r5 125 stw %r5,52(%r4) 126 127 /* MP_FIXME: synchronize all processors. */ 128 129 /* Setup stack pointer. */ 130 131 load32 PA(hpmc_stack),sp 132 133 ldo 128(sp),sp /* leave room for arguments */ 134 135 /* 136 * Most PDC routines require that the M bit be off. 137 * So turn on the Q bit and turn off the M bit. 138 */ 139 140 ldi PSW_SM_Q,%r4 /* PSW Q on, PSW M off */ 141 mtctl %r4,ipsw 142 mtctl %r0,pcsq 143 mtctl %r0,pcsq 144 load32 PA(os_hpmc_1),%r4 145 mtctl %r4,pcoq 146 ldo 4(%r4),%r4 147 mtctl %r4,pcoq 148 rfi 149 nop 150 151os_hpmc_1: 152 153 /* Call PDC_PIM to get HPMC pim info */ 154 155 /* 156 * Note that on some newer boxes, PDC_PIM must be called 157 * before PDC_IO if you want IO to be reset. PDC_PIM sets 158 * a flag that PDC_IO examines. 159 */ 160 161 ldo PDC_PIM(%r0), arg0 162 ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */ 163 load32 PA(hpmc_raddr),arg2 164 load32 PA(hpmc_pim_data),arg3 165 load32 HPMC_PIM_DATA_SIZE,%r4 166 stw %r4,-52(sp) 167 168 ldil L%PA(os_hpmc_2), rp 169 bv (r3) /* call pdce_proc */ 170 ldo R%PA(os_hpmc_2)(rp), rp 171 172os_hpmc_2: 173 comib,<> 0,ret0, os_hpmc_fail 174 175 /* Reset IO by calling the hversion dependent PDC_IO routine */ 176 177 ldo PDC_IO(%r0),arg0 178 ldo 0(%r0),arg1 /* log IO errors */ 179 ldo 0(%r0),arg2 /* reserved */ 180 ldo 0(%r0),arg3 /* reserved */ 181 stw %r0,-52(sp) /* reserved */ 182 183 ldil L%PA(os_hpmc_3),rp 184 bv (%r3) /* call pdce_proc */ 185 ldo R%PA(os_hpmc_3)(rp),rp 186 187os_hpmc_3: 188 189 /* FIXME? Check for errors from PDC_IO (-1 might be OK) */ 190 191 /* 192 * Initialize the IODC console device (HPA,SPA, path etc. 193 * are stored on page 0. 194 */ 195 196 /* 197 * Load IODC into hpmc_iodc_buf by calling PDC_IODC. 198 * Note that PDC_IODC handles flushing the appropriate 199 * data and instruction cache lines. 200 */ 201 202 ldo PDC_IODC(%r0),arg0 203 ldo PDC_IODC_READ(%r0),arg1 204 load32 PA(hpmc_raddr),arg2 205 ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */ 206 ldo PDC_IODC_RI_INIT(%r0),%r4 207 stw %r4,-52(sp) 208 load32 PA(hpmc_iodc_buf),%r4 209 stw %r4,-56(sp) 210 load32 HPMC_IODC_BUF_SIZE,%r4 211 stw %r4,-60(sp) 212 213 ldil L%PA(os_hpmc_4),rp 214 bv (%r3) /* call pdce_proc */ 215 ldo R%PA(os_hpmc_4)(rp),rp 216 217os_hpmc_4: 218 comib,<> 0,ret0,os_hpmc_fail 219 220 /* Call the entry init (just loaded by PDC_IODC) */ 221 222 ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */ 223 ldo ENTRY_INIT_MOD_DEV(%r0), arg1 224 ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */ 225 depi 0,31,11,arg2 /* clear bits 21-31 */ 226 ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */ 227 load32 PA(hpmc_raddr),%r4 228 stw %r4, -52(sp) 229 stw %r0, -56(sp) /* HV */ 230 stw %r0, -60(sp) /* HV */ 231 stw %r0, -64(sp) /* HV */ 232 stw %r0, -68(sp) /* lang, must be zero */ 233 234 load32 PA(hpmc_iodc_buf),%r5 235 ldil L%PA(os_hpmc_5),rp 236 bv (%r5) 237 ldo R%PA(os_hpmc_5)(rp),rp 238 239os_hpmc_5: 240 comib,<> 0,ret0,os_hpmc_fail 241 242 /* Prepare to call intr_save */ 243 244 /* 245 * Load kernel page directory (load into user also, since 246 * we don't intend to ever return to user land anyway) 247 */ 248 249 load32 PA(swapper_pg_dir),%r4 250 mtctl %r4,%cr24 /* Initialize kernel root pointer */ 251 mtctl %r4,%cr25 /* Initialize user root pointer */ 252 253 /* Clear sr4-sr7 */ 254 255 mtsp %r0, %sr4 256 mtsp %r0, %sr5 257 mtsp %r0, %sr6 258 mtsp %r0, %sr7 259 260 tovirt_r1 %r30 /* make sp virtual */ 261 262 rsm PSW_SM_Q,%r0 /* Clear Q bit */ 263 ldi 1,%r8 /* Set trap code to "1" for HPMC */ 264 load32 PA(intr_save),%r1 265 be 0(%sr7,%r1) 266 nop 267 268os_hpmc_fail: 269 270 /* 271 * Reset the system 272 * 273 * Some systems may lockup from a broadcast reset, so try the 274 * hversion PDC_BROADCAST_RESET() first. 275 * MP_FIXME: reset all processors if more than one central bus. 276 */ 277 278 /* PDC_BROADCAST_RESET() */ 279 280 ldo PDC_BROADCAST_RESET(%r0),arg0 281 ldo 0(%r0),arg1 /* do reset */ 282 283 ldil L%PA(os_hpmc_6),rp 284 bv (%r3) /* call pdce_proc */ 285 ldo R%PA(os_hpmc_6)(rp),rp 286 287os_hpmc_6: 288 289 /* 290 * possible return values: 291 * -1 non-existent procedure 292 * -2 non-existent option 293 * -16 unaligned stack 294 * 295 * If call returned, do a broadcast reset. 296 */ 297 298 ldil L%0xfffc0000,%r4 /* IO_BROADCAST */ 299 ldo 5(%r0),%r5 300 stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */ 301 302 b . 303 nop 304 .align 16 /* make function length multiple of 16 bytes */ 305.os_hpmc_end: 306 307 308 __INITRODATA 309.globl os_hpmc_size 310 .align 4 311 .type os_hpmc_size, @object 312 .size os_hpmc_size, 4 313os_hpmc_size: 314 .word .os_hpmc_end-.os_hpmc 315