1/* This file is subject to the terms and conditions of the GNU General Public 2 * License. See the file "COPYING" in the main directory of this archive 3 * for more details. 4 * 5 * Copyright (C) 1999 by Helge Deller 6 * Copyright 1999 SuSE GmbH (Philipp Rumpf) 7 * Copyright 1999 Philipp Rumpf (prumpf@tux.org) 8 * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com) 9 * Copyright (C) 2001 Grant Grundler (Hewlett Packard) 10 * Copyright (C) 2004 Kyle McMartin <kyle@debian.org> 11 * 12 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de> 13 */ 14 15#include <linux/config.h> /* for CONFIG_SMP */ 16 17#include <asm/asm-offsets.h> 18#include <asm/psw.h> 19#include <asm/pdc.h> 20 21#include <asm/assembly.h> 22#include <asm/pgtable.h> 23 24 .level LEVEL 25 26 .data 27 28 .export boot_args 29boot_args: 30 .word 0 /* arg0 */ 31 .word 0 /* arg1 */ 32 .word 0 /* arg2 */ 33 .word 0 /* arg3 */ 34 35 .text 36 .align 4 37 .import init_thread_union,data 38 .import fault_vector_20,code /* IVA parisc 2.0 32 bit */ 39#ifndef CONFIG_64BIT 40 .import fault_vector_11,code /* IVA parisc 1.1 32 bit */ 41 .import $global$ /* forward declaration */ 42#endif /*!CONFIG_64BIT*/ 43 .export stext 44 .export _stext,data /* Kernel want it this way! */ 45_stext: 46stext: 47 .proc 48 .callinfo 49 50 /* Make sure sr4-sr7 are set to zero for the kernel address space */ 51 mtsp %r0,%sr4 52 mtsp %r0,%sr5 53 mtsp %r0,%sr6 54 mtsp %r0,%sr7 55 56 /* Clear BSS (shouldn't the boot loader do this?) */ 57 58 .import __bss_start,data 59 .import __bss_stop,data 60 61 load32 PA(__bss_start),%r3 62 load32 PA(__bss_stop),%r4 63$bss_loop: 64 cmpb,<<,n %r3,%r4,$bss_loop 65 stw,ma %r0,4(%r3) 66 67 /* Save away the arguments the boot loader passed in (32 bit args) */ 68 load32 PA(boot_args),%r1 69 stw,ma %arg0,4(%r1) 70 stw,ma %arg1,4(%r1) 71 stw,ma %arg2,4(%r1) 72 stw,ma %arg3,4(%r1) 73 74 /* Initialize startup VM. Just map first 8/16 MB of memory */ 75 load32 PA(swapper_pg_dir),%r4 76 mtctl %r4,%cr24 /* Initialize kernel root pointer */ 77 mtctl %r4,%cr25 /* Initialize user root pointer */ 78 79#if PT_NLEVELS == 3 80 /* Set pmd in pgd */ 81 load32 PA(pmd0),%r5 82 shrd %r5,PxD_VALUE_SHIFT,%r3 83 ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3 84 stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4) 85 ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4 86#else 87 /* 2-level page table, so pmd == pgd */ 88 ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4 89#endif 90 91 /* Fill in pmd with enough pte directories */ 92 load32 PA(pg0),%r1 93 SHRREG %r1,PxD_VALUE_SHIFT,%r3 94 ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3 95 96 ldi ASM_PT_INITIAL,%r1 97 981: 99 stw %r3,0(%r4) 100 ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3 101 addib,> -1,%r1,1b 102#if PT_NLEVELS == 3 103 ldo ASM_PMD_ENTRY_SIZE(%r4),%r4 104#else 105 ldo ASM_PGD_ENTRY_SIZE(%r4),%r4 106#endif 107 108 109 /* Now initialize the PTEs themselves */ 110 ldo 0+_PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */ 111 ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */ 112 load32 PA(pg0),%r1 113 114$pgt_fill_loop: 115 STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1) 116 ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */ 117 addib,> -1,%r11,$pgt_fill_loop 118 nop 119 120 /* Load the return address...er...crash 'n burn */ 121 copy %r0,%r2 122 123 /* And the RFI Target address too */ 124 load32 start_kernel,%r11 125 126 /* And the initial task pointer */ 127 load32 init_thread_union,%r6 128 mtctl %r6,%cr30 129 130 /* And the stack pointer too */ 131 ldo THREAD_SZ_ALGN(%r6),%sp 132 133 /* And the interrupt stack */ 134 load32 interrupt_stack,%r6 135 mtctl %r6,%cr31 136 137#ifdef CONFIG_SMP 138 /* Set the smp rendevous address into page zero. 139 ** It would be safer to do this in init_smp_config() but 140 ** it's just way easier to deal with here because 141 ** of 64-bit function ptrs and the address is local to this file. 142 */ 143 load32 PA(smp_slave_stext),%r10 144 stw %r10,0x10(%r0) /* MEM_RENDEZ */ 145 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */ 146 147 /* FALLTHROUGH */ 148 .procend 149 150 /* 151 ** Code Common to both Monarch and Slave processors. 152 ** Entry: 153 ** 154 ** 1.1: 155 ** %r11 must contain RFI target address. 156 ** %r25/%r26 args to pass to target function 157 ** %r2 in case rfi target decides it didn't like something 158 ** 159 ** 2.0w: 160 ** %r3 PDCE_PROC address 161 ** %r11 RFI target address 162 ** 163 ** Caller must init: SR4-7, %sp, %r10, %cr24/25, 164 */ 165common_stext: 166 .proc 167 .callinfo 168#else 169 /* Clear PDC entry point - we won't use it */ 170 stw %r0,0x10(%r0) /* MEM_RENDEZ */ 171 stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */ 172#endif /*CONFIG_SMP*/ 173 174#ifdef CONFIG_64BIT 175 tophys_r1 %sp 176 177 /* Save the rfi target address */ 178 ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10 179 tophys_r1 %r10 180 std %r11, TASK_PT_GR11(%r10) 181 /* Switch to wide mode Superdome doesn't support narrow PDC 182 ** calls. 183 */ 1841: mfia %rp /* clear upper part of pcoq */ 185 ldo 2f-1b(%rp),%rp 186 depdi 0,31,32,%rp 187 bv (%rp) 188 ssm PSW_SM_W,%r0 189 190 /* Set Wide mode as the "Default" (eg for traps) 191 ** First trap occurs *right* after (or part of) rfi for slave CPUs. 192 ** Someday, palo might not do this for the Monarch either. 193 */ 1942: 195#define MEM_PDC_LO 0x388 196#define MEM_PDC_HI 0x35C 197 ldw MEM_PDC_LO(%r0),%r3 198 ldw MEM_PDC_HI(%r0),%r6 199 depd %r6, 31, 32, %r3 /* move to upper word */ 200 201 ldo PDC_PSW(%r0),%arg0 /* 21 */ 202 ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */ 203 ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */ 204 load32 PA(stext_pdc_ret), %rp 205 bv (%r3) 206 copy %r0,%arg3 207 208stext_pdc_ret: 209 /* restore rfi target address*/ 210 ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10 211 tophys_r1 %r10 212 ldd TASK_PT_GR11(%r10), %r11 213 tovirt_r1 %sp 214#endif 215 216 /* PARANOID: clear user scratch/user space SR's */ 217 mtsp %r0,%sr0 218 mtsp %r0,%sr1 219 mtsp %r0,%sr2 220 mtsp %r0,%sr3 221 222 /* Initialize Protection Registers */ 223 mtctl %r0,%cr8 224 mtctl %r0,%cr9 225 mtctl %r0,%cr12 226 mtctl %r0,%cr13 227 228 /* Initialize the global data pointer */ 229 loadgp 230 231 /* Set up our interrupt table. HPMCs might not work after this! 232 * 233 * We need to install the correct iva for PA1.1 or PA2.0. The 234 * following short sequence of instructions can determine this 235 * (without being illegal on a PA1.1 machine). 236 */ 237#ifndef CONFIG_64BIT 238 ldi 32,%r10 239 mtctl %r10,%cr11 240 .level 2.0 241 mfctl,w %cr11,%r10 242 .level 1.1 243 comib,<>,n 0,%r10,$is_pa20 244 ldil L%PA(fault_vector_11),%r10 245 b $install_iva 246 ldo R%PA(fault_vector_11)(%r10),%r10 247 248$is_pa20: 249 .level LEVEL /* restore 1.1 || 2.0w */ 250#endif /*!CONFIG_64BIT*/ 251 load32 PA(fault_vector_20),%r10 252 253$install_iva: 254 mtctl %r10,%cr14 255 256 b aligned_rfi /* Prepare to RFI! Man all the cannons! */ 257 nop 258 259 .align 128 260aligned_rfi: 261 pcxt_ssm_bug 262 263 rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */ 264 /* Don't need NOPs, have 8 compliant insn before rfi */ 265 266 mtctl %r0,%cr17 /* Clear IIASQ tail */ 267 mtctl %r0,%cr17 /* Clear IIASQ head */ 268 269 /* Load RFI target into PC queue */ 270 mtctl %r11,%cr18 /* IIAOQ head */ 271 ldo 4(%r11),%r11 272 mtctl %r11,%cr18 /* IIAOQ tail */ 273 274 load32 KERNEL_PSW,%r10 275 mtctl %r10,%ipsw 276 277 /* Jump through hyperspace to Virt Mode */ 278 rfi 279 nop 280 281 .procend 282 283#ifdef CONFIG_SMP 284 285 .import smp_init_current_idle_task,data 286 .import smp_callin,code 287 288#ifndef CONFIG_64BIT 289smp_callin_rtn: 290 .proc 291 .callinfo 292 break 1,1 /* Break if returned from start_secondary */ 293 nop 294 nop 295 .procend 296#endif /*!CONFIG_64BIT*/ 297 298/*************************************************************************** 299* smp_slave_stext is executed by all non-monarch Processors when the Monarch 300* pokes the slave CPUs in smp.c:smp_boot_cpus(). 301* 302* Once here, registers values are initialized in order to branch to virtual 303* mode. Once all available/eligible CPUs are in virtual mode, all are 304* released and start out by executing their own idle task. 305*****************************************************************************/ 306smp_slave_stext: 307 .proc 308 .callinfo 309 310 /* 311 ** Initialize Space registers 312 */ 313 mtsp %r0,%sr4 314 mtsp %r0,%sr5 315 mtsp %r0,%sr6 316 mtsp %r0,%sr7 317 318 /* Initialize the SP - monarch sets up smp_init_current_idle_task */ 319 load32 PA(smp_init_current_idle_task),%sp 320 LDREG 0(%sp),%sp /* load task address */ 321 tophys_r1 %sp 322 LDREG TASK_THREAD_INFO(%sp),%sp 323 mtctl %sp,%cr30 /* store in cr30 */ 324 ldo THREAD_SZ_ALGN(%sp),%sp 325 326 /* point CPU to kernel page tables */ 327 load32 PA(swapper_pg_dir),%r4 328 mtctl %r4,%cr24 /* Initialize kernel root pointer */ 329 mtctl %r4,%cr25 /* Initialize user root pointer */ 330 331#ifdef CONFIG_64BIT 332 /* Setup PDCE_PROC entry */ 333 copy %arg0,%r3 334#else 335 /* Load RFI *return* address in case smp_callin bails */ 336 load32 smp_callin_rtn,%r2 337#endif 338 339 /* Load RFI target address. */ 340 load32 smp_callin,%r11 341 342 /* ok...common code can handle the rest */ 343 b common_stext 344 nop 345 346 .procend 347#endif /* CONFIG_SMP */ 348#ifndef CONFIG_64BIT 349 .data 350 351 .align 4 352 .export $global$,data 353 354 .type $global$,@object 355 .size $global$,4 356$global$: 357 .word 0 358#endif /*!CONFIG_64BIT*/ 359